Home
last modified time | relevance | path

Searched +full:entry +full:- +full:latency +full:- +full:us (Results 1 – 25 of 346) sorted by relevance

12345678910>>...14

/linux-6.12.1/Documentation/devicetree/bindings/cpu/
Didle-states.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
11 - Anup Patel <anup@brainfault.org>
15 1 - Introduction
18 ARM and RISC-V systems contain HW capable of managing power consumption
19 dynamically, where cores can be put in different low-power states (ranging
22 run-time, can be specified through device tree bindings representing the
[all …]
Dcpu-capacity.txt6 1 - Introduction
15 2 - CPU capacity definition
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
23 capture a first-order approximation of the relative performance of CPUs.
29 * A "single-threaded" or CPU affine benchmark
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
54 available, final capacities are calculated by directly using capacity-dmips-
58 4 - Examples
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/power/
Ddomain-idle-state.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/domain-idle-state.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
18 const: domain-idle-states
21 "^(cpu|cluster|domain)-":
29 const: domain-idle-state
31 entry-latency-us:
33 The worst case latency in microseconds required to enter the idle
[all …]
Dpower-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/power-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafael J. Wysocki <rjw@rjwysocki.net>
11 - Kevin Hilman <khilman@kernel.org>
12 - Ulf Hansson <ulf.hansson@linaro.org>
25 \#power-domain-cells property in the PM domain provider node.
29 pattern: "^(power-controller|power-domain|performance-domain)([@-].*)?$"
31 domain-idle-states:
[all …]
/linux-6.12.1/Documentation/ABI/testing/
Ddebugfs-intel-iommu62 Entry SrcID DstID Vct IRTE_high IRTE_low
68 Entry SrcID DstID Vct IRTE_high IRTE_low
77 Entry SrcID PDA_high PDA_low Vct IRTE_high IRTE_low
87 '-1' and other PASID related fields are invalid.
103 -1 0x0000000000000000:0x0000000000000000:0x0000000000000000
166 * 0 - disable sampling all latency data
168 * 1 - enable sampling IOTLB invalidation latency data
170 * 2 - enable sampling devTLB invalidation latency data
172 * 3 - enable sampling intr entry cache invalidation latency data
181 1) Disable sampling all latency data:
[all …]
/linux-6.12.1/drivers/cpuidle/
Ddt_idle_states.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #define pr_fmt(fmt) "DT idle-states: " fmt
32 idle_state->enter = match_id->data; in init_state_node()
38 idle_state->enter_s2idle = match_id->data; in init_state_node()
40 err = of_property_read_u32(state_node, "wakeup-latency-us", in init_state_node()
41 &idle_state->exit_latency); in init_state_node()
45 err = of_property_read_u32(state_node, "entry-latency-us", in init_state_node()
48 pr_debug(" * %pOF missing entry-latency-us property\n", in init_state_node()
50 return -EINVAL; in init_state_node()
53 err = of_property_read_u32(state_node, "exit-latency-us", in init_state_node()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/arm/
Dpsci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
15 processors") can be used by Linux to initiate various CPU-centric power
25 r0 => 32-bit Function ID / return value
26 {r1 - r3} => Parameters
40 - description:
44 - description:
52 - const: arm,psci-0.2
[all …]
/linux-6.12.1/arch/arm64/boot/dts/sprd/
Dums9620.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
50 compatible = "arm,cortex-a55";
52 enable-method = "psci";
[all …]
Dsc9860.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <0>;
18 cpu-map {
52 compatible = "arm,cortex-a53";
54 enable-method = "psci";
55 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
[all …]
Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h>
9 #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
10 #include <dt-bindings/clock/qcom,rpmcc.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/interconnect/qcom,sdm660.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]
Dsc7180-firmware-tfa.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 * Devices that use SC7180 with TrustedFirmware-A
10 /delete-property/ power-domains;
11 /delete-property/ power-domain-names;
13 cpu-idle-states = <&LITTLE_CPU_SLEEP_0
19 /delete-property/ power-domains;
20 /delete-property/ power-domain-names;
22 cpu-idle-states = <&LITTLE_CPU_SLEEP_0
28 /delete-property/ power-domains;
29 /delete-property/ power-domain-names;
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
25 stdout-path = "serial0:115200n8";
29 compatible = "pwm-backlight";
31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
32 power-supply = <&ppvar_sys>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&ap_edp_bklten>;
37 /* FIXED REGULATORS - parents above children */
[all …]
Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/dma/qcom-gpi.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,sdx75.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include <dt-bindings/mailbox/qcom-ipcc.h>
17 #include <dt-bindings/power/qcom,rpmhpd.h>
[all …]
Dsc7280-chrome-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
20 /delete-node/ &cdsp_mem;
21 /delete-node/ &domain_idle_states;
22 /delete-node/ &gpu_zap_mem;
23 /delete-node/ &gpu_zap_shader;
24 /delete-node/ &hyp_mem;
25 /delete-node/ &xbl_mem;
26 /delete-node/ &reserved_xbl_uefi_log;
27 /delete-node/ &sec_apps_mem;
31 domain_idle_states: domain-idle-states {
[all …]
/linux-6.12.1/arch/arm64/boot/dts/arm/
Djuno-r2.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
14 #include "juno-cs-r1r2.dtsi"
18 compatible = "arm,juno-r2", "arm,juno", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
28 stdout-path = "serial0:115200n8";
[all …]
Djuno.dts4 * Copyright (c) 2013-2014 ARM Ltd.
9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
27 stdout-path = "serial0:115200n8";
31 compatible = "arm,psci-0.2";
[all …]
Djuno-r1.dts9 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/arm/coresight-cti-dt.h>
13 #include "juno-base.dtsi"
14 #include "juno-cs-r1r2.dtsi"
18 compatible = "arm,juno-r1", "arm,juno", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
28 stdout-path = "serial0:115200n8";
[all …]
/linux-6.12.1/kernel/trace/
Dtrace_hwlat.c1 // SPDX-License-Identifier: GPL-2.0
3 * trace_hwlat.c - A simple Hardware Latency detector.
20 * Although certain hardware-inducing latencies are necessary (for example,
22 * and remote management) they can wreak havoc upon any OS-level performance
23 * guarantees toward low-latency, especially when the OS is not even made
27 * sampling the built-in CPU timer, looking for discontiguous readings.
31 * environment requiring any kind of low-latency performance
34 * Copyright (C) 2008-2009 Jon Masters, Red Hat, Inc. <jcm@redhat.com>
35 * Copyright (C) 2013-2016 Steven Rostedt, Red Hat, Inc. <srostedt@redhat.com>
55 #define DEFAULT_LAT_THRESHOLD 10 /* 10us */
[all …]
/linux-6.12.1/Documentation/trace/
Dftrace.rst2 ftrace - Function Tracer
13 - Written for: 2.6.28-rc2
14 - Updated for: 3.10
15 - Updated for: 4.13 - Copyright 2017 VMware Inc. Steven Rostedt
16 - Converted to rst format - Changbin Du <changbin.du@intel.com>
19 ------------
24 performance issues that take place outside of user-space.
28 There's latency tracing to examine what occurs between interrupts
41 ----------------------
43 See Documentation/trace/ftrace-design.rst for details for arch porters and such.
[all …]
/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhi3660.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
[all …]
/linux-6.12.1/tools/tracing/latency/
Dlatency-collector.c1 // SPDX-License-Identifier: GPL-2.0
44 C(FUNC_TR, "function-trace"), \
45 C(DISP_GR, "display-graph"), \
134 "No latency tracers are supported by your kernel!\n";
184 struct entry { struct
222 struct entry entries[QUEUE_SIZE];
271 count -= r; in write_or_die()
519 future->tv_sec += time_us / USEC_PER_SEC; in get_time_in_future()
520 nsec = future->tv_nsec + (time_us * NSEC_PER_USEC) % NSEC_PER_SEC; in get_time_in_future()
522 future->tv_nsec = nsec % NSEC_PER_SEC; in get_time_in_future()
[all …]
/linux-6.12.1/drivers/cpuidle/governors/
Dmenu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * menu.c - the menu idle governor
5 * Copyright (C) 2006-2007 Adam Belay <abelay@novell.com>
36 * 3) Latency tolerance (from pmqos infrastructure)
40 * -----------------------
41 * C state entry and exit have an energy cost, and a certain amount of time in
43 * provides us this duration in the "target_residency" field. So all that we
68 * Repeatable-interval-detector
69 * ----------------------------
79 * ---------------------------
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dintel_rc6.c1 // SPDX-License-Identifier: MIT
24 * low-voltage mode when idle, using down to 0V while at this stage. This
30 * among each other with the latency required to enter and leave RC6 and
38 * require higher latency to switch to and wake up.
48 return rc6_to_gt(rc)->uncore; in rc6_to_uncore()
53 return rc6_to_gt(rc)->i915; in rc6_to_i915()
59 struct intel_uncore *uncore = gt->uncore; in gen11_rc6_enable()
68 if (!intel_uc_uses_guc_rc(&gt->uc)) { in gen11_rc6_enable()
76 intel_uncore_write_fw(uncore, RING_MAX_IDLE(engine->mmio_base), 10); in gen11_rc6_enable()
88 * Bspec's guidance is to use 25us (really 25 * 1280ns) here. What we in gen11_rc6_enable()
[all …]
/linux-6.12.1/tools/perf/
Dbuiltin-ftrace.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * builtin-ftrace.c
25 #include <subcmd/parse-options.h>
39 #include "util/parse-sublevel-options.h"
62 workload_exec_errno = info->si_value.sival_int; in ftrace__workload_exec_failed_signal()
104 int fd, ret = -1; in __write_tracing_file()
113 return -1; in __write_tracing_file()
166 int ret = -1; in read_tracing_file_to_stdout()
171 return -1; in read_tracing_file_to_stdout()
213 return -1; in read_tracing_file_by_line()
[all …]

12345678910>>...14