Searched +full:dra7xxx +full:- +full:qspi (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/spi/ti,qspi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: TI QSPI controller10 - Kousik Sanagavarapu <five231003@gmail.com>13 - $ref: spi-controller.yaml#18 - ti,am4372-qspi19 - ti,dra7xxx-qspi23 - description: base registers[all …]
1 # SPDX-License-Identifier: GPL-2.0-only13 dynamic device discovery; some are even write-only or read-only.17 chips, analog to digital (and d-to-a) converters, and more.44 If your system has an master-capable SPI controller (which56 by providing a high-level interface to send memory-like commands.66 This enables support for SPI-NAND mode on the Airoha NAND68 is implemented as a SPI-MEM controller.155 supports spi-mem interface.234 this code to manage the per-word or per-transfer accesses to the263 Cadence QSPI is a specialized controller for connecting an SPI[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * TI QSPI driver5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com15 #include <linux/dma-mapping.h>17 #include <linux/omap-dma.h>31 #include <linux/spi/spi-mem.h>87 #define QSPI_WLEN(n) ((n - 1) << 19)94 #define QSPI_FLEN(n) ((n - 1) << 0)126 static inline unsigned long ti_qspi_read(struct ti_qspi *qspi, in ti_qspi_read() argument129 return readl(qspi->base + reg); in ti_qspi_read()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/bus/ti-sysc.h>9 #include <dt-bindings/clock/dra7.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/pinctrl/dra.h>12 #include <dt-bindings/clock/dra7.h>17 #address-cells = <2>;18 #size-cells = <2>;21 interrupt-parent = <&crossbar_mpu>;[all …]