bindings/spi/ti%2Cqspi.yaml

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/ti,qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI QSPI controller
10   - Kousik Sanagavarapu <five231003@gmail.com>
13   - $ref: spi-controller.yaml#
18       - ti,am4372-qspi
19       - ti,dra7xxx-qspi
23       - description: base registers
24       - description: mapped memory
26   reg-names:
28       - const: qspi_base
29       - const: qspi_mmap
34   clock-names:
36       - const: fck
41   num-cs:
48       Name of the hwmod associated to the QSPI.  This is for legacy
53   syscon-chipselects:
55       Handle to system control region containing QSPI chipselect register
57     $ref: /schemas/types.yaml#/definitions/phandle-array
59       - items:
60           - description: phandle to system control register
61           - description: register offset
63   spi-max-frequency:
68   - compatible
69   - reg
70   - reg-names
71   - clocks
72   - clock-names
73   - interrupts
78   - |
79     #include <dt-bindings/clock/dra7.h>
80     #include <dt-bindings/interrupt-controller/arm-gic.h>
83         compatible = "ti,dra7xxx-qspi";
86         reg-names = "qspi_base", "qspi_mmap";
87         syscon-chipselects = <&scm_conf 0x558>;
88         #address-cells = <1>;
89         #size-cells = <0>;
91         clock-names = "fck";
92         num-cs = <4>;
93         spi-max-frequency = <48000000>;