Searched +full:brcmstb +full:- +full:memc +full:- +full:ddr (Results 1 – 12 of 12) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
D | brcm,brcmstb-memc-ddr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/brcm,brcmstb-memc-ddr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Memory controller (MEMC) for Broadcom STB 10 - Florian Fainelli <f.fainelli@gmail.com> 15 - enum: 16 - brcm,brcmstb-memc-ddr-rev-b.1.x 17 - brcm,brcmstb-memc-ddr-rev-b.2.0 18 - brcm,brcmstb-memc-ddr-rev-b.2.1 [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/arm/bcm/ |
D | brcm,brcmstb.txt | 2 ----------------------------------------------- 3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants) 7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb" 11 #address-cells = <2>; 12 #size-cells = <2>; 14 compatible = "brcm,bcm7445", "brcm,brcmstb"; 16 Further, syscon nodes that map platform-specific registers used for general 19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon" 20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl", 21 "brcm,brcmstb-cpu-biu-ctrl", [all …]
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/linux-6.12.1/drivers/memory/ |
D | brcmstb_memc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * DDR Self-Refresh Power Down (SRPD) support for Broadcom STB SoCs 37 static int brcmstb_memc_uses_lpddr4(struct brcmstb_memc *memc) in brcmstb_memc_uses_lpddr4() argument 39 void __iomem *config = memc->ddr_ctrl + REG_MEMC_CNTRLR_CONFIG; in brcmstb_memc_uses_lpddr4() 47 static int brcmstb_memc_srpd_config(struct brcmstb_memc *memc, in brcmstb_memc_srpd_config() argument 50 void __iomem *cfg = memc->ddr_ctrl + memc->srpd_offset; in brcmstb_memc_srpd_config() 55 return -EINVAL; in brcmstb_memc_srpd_config() 57 memc->timeout_cycles = cycles; in brcmstb_memc_srpd_config() 73 struct brcmstb_memc *memc = dev_get_drvdata(dev); in frequency_show() local 75 return sprintf(buf, "%d\n", memc->frequency); in frequency_show() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/mips/brcm/ |
D | soc.txt | 5 - compatible: "brcm,bcm3368", "brcm,bcm3384", "brcm,bcm33843" 6 "brcm,bcm3384-viper", "brcm,bcm33843-viper" 12 The experimental -viper variants are for running Linux on the 3384's 16 ---------------- 21 = Always-On control block (AON CTRL) 23 This hardware provides control registers for the "always-on" (even in low-power 27 - compatible : should be one of 28 "brcm,bcm7425-aon-ctrl" 29 "brcm,bcm7429-aon-ctrl" 30 "brcm,bcm7435-aon-ctrl" and [all …]
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/linux-6.12.1/arch/arm/boot/dts/broadcom/ |
D | bcm7445.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #address-cells = <2>; 6 #size-cells = <2>; 8 compatible = "brcm,bcm7445", "brcm,brcmstb"; 9 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "brcm,brahma-b15"; 22 enable-method = "brcm,brahma-b15"; [all …]
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/linux-6.12.1/arch/mips/boot/dts/brcm/ |
D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <175625000>; 42 cpu_intc: interrupt-controller { 43 #address-cells = <0>; 44 compatible = "mti,cpu-interrupt-controller"; 46 interrupt-controller; [all …]
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D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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D | bcm7360.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 24 cpu_intc: interrupt-controller { 25 #address-cells = <0>; 26 compatible = "mti,cpu-interrupt-controller"; 28 interrupt-controller; [all …]
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D | bcm7362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <375000000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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D | bcm7346.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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/linux-6.12.1/drivers/soc/bcm/brcmstb/pm/ |
D | pm-mips.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * MIPS-specific support for Broadcom STB S2/S3/S5 power management 5 * Copyright (C) 2016-2017 Broadcom 94 ctx->cp0_regs[CONTEXT] = read_c0_context(); in brcm_pm_save_cp0_context() 95 ctx->cp0_regs[USER_LOCAL] = read_c0_userlocal(); in brcm_pm_save_cp0_context() 96 ctx->cp0_regs[PGMK] = read_c0_pagemask(); in brcm_pm_save_cp0_context() 97 ctx->cp0_regs[HWRENA] = read_c0_cache(); in brcm_pm_save_cp0_context() 98 ctx->cp0_regs[COMPARE] = read_c0_compare(); in brcm_pm_save_cp0_context() 99 ctx->cp0_regs[STATUS] = read_c0_status(); in brcm_pm_save_cp0_context() 102 ctx->cp0_regs[CONFIG] = read_c0_brcm_config(); in brcm_pm_save_cp0_context() [all …]
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/linux-6.12.1/ |
D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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