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/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsc7280-idp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
25 max98360a: audio-codec-0 {
27 pinctrl-names = "default";
28 pinctrl-0 = <&amp_en>;
29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
30 #sound-dai-cells = <0>;
[all …]
Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
[all …]
Dsc7280-herobrine-audio-wcd9385.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /* BOARD-SPECIFIC TOP LEVEL NODES */
11 compatible = "google,sc7280-herobrine";
12 model = "sc7280-wcd938x-max98360a-1mic";
14 audio-routing =
35 #address-cells = <1>;
36 #size-cells = <0>;
38 dai-link@0 {
39 link-name = "MAX98360A";
43 sound-dai = <&lpass_cpu MI2S_SECONDARY>;
[all …]
Dsm7225-fairphone-fp4.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
15 #include <dt-bindings/firmware/qcom,scm.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
18 #include <dt-bindings/input/input.h>
19 #include <dt-bindings/leds/common.h>
20 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
21 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 #include <dt-bindings/usb/pd.h>
[all …]
Dqcm6490-shift-otter.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &rmtfs_mem;
28 chassis-type = "handset";
36 #address-cells = <2>;
[all …]
Dqrb4210-rb2.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/usb/pd.h>
16 compatible = "qcom,qrb4210-rb2", "qcom,qrb4210", "qcom,sm4250";
24 stdout-path = "serial0:115200n8";
28 clk40M: can-clk {
29 compatible = "fixed-clock";
30 clock-frequency = <40000000>;
31 #clock-cells = <0>;
[all …]
Dqcm6490-fairphone-fp5.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
12 #include <dt-bindings/iio/qcom,spmi-adc7-pm7325.h>
13 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
14 #include <dt-bindings/leds/common.h>
15 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
16 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &rmtfs_mem;
28 chassis-type = "handset";
36 #address-cells = <2>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dsophgo,cv1800-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/sophgo,cv1800-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inochi Amaoto <inochiama@outlook.com>
15 - sophgo,cv1800b-pinctrl
16 - sophgo,cv1812h-pinctrl
17 - sophgo,sg2000-pinctrl
18 - sophgo,sg2002-pinctrl
22 - description: pinctrl for system domain
[all …]
Dqcom,lpass-lpi-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,lpass-lpi-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
19 gpio-controller: true
21 "#gpio-cells":
24 include/dt-bindings/gpio/gpio.h
[all …]
Dpincfg-node.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 bias-disable:
23 description: disable any pin bias
25 bias-high-impedance:
27 description: high impedance mode ("third-state", "floating")
29 bias-bus-hold:
[all …]
Dintel,pinctrl-keembay.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
19 const: intel,keembay-pinctrl
24 gpio-controller: true
26 '#gpio-cells':
39 interrupt-controller: true
41 '#interrupt-cells':
[all …]
Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
30 Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
33 pin-settings:
40 '-pins$':
43 - $ref: pincfg-node.yaml#
44 - $ref: pinmux-node.yaml#
63 dmic6, io, dsp-gpio, irq1, irq2, fll1-clk,
[all …]
Dimg,pistachio-pinctrl.txt8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
22 - gpio-controller: Indicates the device is a GPIO controller.
[all …]
Dactions,s900-pinctrl.txt7 - compatible: Should be "actions,s900-pinctrl"
8 - reg: Should contain the register base address and size of
10 - clocks: phandle of the clock feeding the pin controller
11 - gpio-controller: Marks the device node as a GPIO controller.
12 - gpio-ranges: Specifies the mapping between gpio controller and
13 pin-controller pins.
14 - #gpio-cells: Should be two. The first cell is the gpio pin number
16 - interrupt-controller: Marks the device node as an interrupt controller.
17 - #interrupt-cells: Specifies the number of cells needed to encode an
21 bindings/interrupt-controller/interrupts.txt
[all …]
/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
21 stdout-path = "serial0:115200n8";
25 timebase-frequency = <6250000>;
34 compatible = "gpio-leds";
36 led-ack {
40 linux,default-trigger = "heartbeat";
[all …]
Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
25 stdout-path = "serial0:115200n8";
33 gpio-restart {
34 compatible = "gpio-restart";
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
41 #sound-dai-cells = <0>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dcirrus,madera.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cirrus Logic Madera class audio CODECs Multi-Functional Device
10 - patches@opensource.cirrus.com
23 - $ref: /schemas/pinctrl/cirrus,madera.yaml#
24 - $ref: /schemas/regulator/wlf,arizona.yaml#
25 - $ref: /schemas/sound/cirrus,madera.yaml#
26 - if:
31 - cirrus,cs47l85
[all …]
/linux-6.12.1/drivers/acpi/acpica/
Dutresdecode.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: utresdecode - Resource descriptor keyword strings
28 "0 - Good Configuration",
29 "1 - Acceptable Configuration",
30 "2 - Suboptimal Configuration",
31 "3 - ***Invalid Configuration***",
165 /* Serial bus type */
168 "/* UNKNOWN serial bus type */",
175 /* I2C serial bus access mode */
182 /* I2C serial bus slave mode */
[all …]
/linux-6.12.1/drivers/pinctrl/
Dpinconf-generic.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
22 #include <linux/pinctrl/pinconf-generic.h>
28 #include "pinctrl-utils.h"
32 PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false),
33 PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false),
34 PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false),
35 PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", "ohms", true),
37 "input bias pull to pin specific state", "ohms", true),
[all …]
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-msm8960-pins.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
4 i2c3_default_state: i2c3-default-state {
5 i2c3-pins {
8 drive-strength = <8>;
9 bias-disable;
13 i2c3_sleep_state: i2c3-sleep-state {
14 i2c3-pins {
17 drive-strength = <2>;
18 bias-bus-hold;
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
[all …]
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dat91-sama5d2_xplained.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
8 /dts-v1/;
10 #include "sama5d2-pinfunc.h"
11 #include <dt-bindings/mfd/atmel-flexcom.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h>
18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
28 stdout-path = "serial0:115200n8";
[all …]
Dat91-sama5d29_curiosity.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * at91-sama5d29_curiosity.dts - Device Tree file for SAMA5D29 Curiosity board
10 /dts-v1/;
12 #include "sama5d2-pinfunc.h"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/mfd/atmel-flexcom.h>
19 compatible = "microchip,sama5d29-curiosity", "atmel,sama5d29", "atmel,sama5d2", "atmel,sama5";
24 serial2 = &uart3; // mikro BUS 2
25 serial3 = &uart4; // mikro BUS 1
[all …]
/linux-6.12.1/include/linux/platform_data/
Dvideo-pxafb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Author: Jean-Frederic Clere
15 * bits 0 - 3: for LCD panel type:
17 * STN - for passive matrix
18 * DSTN - for dual scan passive matrix
19 * TFT - for active matrix
21 * bits 4 - 9 : for bus width
22 * bits 10-17 : for AC Bias Pin Frequency
61 * It is set in linux/arch/arm/mach-pxa/machine_name.c and used in the probe routine
86 /* Smart Panel Mode Timing - see PXA27x DM 7.4.15.0.3 for details
[all …]
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32mp15xx-dhcom-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) 2019-2020 Marek Vasut <marex@denx.de>
6 #include "stm32mp15-pinctrl.dtsi"
7 #include "stm32mp15xxaa-pinctrl.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/mfd/st,stpmic1.h>
24 reserved-memory {
25 #address-cells = <1>;
26 #size-cells = <1>;
30 compatible = "shared-dma-pool";
[all …]

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