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/linux-6.12.1/drivers/gpu/drm/imagination/
Dpvr_rogue_fwif_sf.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
47 * - --- ---- ---- ---- ---- ---- ---- ----
48 * 0-11: id number
49 * 12-15: group id number
50 * 16-19: number of parameters
51 * 20-27: unused
52 * 28-30: active: identify SF packet, otherwise regular int32
65 #define ROGUE_FW_SF_GID(x) (((u32)(x) >> 12) & 0xfU) argument
67 #define ROGUE_FW_SF_PARAMNUM(x) (((u32)(x) >> 16) & 0xfU) argument
80 "Kick 3D: FWCtx 0x%08.8x @ %d, RTD 0x%08x. Partial render:%d, CSW resume:%d, prio:%d" },
[all …]
/linux-6.12.1/tools/memory-model/
Dlinux-kernel.def1 // SPDX-License-Identifier: GPL-2.0+
4 // "Frightening small children and disconcerting grown-ups: Concurrency
9 READ_ONCE(X) __load{once}(X)
10 WRITE_ONCE(X,V) { __store{once}(X,V); }
13 smp_store_release(X,V) { __store{release}(*X,V); }
14 smp_load_acquire(X) __load{acquire}(*X)
15 rcu_assign_pointer(X,V) { __store{release}(X,V); }
16 rcu_dereference(X) __load{once}(X)
17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
23 smp_mb__before_atomic() { __fence{before-atomic}; }
[all …]
/linux-6.12.1/lib/crypto/
Dchacha.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 static void chacha_permute(u32 *x, int nrounds) in chacha_permute() argument
24 x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 16); in chacha_permute()
25 x[1] += x[5]; x[13] = rol32(x[13] ^ x[1], 16); in chacha_permute()
26 x[2] += x[6]; x[14] = rol32(x[14] ^ x[2], 16); in chacha_permute()
27 x[3] += x[7]; x[15] = rol32(x[15] ^ x[3], 16); in chacha_permute()
29 x[8] += x[12]; x[4] = rol32(x[4] ^ x[8], 12); in chacha_permute()
30 x[9] += x[13]; x[5] = rol32(x[5] ^ x[9], 12); in chacha_permute()
31 x[10] += x[14]; x[6] = rol32(x[6] ^ x[10], 12); in chacha_permute()
32 x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 12); in chacha_permute()
[all …]
/linux-6.12.1/arch/hexagon/kernel/
Dvm_init_segtable.S1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
9 * These tables are pre-computed and linked into kernel.
17 * No user mode access, RWX, write-back cache. The entry needs
40 #define X __HVM_PDE_S_INVALID macro
47 .word X,X,X,X
48 .word X,X,X,X
49 .word X,X,X,X
50 .word X,X,X,X
51 .word X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Dcrct10dif-vpmsum_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Constants generated by crc32-vpmsum, available at
6 * https://github.com/antonblanchard/crc32-vpmsum
8 * crc32-vpmsum is
21 /* x^261184 mod p(x), x^261120 mod p(x) */
24 /* x^260160 mod p(x), x^260096 mod p(x) */
27 /* x^259136 mod p(x), x^259072 mod p(x) */
30 /* x^258112 mod p(x), x^258048 mod p(x) */
33 /* x^257088 mod p(x), x^257024 mod p(x) */
36 /* x^256064 mod p(x), x^256000 mod p(x) */
[all …]
Dcrc32c-vpmsum_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 /* x^261120 mod p(x)` << 1, x^261184 mod p(x)` << 1 */
20 /* x^260096 mod p(x)` << 1, x^260160 mod p(x)` << 1 */
23 /* x^259072 mod p(x)` << 1, x^259136 mod p(x)` << 1 */
26 /* x^258048 mod p(x)` << 1, x^258112 mod p(x)` << 1 */
29 /* x^257024 mod p(x)` << 1, x^257088 mod p(x)` << 1 */
32 /* x^256000 mod p(x)` << 1, x^256064 mod p(x)` << 1 */
35 /* x^254976 mod p(x)` << 1, x^255040 mod p(x)` << 1 */
38 /* x^253952 mod p(x)` << 1, x^254016 mod p(x)` << 1 */
41 /* x^252928 mod p(x)` << 1, x^252992 mod p(x)` << 1 */
[all …]
/linux-6.12.1/drivers/cpufreq/
Dlonghaul.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * VIA-specific information
59 -1, /* 0000 -> RESERVED */
60 30, /* 0001 -> 3.0x */
61 40, /* 0010 -> 4.0x */
62 -1, /* 0011 -> RESERVED */
63 -1, /* 0100 -> RESERVED */
64 35, /* 0101 -> 3.5x */
65 45, /* 0110 -> 4.5x */
66 55, /* 0111 -> 5.5x */
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/nvfw/
Dflcn.c29 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx); in loader_config_dump()
30 nvkm_debug(subdev, "\tcodeDmaBase : 0x%xx\n", hdr->code_dma_base); in loader_config_dump()
31 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total); in loader_config_dump()
32 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load); in loader_config_dump()
33 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point); in loader_config_dump()
34 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base); in loader_config_dump()
35 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); in loader_config_dump()
36 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base); in loader_config_dump()
37 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc); in loader_config_dump()
38 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv); in loader_config_dump()
[all …]
Dacr.c29 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_dump()
30 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_dump()
31 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_dump()
32 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap); in wpr_header_dump()
33 nvkm_debug(subdev, "\tstatus : %d\n", hdr->status); in wpr_header_dump()
40 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_v1_dump()
41 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_v1_dump()
42 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_v1_dump()
43 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap); in wpr_header_v1_dump()
44 nvkm_debug(subdev, "\tbinVersion : %d\n", hdr->bin_version); in wpr_header_v1_dump()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega20_processpptables.c40 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
42 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
51 const void *table_address = hwmgr->soft_pp_table; in get_powerplay_table()
55 smu_atom_get_data_table(hwmgr->adev, index, in get_powerplay_table()
58 hwmgr->soft_pp_table = table_address; in get_powerplay_table()
59 hwmgr->soft_pp_table_size = size; in get_powerplay_table()
70 pr_info("Version = 0x%08x\n", pptable->Version);
72 pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
73 pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
75 pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
[all …]
/linux-6.12.1/Documentation/sound/cards/
Dmultisound.sh4 # -- Andrew Veliath <andrewtv@usa.net>
15 # -=-=- Getting Firmware -=-=-
26 # Currently, full-duplex digital audio (/dev/dsp only, /dev/audio is
37 # snd-msnd-lib - MultiSound base (requires snd)
39 # snd-msnd-classic - Base audio/mixer support for Classic, Monetery and
42 # snd-msnd-pinnacle - Base audio/mixer support for Pinnacle and Fiji cards
45 # Important Notes - Read Before Using
69 # These cards are configured through the driver snd-msnd-classic. You must
81 # can be used to configure the card in non-PnP mode, and in PnP mode
84 # pinnaclecfg is not required; you can use the snd-msnd-pinnacle module
[all …]
/linux-6.12.1/drivers/scsi/qla4xxx/
Dql4_dbg.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2012 QLogic Corporation
19 printk("------------------------------------------------------------" in qla4xxx_dump_buffer()
20 "--\n"); in qla4xxx_dump_buffer()
22 printk("%02x", *c); in qla4xxx_dump_buffer()
38 printk(KERN_INFO "mailbox[%d] = 0x%08X\n", in qla4xxx_dump_registers()
39 i, readl(&ha->qla4_82xx_reg->mailbox_in[i])); in qla4xxx_dump_registers()
44 printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n", in qla4xxx_dump_registers()
46 readw(&ha->reg->mailbox[i])); in qla4xxx_dump_registers()
49 printk(KERN_INFO "0x%02X flash_address = 0x%08X\n", in qla4xxx_dump_registers()
[all …]
/linux-6.12.1/arch/mips/include/asm/sibyte/
Dsb1250_genbus.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
27 * Generic Bus Region Configuration Registers (Table 11-4)
40 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
43 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
45 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL) argument
46 #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL) argument
50 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
54 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
62 #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT) argument
63 #define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT) argument
[all …]
Dsb1250_mc.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
26 * Memory Channel Config Register (table 6-14)
34 #define V_MC_CHANNEL_SEL(x) _SB_MAKEVALUE(x, S_MC_CHANNEL_SEL) argument
35 #define G_MC_CHANNEL_SEL(x) _SB_GETVALUE(x, S_MC_CHANNEL_SEL, M_MC_CHANNEL_SEL) argument
39 #define V_MC_BANK0_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK0_MAP) argument
40 #define G_MC_BANK0_MAP(x) _SB_GETVALUE(x, S_MC_BANK0_MAP, M_MC_BANK0_MAP) argument
47 #define V_MC_BANK1_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK1_MAP) argument
48 #define G_MC_BANK1_MAP(x) _SB_GETVALUE(x, S_MC_BANK1_MAP, M_MC_BANK1_MAP) argument
55 #define V_MC_BANK2_MAP(x) _SB_MAKEVALUE(x, S_MC_BANK2_MAP) argument
56 #define G_MC_BANK2_MAP(x) _SB_GETVALUE(x, S_MC_BANK2_MAP, M_MC_BANK2_MAP) argument
[all …]
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4/
Dt4_msg.h4 * Copyright (c) 2003-2014 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
196 #define CPL_OPCODE_V(x) ((x) << CPL_OPCODE_S) argument
197 #define CPL_OPCODE_G(x) (((x) >> CPL_OPCODE_S) & 0xFF) argument
198 #define TID_G(x) ((x) & 0xFFFFFF) argument
200 /* tid is assumed to be 24-bits */
203 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
211 #define TID_TID_V(x) ((x) << TID_TID_S) argument
212 #define TID_TID_G(x) (((x) >> TID_TID_S) & TID_TID_M) argument
[all …]
/linux-6.12.1/arch/powerpc/platforms/44x/
Dfsp2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * FSP-2 board specific routines
7 * Copyright 2002-2005 MontaVista Software Inc.
10 * Copyright (c) 2003-2005 Zultys Technologies
31 #define FSP2_BUS_ERR "ibm,bus-error-irq"
32 #define FSP2_CMU_ERR "ibm,cmu-error-irq"
33 #define FSP2_CONF_ERR "ibm,conf-error-irq"
34 #define FSP2_OPBD_ERR "ibm,opbd-error-irq"
35 #define FSP2_MCUE "ibm,mc-ue-irq"
36 #define FSP2_RST_WRN "ibm,reset-warning-irq"
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsienna_cichlid_ppt.c78 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == \
80 (*member) = (smu->smu_table.driver_pptable + \
83 (*member) = (smu->smu_table.driver_pptable + \
98 if (amdgpu_ip_version(smu->adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 13)) in get_table_size()
282 struct amdgpu_device *adev = smu->adev; in sienna_cichlid_get_allowed_feature_mask()
285 return -EINVAL; in sienna_cichlid_get_allowed_feature_mask()
310 if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) { in sienna_cichlid_get_allowed_feature_mask()
315 if ((adev->pm.pp_feature & PP_GFX_DCS_MASK) && in sienna_cichlid_get_allowed_feature_mask()
317 !(adev->flags & AMD_IS_APU)) in sienna_cichlid_get_allowed_feature_mask()
320 if (adev->pm.pp_feature & PP_MCLK_DPM_MASK) in sienna_cichlid_get_allowed_feature_mask()
[all …]
/linux-6.12.1/net/xfrm/
Dxfrm_state.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * Split up af-specific functions
36 rcu_dereference_protected((table), lockdep_is_held(&(net)->xfrm.xfrm_state_lock))
54 static inline bool xfrm_state_hold_rcu(struct xfrm_state __rcu *x) in xfrm_state_hold_rcu() argument
56 return refcount_inc_not_zero(&x->refcnt); in xfrm_state_hold_rcu()
65 return __xfrm_dst_hash(daddr, saddr, reqid, family, net->xfrm.state_hmask); in xfrm_dst_hash()
73 return __xfrm_src_hash(daddr, saddr, family, net->xfrm.state_hmask); in xfrm_src_hash()
80 return __xfrm_spi_hash(daddr, spi, proto, family, net->xfrm.state_hmask); in xfrm_spi_hash()
85 return __xfrm_seq_hash(seq, net->xfrm.state_hmask); in xfrm_seq_hash()
94 if (_x->xso.type == XFRM_DEV_OFFLOAD_PACKET) \
[all …]
/linux-6.12.1/tools/lib/bpf/
Dbpf_endian.h1 /* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */
13 #define ___bpf_mvb(x, b, n, m) ((__u##b)(x) << (b-(n+1)*8) >> (b-8) << (m*8)) argument
15 #define ___bpf_swab16(x) ((__u16)( \ argument
16 ___bpf_mvb(x, 16, 0, 1) | \
17 ___bpf_mvb(x, 16, 1, 0)))
19 #define ___bpf_swab32(x) ((__u32)( \ argument
20 ___bpf_mvb(x, 32, 0, 3) | \
21 ___bpf_mvb(x, 32, 1, 2) | \
22 ___bpf_mvb(x, 32, 2, 1) | \
23 ___bpf_mvb(x, 32, 3, 0)))
[all …]
/linux-6.12.1/fs/bcachefs/
Derrcode.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 x(ERANGE, ERANGE_option_too_small) \
7 x(ERANGE, ERANGE_option_too_big) \
8 x(EINVAL, mount_option) \
9 x(BCH_ERR_mount_option, option_name) \
10 x(BCH_ERR_mount_option, option_value) \
11 x(BCH_ERR_mount_option, option_not_bool) \
12 x(ENOMEM, ENOMEM_stripe_buf) \
13 x(ENOMEM, ENOMEM_replicas_table) \
14 x(ENOMEM, ENOMEM_cpu_replicas) \
[all …]
/linux-6.12.1/drivers/phy/microchip/
Dlan966x_serdes_regs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 #define HSIO_SD_CFG_PHY_RESET_SET(x)\ argument
22 FIELD_PREP(HSIO_SD_CFG_PHY_RESET, x)
23 #define HSIO_SD_CFG_PHY_RESET_GET(x)\ argument
24 FIELD_GET(HSIO_SD_CFG_PHY_RESET, x)
27 #define HSIO_SD_CFG_TX_RESET_SET(x)\ argument
28 FIELD_PREP(HSIO_SD_CFG_TX_RESET, x)
29 #define HSIO_SD_CFG_TX_RESET_GET(x)\ argument
30 FIELD_GET(HSIO_SD_CFG_TX_RESET, x)
33 #define HSIO_SD_CFG_TX_RATE_SET(x)\ argument
[all …]
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/
Dsge_defs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This file is automatically generated --- any changes will be lost.
11 #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS) argument
12 #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS) argument
15 #define V_EC_GTS(x) ((x) << S_EC_GTS) argument
20 #define V_EC_INDEX(x) ((x) << S_EC_INDEX) argument
21 #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX) argument
25 #define V_EC_SIZE(x) ((x) << S_EC_SIZE) argument
26 #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE) argument
30 #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO) argument
[all …]
/linux-6.12.1/arch/arm/include/asm/
Dopcodes.h1 /* SPDX-License-Identifier: GPL-2.0-only */
24 #define ___asm_opcode_swab32(x) ( \ argument
25 (((x) << 24) & 0xFF000000) \
26 | (((x) << 8) & 0x00FF0000) \
27 | (((x) >> 8) & 0x0000FF00) \
28 | (((x) >> 24) & 0x000000FF) \
30 #define ___asm_opcode_swab16(x) ( \ argument
31 (((x) << 8) & 0xFF00) \
32 | (((x) >> 8) & 0x00FF) \
34 #define ___asm_opcode_swahb32(x) ( \ argument
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dsoc15d.h80 #define CP_PACKETJ_GET_REG(x) ((x) & 0x3FFFF) argument
81 #define CP_PACKETJ_GET_RES(x) (((x) >> 18) & 0x3F) argument
82 #define CP_PACKETJ_GET_COND(x) (((x) >> 24) & 0xF) argument
83 #define CP_PACKETJ_GET_TYPE(x) (((x) >> 28) & 0xF) argument
88 #define PACKET3_BASE_INDEX(x) ((x) << 0) argument
116 #define WRITE_DATA_DST_SEL(x) ((x) << 8) argument
117 /* 0 - register
118 * 1 - memory (sync - via GRBM)
119 * 2 - gl2
120 * 3 - gds
[all …]
/linux-6.12.1/include/math-emu/
Ddouble.h1 /* Software floating-point emulation.
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
39 #define _FP_FRACXBITS_D (_FP_FRACTBITS_D - _FP_FRACBITS_D)
41 #define _FP_WFRACXBITS_D (_FP_FRACTBITS_D - _FP_WFRACBITS_D)
47 ((_FP_W_TYPE)1 << (_FP_FRACBITS_D-2) % _FP_W_TYPE_SIZE)
49 ((_FP_W_TYPE)1 << (_FP_FRACBITS_D-1) % _FP_W_TYPE_SIZE)
62 unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
66 unsigned frac1 : _FP_FRACBITS_D - (_FP_IMPLBIT_D != 0) - _FP_W_TYPE_SIZE;
73 #define FP_DECL_D(X) _FP_DECL(2,X) argument
74 #define FP_UNPACK_RAW_D(X,val) _FP_UNPACK_RAW_2(D,X,val) argument
[all …]

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