| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calc_auto.c | 32 * This file is gcc-parseable HW gospel, coming straight from HW engineers.
36 * remain as-is as it provides us with a guarantee from HW that it is correct.
40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument
43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation()
44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation()
45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation()
46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
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| D | dcn_calcs.c | 40 dc->ctx->logger
50 * This file is gcc-parseable HW gospel, coming straight from HW engineers.
54 * remain as-is as it provides us with a guarantee from HW that it is correct.
70 * slow-slow corner + 10% margin with voltages aligned to FCLK.
305 input->src.is_hsplit = false; in pipe_ctx_to_e2e_pipe_params()
308 if (pipe->plane_state->stereo_format == PLANE_STEREO_FORMAT_SIDE_BY_SIDE || in pipe_ctx_to_e2e_pipe_params()
309 pipe->plane_state->stereo_format == PLANE_STEREO_FORMAT_TOP_AND_BOTTOM) { in pipe_ctx_to_e2e_pipe_params()
311 input->src.hsplit_grp = pipe->pipe_idx; in pipe_ctx_to_e2e_pipe_params()
312 } else if (pipe->top_pipe != NULL && pipe->top_pipe->plane_state == pipe->plane_state) { in pipe_ctx_to_e2e_pipe_params()
313 input->src.is_hsplit = true; in pipe_ctx_to_e2e_pipe_params()
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| /linux-6.12.1/include/linux/atomic/ |
| D | atomic-instrumented.h | 1 // SPDX-License-Identifier: GPL-2.0
3 // Generated by scripts/atomic/gen-atomic-instrumented.sh
20 * atomic_read() - atomic load with relaxed ordering
21 * @v: pointer to atomic_t
23 * Atomically loads the value of @v with relaxed ordering.
27 * Return: The value loaded from @v.
30 atomic_read(const atomic_t *v) in atomic_read() argument
32 instrument_atomic_read(v, sizeof(*v)); in atomic_read()
33 return raw_atomic_read(v); in atomic_read()
37 * atomic_read_acquire() - atomic load with acquire ordering
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| D | atomic-long.h | 1 // SPDX-License-Identifier: GPL-2.0
3 // Generated by scripts/atomic/gen-atomic-long.sh
25 * raw_atomic_long_read() - atomic load with relaxed ordering
26 * @v: pointer to atomic_long_t
28 * Atomically loads the value of @v with relaxed ordering.
32 * Return: The value loaded from @v.
35 raw_atomic_long_read(const atomic_long_t *v) in raw_atomic_long_read() argument
38 return raw_atomic64_read(v); in raw_atomic_long_read()
40 return raw_atomic_read(v); in raw_atomic_long_read()
45 * raw_atomic_long_read_acquire() - atomic load with acquire ordering
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| D | atomic-arch-fallback.h | 1 // SPDX-License-Identifier: GPL-2.0
3 // Generated by scripts/atomic/gen-atomic-fallback.sh
445 * raw_atomic_read() - atomic load with relaxed ordering
446 * @v: pointer to atomic_t
448 * Atomically loads the value of @v with relaxed ordering.
452 * Return: The value loaded from @v.
455 raw_atomic_read(const atomic_t *v) in raw_atomic_read() argument
457 return arch_atomic_read(v); in raw_atomic_read()
461 * raw_atomic_read_acquire() - atomic load with acquire ordering
462 * @v: pointer to atomic_t
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 34 * This file is gcc-parsable HW gospel, coming straight from HW engineers.
38 * remain as-is as it provides us with a guarantee from HW that it is correct.
397 struct vba_vars_st *v,
723 P = 3 * wx - w; in dscceComputeDelay()
727 L = (ax + wx - 1) / wx; in dscceComputeDelay()
732 Delay = L * wx * (numSlices - 1) + ax + s + lstall + 22; in dscceComputeDelay()
748 // dscc - input deserializer in dscComputeDelay()
752 // dscc - input cdc fifo in dscComputeDelay()
756 // dscc - cdc uncertainty in dscComputeDelay()
758 // dscc - output cdc fifo in dscComputeDelay()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_mode_vba_31.c | 34 * This file is gcc-parsable HW gospel, coming straight from HW engineers.
38 * remain as-is as it provides us with a guarantee from HW that it is correct.
48 // For DML-C changes that hasn't been propagated to VBA yet
725 P = 3 * wx - w; in dscceComputeDelay()
729 L = (ax + wx - 1) / wx; in dscceComputeDelay()
734 Delay = L * wx * (numSlices - 1) + ax + s + lstall + 22; in dscceComputeDelay()
750 // dscc - input deserializer in dscComputeDelay()
754 // dscc - input cdc fifo in dscComputeDelay()
758 // dscc - cdc uncertainty in dscComputeDelay()
760 // dscc - output cdc fifo in dscComputeDelay()
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_mode_vba_314.c | 1 // SPDX-License-Identifier: MIT
34 * This file is gcc-parsable HW gospel, coming straight from HW engineers.
38 * remain as-is as it provides us with a guarantee from HW that it is correct.
46 // For DML-C changes that hasn't been propagated to VBA yet
743 P = 3 * wx - w; in dscceComputeDelay()
747 L = (ax + wx - 1) / wx; in dscceComputeDelay()
752 Delay = L * wx * (numSlices - 1) + ax + s + lstall + 22; in dscceComputeDelay()
768 // dscc - input deserializer in dscComputeDelay()
772 // dscc - input cdc fifo in dscComputeDelay()
776 // dscc - cdc uncertainty in dscComputeDelay()
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| /linux-6.12.1/sound/soc/qcom/ |
| D | lpass-lpaif-reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port))
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument
69 (v->irq_reg_base + (addr) + v->irq_reg_stride * (port))
73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument
74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument
75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument
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| /linux-6.12.1/drivers/media/platform/verisilicon/ |
| D | rockchip_vpu2_hw_h264_dec.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Hertz Wong <hertz.wong@rock-chips.com>
7 * Herman Chen <herman.chen@rock-chips.com>
16 #include <media/v4l2-mem2mem.h>
28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument
34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
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| D | rockchip_vpu2_hw_mpeg2_dec.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <media/v4l2-mem2mem.h>
23 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument
25 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument
26 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument
27 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument
28 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument
30 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument
31 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument
33 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument
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| D | hantro_g1_mpeg2_dec.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include <media/v4l2-mem2mem.h>
25 #define G1_REG_DEC_AXI_RD_ID(v) (((v) << 24) & GENMASK(31, 24)) argument
26 #define G1_REG_DEC_TIMEOUT_E(v) ((v) ? BIT(23) : 0) argument
27 #define G1_REG_DEC_STRSWAP32_E(v) ((v) ? BIT(22) : 0) argument
28 #define G1_REG_DEC_STRENDIAN_E(v) ((v) ? BIT(21) : 0) argument
29 #define G1_REG_DEC_INSWAP32_E(v) ((v) ? BIT(20) : 0) argument
30 #define G1_REG_DEC_OUTSWAP32_E(v) ((v) ? BIT(19) : 0) argument
31 #define G1_REG_DEC_DATA_DISC_E(v) ((v) ? BIT(18) : 0) argument
32 #define G1_REG_DEC_LATENCY(v) (((v) << 11) & GENMASK(16, 11)) argument
[all …]
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| /linux-6.12.1/arch/sh/mm/ |
| D | flush-sh4.c | 1 // SPDX-License-Identifier: GPL-2.0
9 * Write back the dirty D-caches, but not invalidate them.
16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local
19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
20 end = (aligned_start + size + L1_CACHE_BYTES-1) in sh4__flush_wback_region()
21 & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region()
22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region()
25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region()
[all …]
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| /linux-6.12.1/arch/x86/lib/ |
| D | atomic64_386_32.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
27 IRQ_SAVE v;
32 IRQ_RESTORE v; \
35 #define v %ecx macro
37 movl (v), %eax
38 movl 4(v), %edx
41 #undef v
43 #define v %esi macro
45 movl %ebx, (v)
46 movl %ecx, 4(v)
[all …]
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| /linux-6.12.1/drivers/md/ |
| D | dm-verity-target.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Based on Chromium dm-verity driver (C) 2011 The Chromium OS Authors
16 #include "dm-verity.h"
17 #include "dm-verity-fec.h"
18 #include "dm-verity-verify-sig.h"
19 #include "dm-audit.h"
54 /* Is at least one dm-verity instance using ahash_tfm instead of shash_tfm? */
59 struct dm_verity *v; member
66 * Auxiliary structure appended to each dm-bufio buffer. If the value
88 aux->hash_verified = 0; in dm_bufio_alloc_callback()
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| /linux-6.12.1/tools/memory-model/ |
| D | linux-kernel.def | 1 // SPDX-License-Identifier: GPL-2.0+
4 // "Frightening small children and disconcerting grown-ups: Concurrency
10 WRITE_ONCE(X,V) { __store{once}(X,V); }
13 smp_store_release(X,V) { __store{release}(*X,V); }
15 rcu_assign_pointer(X,V) { __store{release}(X,V); }
17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
23 smp_mb__before_atomic() { __fence{before-atomic}; }
24 smp_mb__after_atomic() { __fence{after-atomic}; }
25 smp_mb__after_spinlock() { __fence{after-spinlock}; }
26 smp_mb__after_unlock_lock() { __fence{after-unlock-lock}; }
[all …]
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| /linux-6.12.1/drivers/iio/adc/ |
| D | stm32-dfsdm.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
15 * STM32 DFSDM - global register map
18 * ----------------------------------------------------------
20 * ----------------------------------------------------------
22 * ----------------------------------------------------------
24 * ----------------------------------------------------------
26 * ----------------------------------------------------------
28 * ----------------------------------------------------------
30 * ----------------------------------------------------------
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| /linux-6.12.1/drivers/staging/media/sunxi/sun6i-isp/ |
| D | sun6i_isp_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2021-2022 Bootlin
21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument
22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument
33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument
57 /* Only since sun9i-a80-isp. */
104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument
105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument
106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument
107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument
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| /linux-6.12.1/tools/testing/selftests/bpf/progs/ |
| D | map_kptr_fail.c | 1 // SPDX-License-Identifier: GPL-2.0
27 struct map_value *v; in size_not_bpf_dw() local
30 v = bpf_map_lookup_elem(&array_map, &key); in size_not_bpf_dw()
31 if (!v) in size_not_bpf_dw()
34 *(u32 *)&v->unref_ptr = 0; in size_not_bpf_dw()
42 struct map_value *v; in non_const_var_off() local
45 v = bpf_map_lookup_elem(&array_map, &key); in non_const_var_off()
46 if (!v) in non_const_var_off()
49 id = ctx->protocol; in non_const_var_off()
52 *(u64 *)((void *)v + id) = 0; in non_const_var_off()
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| /linux-6.12.1/drivers/vhost/ |
| D | vdpa.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018-2020 Intel Corporation.
69 static void vhost_vdpa_iotlb_unmap(struct vhost_vdpa *v,
77 return as->id; in iotlb_to_asid()
80 static struct vhost_vdpa_as *asid_to_as(struct vhost_vdpa *v, u32 asid) in asid_to_as() argument
82 struct hlist_head *head = &v->as[asid % VHOST_VDPA_IOTLB_BUCKETS]; in asid_to_as()
86 if (as->id == asid) in asid_to_as()
92 static struct vhost_iotlb *asid_to_iotlb(struct vhost_vdpa *v, u32 asid) in asid_to_iotlb() argument
94 struct vhost_vdpa_as *as = asid_to_as(v, asid); in asid_to_iotlb()
99 return &as->iotlb; in asid_to_iotlb()
[all …]
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| /linux-6.12.1/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | display_mode_vba_32.c | 41 dml32_CalculateMaxDETAndMinCompressedBufferSize(mode_lib->vba.ConfigReturnBufferSizeInKByte, in dml32_recalculate()
42 mode_lib->vba.ROBBufferSizeInKByte, in dml32_recalculate()
44 false, //mode_lib->vba.override_setting.nomDETInKByteOverrideEnable, in dml32_recalculate()
45 0, //mode_lib->vba.override_setting.nomDETInKByteOverrideValue, in dml32_recalculate()
48 &mode_lib->vba.MaxTotalDETInKByte, &mode_lib->vba.nomDETInKByte, in dml32_recalculate()
49 &mode_lib->vba.MinCompressedBufferSizeInKByte); in dml32_recalculate()
61 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local
75 dml_print("DML::%s: --- START ---\n", __func__); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
76 dml_print("DML::%s: mode_lib->vba.PrefetchMode = %d\n", __func__, mode_lib->vba.PrefetchMode); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
77 …dml_print("DML::%s: mode_lib->vba.ImmediateFlipSupport = %d\n", __func__, mode_lib->vba.ImmediateF… in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
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| /linux-6.12.1/arch/x86/include/asm/ |
| D | atomic64_64.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* The 64-bit atomic type */
13 static __always_inline s64 arch_atomic64_read(const atomic64_t *v) in arch_atomic64_read() argument
15 return __READ_ONCE((v)->counter); in arch_atomic64_read()
18 static __always_inline void arch_atomic64_set(atomic64_t *v, s64 i) in arch_atomic64_set() argument
20 __WRITE_ONCE(v->counter, i); in arch_atomic64_set()
23 static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v) in arch_atomic64_add() argument
26 : "=m" (v->counter) in arch_atomic64_add()
27 : "er" (i), "m" (v->counter) : "memory"); in arch_atomic64_add()
30 static __always_inline void arch_atomic64_sub(s64 i, atomic64_t *v) in arch_atomic64_sub() argument
[all …]
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| /linux-6.12.1/drivers/gpu/host1x/hw/ |
| D | hw_host1x01_uclass.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2013, NVIDIA Corporation.
15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 8; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0xff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
[all …]
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| D | hw_host1x07_uclass.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
48 static inline u32 host1x_uclass_incr_syncpt_cond_f(u32 v) in host1x_uclass_incr_syncpt_cond_f() argument
50 return (v & 0xff) << 10; in host1x_uclass_incr_syncpt_cond_f()
52 #define HOST1X_UCLASS_INCR_SYNCPT_COND_F(v) \ argument
53 host1x_uclass_incr_syncpt_cond_f(v)
54 static inline u32 host1x_uclass_incr_syncpt_indx_f(u32 v) in host1x_uclass_incr_syncpt_indx_f() argument
56 return (v & 0x3ff) << 0; in host1x_uclass_incr_syncpt_indx_f()
58 #define HOST1X_UCLASS_INCR_SYNCPT_INDX_F(v) \ argument
59 host1x_uclass_incr_syncpt_indx_f(v)
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| /linux-6.12.1/drivers/pinctrl/mvebu/ |
| D | pinctrl-kirkwood.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include "pinctrl-mvebu.h"
19 #define V(f6180, f6190, f6192, f6281, f6282, dx4122, dx1135) \ macro
25 VARIANT_MV88F6180 = V(1, 0, 0, 0, 0, 0, 0),
26 VARIANT_MV88F6190 = V(0, 1, 0, 0, 0, 0, 0),
27 VARIANT_MV88F6192 = V(0, 0, 1, 0, 0, 0, 0),
28 VARIANT_MV88F6281 = V(0, 0, 0, 1, 0, 0, 0),
29 VARIANT_MV88F6282 = V(0, 0, 0, 0, 1, 0, 0),
30 VARIANT_MV98DX4122 = V(0, 0, 0, 0, 0, 1, 0),
31 VARIANT_MV98DX1135 = V(0, 0, 0, 0, 0, 0, 1),
[all …]
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