Searched full:sysref (Results 1 – 2 of 2) sorted by relevance
63 ti,sysref-ddly:64 description: SYSREF digital delay value.70 ti,sysref-mux:72 SYSREF Mux configuration.76 SYSREF Pulser 277 SYSREF Continuous 388 ti,sysref-pulse-count:90 Number of SYSREF pulses to send when SYSREF is not in continuous mode.132 ti,clkout-sysref:134 Select SYSREF clock path for output clock.[all …]
34 /* 0x100 - 0x137 Device Clock and SYSREF Clock Output Control */75 /* 0x138 - 0x145 SYSREF, SYNC, and Device Config */226 bool sysref; member237 * @sysref_mux: select SYSREF source238 * @sysref_pulse_cnt: number of SYSREF pulses generated while not in continuous240 * @sysref_ddly: SYSREF digital delay value243 * @sclk: reference to the internal sysref clock (SCLK)721 * (8.3.3.1 How to enable SYSREF)774 * transaction. If SYSREF local digital delay is not used, this step in lmk04832_sclk_sync_sequence()793 * does not shift into continuous SYSREF mode. in lmk04832_sclk_sync_sequence()[all …]