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/linux-6.12.1/lib/lz4/
Dlz4hc_compress.c2 * LZ4 HC - High Compression Mode of LZ4
3 * Copyright (C) 2011-2015, Yann Collet.
5 * BSD 2 - Clause License (http://www.opensource.org/licenses/bsd - license.php)
27 * - LZ4 homepage : http://www.lz4.org
28 * - LZ4 source repository : https://github.com/lz4/lz4
31 * Sven Schmidt <4sschmid@informatik.uni-hamburg.de>
34 /*-************************************
47 #define OPTIMAL_ML (int)((ML_MASK - 1) + MINMATCH)
50 >> ((MINMATCH*8) - LZ4HC_HASH_LOG))
63 memset((void *)hc4->hashTable, 0, sizeof(hc4->hashTable)); in LZ4HC_init()
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/linux-6.12.1/fs/jffs2/
Ddebug.c2 * JFFS2 -- Journalling Flash File System, Version 2.
4 * Copyright © 2001-2007 Red Hat, Inc.
5 * Copyright © 2004-2010 David Woodhouse <dwmw2@infradead.org>
31 if (unlikely(jeb && jeb->used_size + jeb->dirty_size + in __jffs2_dbg_acct_sanity_check_nolock()
32 jeb->free_size + jeb->wasted_size + in __jffs2_dbg_acct_sanity_check_nolock()
33 jeb->unchecked_size != c->sector_size)) { in __jffs2_dbg_acct_sanity_check_nolock()
34 JFFS2_ERROR("eeep, space accounting for block at 0x%08x is screwed.\n", jeb->offset); in __jffs2_dbg_acct_sanity_check_nolock()
36 jeb->free_size, jeb->dirty_size, jeb->used_size, in __jffs2_dbg_acct_sanity_check_nolock()
37 jeb->wasted_size, jeb->unchecked_size, c->sector_size); in __jffs2_dbg_acct_sanity_check_nolock()
41 if (unlikely(c->used_size + c->dirty_size + c->free_size + c->erasing_size + c->bad_size in __jffs2_dbg_acct_sanity_check_nolock()
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/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7173.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
23 The AD411X family encompasses a series of low power, low noise, 24-bit,
24 sigma-delta analog-to-digital converters that offer a versatile range of
26 fully differential/single-ended and bipolar voltage inputs.
29 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf
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/linux-6.12.1/fs/btrfs/
Ddelayed-ref.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "delayed-ref.h"
14 #include "space-info.h"
15 #include "tree-mod-log.h"
32 struct btrfs_block_rsv *delayed_refs_rsv = &fs_info->delayed_refs_rsv; in btrfs_check_space_for_delayed_refs()
33 struct btrfs_block_rsv *global_rsv = &fs_info->global_block_rsv; in btrfs_check_space_for_delayed_refs()
37 spin_lock(&global_rsv->lock); in btrfs_check_space_for_delayed_refs()
38 reserved = global_rsv->reserved; in btrfs_check_space_for_delayed_refs()
39 spin_unlock(&global_rsv->lock); in btrfs_check_space_for_delayed_refs()
47 spin_lock(&delayed_refs_rsv->lock); in btrfs_check_space_for_delayed_refs()
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Dref-verify.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "disk-io.h"
12 #include "delayed-ref.h"
13 #include "ref-verify.h"
63 * free it until we unmount the file system in order to make sure re-allocations
81 struct rb_node **p = &root->rb_node; in insert_block_entry()
88 if (entry->bytenr > be->bytenr) in insert_block_entry()
89 p = &(*p)->rb_left; in insert_block_entry()
90 else if (entry->bytenr < be->bytenr) in insert_block_entry()
91 p = &(*p)->rb_right; in insert_block_entry()
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Dbackref.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "disk-io.h"
14 #include "delayed-ref.h"
17 #include "tree-mod-log.h"
20 #include "extent-tree.h"
22 #include "tree-checker.h"
42 u64 offset = key->offset; in check_extent_in_eb()
48 if (!ctx->ignore_extent_item_pos && in check_extent_in_eb()
56 if (ctx->extent_item_pos < data_offset || in check_extent_in_eb()
57 ctx->extent_item_pos >= data_offset + data_len) in check_extent_in_eb()
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Dextent-tree.c1 // SPDX-License-Identifier: GPL-2.0
20 #include "extent-tree.h"
22 #include "disk-io.h"
23 #include "print-tree.h"
27 #include "free-space-cache.h"
28 #include "free-space-tree.h"
30 #include "ref-verify.h"
31 #include "space-info.h"
32 #include "block-rsv.h"
35 #include "dev-replace.h"
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/linux-6.12.1/drivers/thermal/
Dk3_j72xx_bandgap.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021 Texas Instruments Incorporated - http://www.ti.com/
73 * struct err_values - structure containing error/reference values
74 * @refs: reference error values for -40C, 30C, 125C & 150C
75 * @errs: Actual error values for -40C, 30C, 125C & 150C read from the efuse
85 int m = 0, c, num, den, i, err, idx1, idx2, err1, err2, ref1, ref2; in create_table_segments() local
90 idx1 = err_vals->refs[seg]; in create_table_segments()
92 idx2 = err_vals->refs[seg + 1]; in create_table_segments()
93 err1 = err_vals->errs[seg]; in create_table_segments()
94 err2 = err_vals->errs[seg + 1]; in create_table_segments()
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/linux-6.12.1/arch/x86/kernel/
Dtsc.c1 // SPDX-License-Identifier: GPL-2.0-only
81 data->cyc2ns_offset = this_cpu_read(cyc2ns.data[idx].cyc2ns_offset); in __cyc2ns_read()
82 data->cyc2ns_mul = this_cpu_read(cyc2ns.data[idx].cyc2ns_mul); in __cyc2ns_read()
83 data->cyc2ns_shift = this_cpu_read(cyc2ns.data[idx].cyc2ns_shift); in __cyc2ns_read()
114 * cyc2ns_scale needs to be a 32-bit value so that 32-bit multiplication
115 * (64-bit result) can be used.
120 * -johnstul@us.ibm.com "math is hard, lets go shopping!"
164 * conversion algorithm shifting a 32-bit value (now specifies a 64-bit in __set_cyc2ns_scale()
165 * value) - refer perf_event_mmap_page documentation in perf_event.h. in __set_cyc2ns_scale()
172 data.cyc2ns_offset = ns_now - in __set_cyc2ns_scale()
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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dxlnx,zynqmp-psgtr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/xlnx,zynqmp-psgtr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
18 "#phy-cells":
23 - description: The GTR lane
26 - description: The PHY type
28 - PHY_TYPE_DP
29 - PHY_TYPE_PCIE
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/linux-6.12.1/arch/arm64/boot/dts/xilinx/
Dzynqmp-zc1751-xm017-dc3.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm017-dc3
5 * (C) Copyright 2016 - 2021, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk-ccf.dtsi"
14 #include <dt-bindings/phy/phy.h>
17 model = "ZynqMP zc1751-xm017-dc3 RevA";
18 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
43 compatible = "fixed-clock";
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Dzynqmp-sck-kv-g-revB.dtso1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
16 /dts-v1/;
20 compatible = "xlnx,zynqmp-sk-kv260-rev2",
21 "xlnx,zynqmp-sk-kv260-rev1",
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Dzynqmp-sck-kv-g-revA.dtso1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2020 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
9 * "A" - A01 board un-modified (NXP)
10 * "Y" - A01 board modified with legacy interposer (Nexperia)
11 * "Z" - A01 board modified with Diode interposer
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/net/ti-dp83867.h>
18 #include <dt-bindings/phy/phy.h>
19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
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Dzynqmp-zc1751-xm015-dc1.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/phy/phy.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 model = "ZynqMP zc1751-xm015-dc1 RevA";
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Dzynqmp-zcu104-revC.dts1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
17 #include <dt-bindings/phy/phy.h>
21 compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
38 stdout-path = "serial0:115200n8";
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Dzynqmp-zcu104-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
17 #include <dt-bindings/phy/phy.h>
21 compatible = "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104", "xlnx,zynqmp";
38 stdout-path = "serial0:115200n8";
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Dzynqmp-zcu111-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
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Dzynqmp-zcu106-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2016 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
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Dzynqmp-zcu102-revA.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
11 /dts-v1/;
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
18 #include <dt-bindings/phy/phy.h>
22 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
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/linux-6.12.1/include/linux/mfd/
DidtRC38xxx_reg.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Register Map - Based on PolarBear_CSRs.RevA.xlsx (2023-04-21)
94 REF2 = 2, enumerator
229 hw_param->xtal_freq = 49152000; in idtfc3_default_hw_param()
230 hw_param->time_clk_freq = 25000000; in idtfc3_default_hw_param()
239 hw_param->xtal_freq = 49152000; in idtfc3_set_hw_param()
242 hw_param->xtal_freq = 50000000; in idtfc3_set_hw_param()
245 return -EINVAL; in idtfc3_set_hw_param()
250 hw_param->time_clk_freq = 25000000; in idtfc3_set_hw_param()
253 hw_param->time_clk_freq = 50000000; in idtfc3_set_hw_param()
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