1 // SPDX-License-Identifier: GPL-2.0-only
81 		data->cyc2ns_offset = this_cpu_read(cyc2ns.data[idx].cyc2ns_offset);  in __cyc2ns_read()
82 		data->cyc2ns_mul    = this_cpu_read(cyc2ns.data[idx].cyc2ns_mul);  in __cyc2ns_read()
83 		data->cyc2ns_shift  = this_cpu_read(cyc2ns.data[idx].cyc2ns_shift);  in __cyc2ns_read()
114  *  cyc2ns_scale needs to be a 32-bit value so that 32-bit multiplication
115  *  (64-bit result) can be used.
120  *                      -johnstul@us.ibm.com "math is hard, lets go shopping!"
164 	 * conversion algorithm shifting a 32-bit value (now specifies a 64-bit  in __set_cyc2ns_scale()
165 	 * value) - refer perf_event_mmap_page documentation in perf_event.h.  in __set_cyc2ns_scale()
172 	data.cyc2ns_offset = ns_now -  in __set_cyc2ns_scale()
177 	raw_write_seqcount_latch(&c2n->seq);  in __set_cyc2ns_scale()
178 	c2n->data[0] = data;  in __set_cyc2ns_scale()
179 	raw_write_seqcount_latch(&c2n->seq);  in __set_cyc2ns_scale()
180 	c2n->data[1] = data;  in __set_cyc2ns_scale()
204 	seqcount_latch_init(&c2n->seq);  in cyc2ns_init_boot_cpu()
217 	struct cyc2ns_data *data = c2n->data;  in cyc2ns_init_secondary_cpus()
221 			seqcount_latch_init(&c2n->seq);  in cyc2ns_init_secondary_cpus()
223 			c2n->data[0] = data[0];  in cyc2ns_init_secondary_cpus()
224 			c2n->data[1] = data[1];  in cyc2ns_init_secondary_cpus()
230  * Scheduler clock - returns current time in nanosec units.
251 	return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);  in native_sched_clock()
367 		if ((t2 - t1) < thresh)  in tsc_read_refs()
382 	hpet2 -= hpet1;  in calc_hpet_ref()
402 	pm2 -= pm1;  in calc_pmtimer_ref()
465 		delta = t2 - tsc;  in pit_calibrate_tsc()
487 	delta = t2 - t1;  in pit_calibrate_tsc()
495  * non-virtualized hardware.
499  *  - the PIT is running at roughly 1.19MHz
501  *  - each IO is going to take about 1us on real hardware,
504  *    update - anything else implies a unacceptably slow CPU
507  *  - with 256 PIT ticks to read the value, we have 214us to
511  *  - We're doing 2 reads per loop (LSB, MSB), and we expect
516  *  - if the PIT is stuck, and we see *many* more reads, we
545 	*deltap = get_cycles() - prev_tsc;  in pit_expect_msb()
577 	 * Counter 2, mode 0 (one-shot), binary count  in quick_pit_calibrate()
581 	 * final output frequency as a decrement-by-one),  in quick_pit_calibrate()
594 	 * to do that is to just read back the 16-bit counter  in quick_pit_calibrate()
601 			if (!pit_expect_msb(0xff-i, &delta, &d2))  in quick_pit_calibrate()
604 			delta -= tsc;  in quick_pit_calibrate()
627 			if (!pit_verify_msb(0xfe - i))  in quick_pit_calibrate()
645 	 * kHz = ticks / time-in-seconds / 1000;  in quick_pit_calibrate()
646 	 * kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000  in quick_pit_calibrate()
647 	 * kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000)  in quick_pit_calibrate()
656  * native_calibrate_tsc - determine TSC frequency
756 	u64 tsc1, tsc2, delta, ref1, ref2;  in pit_hpet_ptimer_calibrate_cpu()  local
803 		tsc2 = tsc_read_refs(&ref2, hpet);  in pit_hpet_ptimer_calibrate_cpu()
810 		if (ref1 == ref2)  in pit_hpet_ptimer_calibrate_cpu()
817 		tsc2 = (tsc2 - tsc1) * 1000000LL;  in pit_hpet_ptimer_calibrate_cpu()
819 			tsc2 = calc_hpet_ref(tsc2, ref1, ref2);  in pit_hpet_ptimer_calibrate_cpu()
821 			tsc2 = calc_pmtimer_ref(tsc2, ref1, ref2);  in pit_hpet_ptimer_calibrate_cpu()
862 		if (!hpet && !ref1 && !ref2) {  in pit_hpet_ptimer_calibrate_cpu()
881 	if (!hpet && !ref1 && !ref2) {  in pit_hpet_ptimer_calibrate_cpu()
904  * native_calibrate_cpu_early - can calibrate the cpu early in boot
922  * native_calibrate_cpu - calibrate the cpu
946 	else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz)  in recalibrate_cpu_khz()
993 	offset = cyc2ns_suspend - sched_clock();  in tsc_restore_sched_clock_state()
1030 		ref_freq = freq->old;  in time_cpufreq_notifier()
1035 	if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||  in time_cpufreq_notifier()
1036 	    (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {  in time_cpufreq_notifier()
1038 			cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);  in time_cpufreq_notifier()
1040 		tsc_khz = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);  in time_cpufreq_notifier()
1041 		if (!(freq->flags & CPUFREQ_CONST_LOOPS))  in time_cpufreq_notifier()
1044 		set_cyc2ns_scale(tsc_khz, freq->policy->cpu, rdtsc());  in time_cpufreq_notifier()
1084 	 * Don't enable ART in a VM, non-stop TSC and TSC_ADJUST required,  in detect_art()
1116  * structure to avoid a nasty time-warp. This can be observed in a
1127  * checking the result of read_tsc() - cycle_last for being negative.
1166 	.name			= "tsc-early",
1243 		/* Geode_LX - the OLPC CPU has a very reliable TSC */  in check_system_tsc_reliable()
1253 	 *  - TSC running at constant frequency  in check_system_tsc_reliable()
1254 	 *  - TSC which does not stop in C-States  in check_system_tsc_reliable()
1255 	 *  - the TSC_ADJUST register which allows to detect even minimal  in check_system_tsc_reliable()
1257 	 *  - not more than four packages  in check_system_tsc_reliable()
1301  * tsc_refine_calibration_work - Further refine tsc freq calibration
1353 	delta = tsc_stop - tsc_start;  in tsc_refine_calibration_work()
1364 		if (abs(tsc_khz - freq) > (tsc_khz >> 11)) {  in tsc_refine_calibration_work()
1380 	if (abs(tsc_khz - freq) > tsc_khz/100)  in tsc_refine_calibration_work()
1461 		/* We should not be here with non-native cpu calibration */  in determine_cpu_tsc_frequencies()
1467 	 * Trust non-zero tsc_khz as authoritative,  in determine_cpu_tsc_frequencies()
1473 	else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz)  in determine_cpu_tsc_frequencies()
1514 	/* Don't change UV TSC multi-chassis synchronization */  in tsc_early_init()