| /linux-6.12.1/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/ ! |
| D | ia_css_pipeline.h | 25 /* Pipeline stage to be executed on SP/ISP */
42 /* Pipeline of n stages to be executed on SP/ISP per stage */
69 /* Stage descriptor used to create a new stage in the pipeline */
81 /* @brief initialize the pipeline module
85 * Initializes the pipeline module. This API has to be called
86 * before any operation on the pipeline module is done
90 /* @brief initialize the pipeline structure with default values
92 * @param[out] pipeline structure to be initialized with defaults
94 * @param[in] pipe_num Number that uniquely identifies a pipeline.
97 * Initializes the pipeline structure with a set of default values.
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| /linux-6.12.1/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/ ! |
| D | pipeline.json | 9 "PublicDescription": "This event counts valid cycles of EAGA pipeline.",
12 "BriefDescription": "This event counts valid cycles of EAGA pipeline."
15 "PublicDescription": "This event counts valid cycles of EAGB pipeline.",
18 "BriefDescription": "This event counts valid cycles of EAGB pipeline."
21 "PublicDescription": "This event counts valid cycles of EXA pipeline.",
24 "BriefDescription": "This event counts valid cycles of EXA pipeline."
27 "PublicDescription": "This event counts valid cycles of EXB pipeline.",
30 "BriefDescription": "This event counts valid cycles of EXB pipeline."
33 "PublicDescription": "This event counts valid cycles of FLA pipeline.",
36 "BriefDescription": "This event counts valid cycles of FLA pipeline."
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| /linux-6.12.1/drivers/staging/media/atomisp/pci/runtime/pipeline/src/ ! |
| D | pipeline.c | 44 struct ia_css_pipeline *pipeline,
53 static void ia_css_pipeline_set_zoom_stage(struct ia_css_pipeline *pipeline);
66 struct ia_css_pipeline *pipeline, in ia_css_pipeline_create() argument
71 assert(pipeline); in ia_css_pipeline_create()
72 IA_CSS_ENTER_PRIVATE("pipeline = %p, pipe_id = %d, pipe_num = %d, dvs_frame_delay = %d", in ia_css_pipeline_create()
73 pipeline, pipe_id, pipe_num, dvs_frame_delay); in ia_css_pipeline_create()
74 if (!pipeline) { in ia_css_pipeline_create()
79 pipeline_init_defaults(pipeline, pipe_id, pipe_num, dvs_frame_delay); in ia_css_pipeline_create()
102 /* @brief destroy a pipeline
104 * @param[in] pipeline
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| /linux-6.12.1/drivers/gpu/drm/xen/ ! |
| D | xen_drm_front_kms.c | 93 static void send_pending_event(struct xen_drm_front_drm_pipeline *pipeline) in send_pending_event() argument
95 struct drm_crtc *crtc = &pipeline->pipe.crtc; in send_pending_event()
100 if (pipeline->pending_event) in send_pending_event()
101 drm_crtc_send_vblank_event(crtc, pipeline->pending_event); in send_pending_event()
102 pipeline->pending_event = NULL; in send_pending_event()
110 struct xen_drm_front_drm_pipeline *pipeline = in display_enable() local
119 ret = xen_drm_front_mode_set(pipeline, crtc->x, crtc->y, in display_enable()
126 pipeline->conn_connected = false; in display_enable()
134 struct xen_drm_front_drm_pipeline *pipeline = in display_disable() local
139 ret = xen_drm_front_mode_set(pipeline, 0, 0, 0, 0, 0, in display_disable()
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| D | xen_drm_front_conn.c | 50 struct xen_drm_front_drm_pipeline *pipeline = in connector_detect() local
54 pipeline->conn_connected = false; in connector_detect()
56 return pipeline->conn_connected ? connector_status_connected : in connector_detect()
64 struct xen_drm_front_drm_pipeline *pipeline = in connector_get_modes() local
75 videomode.hactive = pipeline->width; in connector_get_modes()
76 videomode.vactive = pipeline->height; in connector_get_modes()
105 struct xen_drm_front_drm_pipeline *pipeline = in xen_drm_front_conn_init() local
110 pipeline->conn_connected = true; in xen_drm_front_conn_init()
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| /linux-6.12.1/drivers/isdn/mISDN/ ! |
| D | dsp_pipeline.c | 163 int dsp_pipeline_init(struct dsp_pipeline *pipeline) in dsp_pipeline_init() argument
165 if (!pipeline) in dsp_pipeline_init()
168 INIT_LIST_HEAD(&pipeline->list); in dsp_pipeline_init()
173 static inline void _dsp_pipeline_destroy(struct dsp_pipeline *pipeline) in _dsp_pipeline_destroy() argument
177 list_for_each_entry_safe(entry, n, &pipeline->list, list) { in _dsp_pipeline_destroy()
180 dsp_hwec_disable(container_of(pipeline, struct dsp, in _dsp_pipeline_destroy()
181 pipeline)); in _dsp_pipeline_destroy()
188 void dsp_pipeline_destroy(struct dsp_pipeline *pipeline) in dsp_pipeline_destroy() argument
191 if (!pipeline) in dsp_pipeline_destroy()
194 _dsp_pipeline_destroy(pipeline); in dsp_pipeline_destroy()
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| /linux-6.12.1/Documentation/gpu/ ! |
| D | komeda-kms.rst | 15 architecture. A display pipeline is made up of multiple individual and
16 functional pipeline stages called components, and every component has some
17 specific capabilities that can give the flowed pipeline pixel data a
24 Layer is the first pipeline stage, which prepares the pixel data for the next
58 Final stage of display pipeline, Timing controller is not for the pixel
76 Possible D71 Pipeline usage
94 Single pipeline data flow
98 :alt: Single pipeline digraph
99 :caption: Single pipeline data flow
140 Dual pipeline with Slave enabled
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| /linux-6.12.1/tools/perf/pmu-events/arch/powerpc/power10/ ! |
| D | pipeline.json | 5 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered a TLB miss or…
55 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
60 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline finished at dispatch a…
85 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
90 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the s…
95 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a lwsync waiting t…
135 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was dispatched but not…
150 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the L…
155 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline required special handl…
165 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
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| /linux-6.12.1/drivers/net/wireless/ti/wl18xx/ ! |
| D | debugfs.c | 143 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, hs_tx_stat_fifo_int, "%u");
144 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_tx_stat_fifo_int, "%u");
145 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, enc_rx_stat_fifo_int, "%u");
146 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, rx_complete_stat_fifo_int, "%u");
147 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_proc_swi, "%u");
148 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, post_proc_swi, "%u");
149 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, sec_frag_swi, "%u");
150 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, pre_to_defrag_swi, "%u");
151 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, defrag_to_rx_xfer_swi, "%u");
152 WL18XX_DEBUGFS_FWSTATS_FILE(pipeline, dec_packet_in, "%u");
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| /linux-6.12.1/drivers/media/platform/renesas/vsp1/ ! |
| D | vsp1_pipe.h | 3 * vsp1_pipe.h -- R-Car VSP1 Pipeline
74 * struct vsp1_pipeline - A VSP1 hardware pipeline
75 * @pipe: the media pipeline
76 * @irqlock: protects the pipeline state
80 * @lock: protects the pipeline use count and stream count
81 * @kref: pipeline reference count
86 * @inputs: array of RPFs in the pipeline (indexed by RPF index)
87 * @output: WPF at the output of the pipeline
94 * @entities: list of entities in the pipeline
97 * @interlaced: True when the pipeline is configured in interlaced mode
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| D | vsp1_drm.c | 56 * Pipeline Configuration
60 * Insert the UIF in the pipeline between the prev and next entities. If no UIF
264 * The BRx might be acquired by the other pipeline in in vsp1_du_pipeline_setup_brx()
266 * of entities for this pipeline. The other pipeline's in vsp1_du_pipeline_setup_brx()
270 * However, if the other pipeline doesn't acquire our in vsp1_du_pipeline_setup_brx()
273 * the pipeline. To solve this, store the released BRx in vsp1_du_pipeline_setup_brx()
275 * if it isn't acquired by the other pipeline. in vsp1_du_pipeline_setup_brx()
286 * If the BRx we need is in use, force the owner pipeline to in vsp1_du_pipeline_setup_brx()
306 "DRM pipeline %u reconfiguration timeout\n", in vsp1_du_pipeline_setup_brx()
312 * by the other pipeline, add it back to the entities list (with in vsp1_du_pipeline_setup_brx()
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| /linux-6.12.1/drivers/media/platform/xilinx/ ! |
| D | xilinx-dma.c | 83 * Pipeline Stream Management
87 * xvip_pipeline_start_stop - Start ot stop streaming on a pipeline
88 * @pipe: The pipeline
89 * @start: Start (when true) or stop (when false) the pipeline
91 * Walk the entities chain starting at the pipeline output video node and start
127 * xvip_pipeline_set_stream - Enable/disable streaming on a pipeline
128 * @pipe: The pipeline
131 * The pipeline is shared between all DMA engines connect at its input and
134 * all entities in the pipeline. For this reason the pipeline uses a streaming
139 * the pipeline streaming count. If the streaming count reaches the number of
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| D | xilinx-dma.h | 29 * struct xvip_pipeline - Xilinx Video IP pipeline structure
30 * @pipe: media pipeline
31 * @lock: protects the pipeline @stream_count
32 * @use_count: number of DMA engines using the pipeline
34 * @num_dmas: number of DMA engines in the pipeline
35 * @output: DMA engine at the output of the pipeline
64 * @pipe: pipeline belonging to the DMA channel
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| /linux-6.12.1/drivers/media/test-drivers/vimc/ ! |
| D | vimc-streamer.c | 42 * @stream: the pointer to the stream structure with the pipeline to be
45 * Calls s_stream to disable the stream in each entity of the pipeline
73 * construct the pipeline used later on the streamer thread.
75 * the pipeline.
107 /* Check if the end of the pipeline was reached */ in vimc_streamer_pipeline_init()
120 /* Get the next device in the pipeline */ in vimc_streamer_pipeline_init()
137 * vimc_streamer_thread - Process frames through the pipeline
142 * the next one of the pipeline at a fixed framerate.
176 * vimc_streamer_s_stream - Start/stop the streaming on the media pipeline
184 * pipeline, creates and runs a kthread to consume buffers through the pipeline.
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| /linux-6.12.1/drivers/gpu/drm/msm/disp/mdp5/ ! |
| D | mdp5_crtc.c | 95 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in crtc_flush() local
102 return mdp5_ctl_commit(ctl, pipeline, flush_mask, start); in crtc_flush()
127 mixer = mdp5_cstate->pipeline.mixer; in crtc_flush_all()
130 r_mixer = mdp5_cstate->pipeline.r_mixer; in crtc_flush_all()
141 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in complete_flip() local
159 mdp5_ctl_blend(ctl, pipeline, NULL, NULL, 0, 0); in complete_flip()
215 struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline; in blend_setup() local
220 struct mdp5_hw_mixer *mixer = pipeline->mixer; in blend_setup()
222 struct mdp5_hw_mixer *r_mixer = pipeline->r_mixer; in blend_setup()
355 mdp5_ctl_blend(ctl, pipeline, stage, r_stage, plane_cnt, in blend_setup()
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| D | mdp5_ctl.c | 135 static void set_ctl_op(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline) in set_ctl_op() argument
138 struct mdp5_interface *intf = pipeline->intf; in set_ctl_op()
159 if (pipeline->r_mixer) in set_ctl_op()
168 int mdp5_ctl_set_pipeline(struct mdp5_ctl *ctl, struct mdp5_pipeline *pipeline) in mdp5_ctl_set_pipeline() argument
171 struct mdp5_interface *intf = pipeline->intf; in mdp5_ctl_set_pipeline()
177 set_ctl_op(ctl, pipeline); in mdp5_ctl_set_pipeline()
183 struct mdp5_pipeline *pipeline) in start_signal_needed() argument
185 struct mdp5_interface *intf = pipeline->intf; in start_signal_needed()
203 * For a given control operation (display pipeline), a START signal needs to be
220 * @pipeline: the encoder's INTF + MIXER configuration
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| /linux-6.12.1/drivers/gpu/drm/ci/ ! |
| D | gitlab-ci.yml | 28 # Bucket for the pipeline artifacts pushed to S3
30 # per-pipeline artifact storage on MinIO
135 # Pipeline for forked project branch
138 # Forked project branch / pre-merge pipeline not for Marge bot
141 # Pipeline runs for the main branch of the upstream Mesa project
144 # Post-merge pipeline
147 # Post-merge pipeline, not for Marge Bot
150 # Pre-merge pipeline
153 # Pre-merge pipeline for Marge Bot
165 - if: &is-scheduled-pipeline '$CI_PIPELINE_SOURCE == "schedule"'
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| /linux-6.12.1/sound/soc/sof/ ! |
| D | ipc4-pcm.c | 65 /* trigger a single pipeline */ in sof_ipc4_set_multi_pipeline_state()
79 /* ipc_size includes the count and the pipeline IDs for the number of pipelines */ in sof_ipc4_set_multi_pipeline_state()
92 dev_dbg(sdev->dev, "ipc4 set pipeline instance %d state %d", instance_id, state); in sof_ipc4_set_pipeline_state()
110 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_add_pipeline_by_priority() local
114 /* add pipeline from low priority to high */ in sof_ipc4_add_pipeline_by_priority()
115 if (ascend && pipeline->priority < pipe_priority[i]) in sof_ipc4_add_pipeline_by_priority()
117 /* add pipeline from high priority to low */ in sof_ipc4_add_pipeline_by_priority()
118 else if (!ascend && pipeline->priority > pipe_priority[i]) in sof_ipc4_add_pipeline_by_priority()
129 pipe_priority[i] = pipeline->priority; in sof_ipc4_add_pipeline_by_priority()
139 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_add_pipeline_to_trigger_list() local
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| D | ipc4-topology.c | 149 [SOF_PIPELINE_TOKENS] = {"Pipeline tokens", pipeline_tokens, ARRAY_SIZE(pipeline_tokens)},
424 struct sof_ipc4_pipeline *pipeline = pipe_widget->private; in sof_ipc4_update_card_components_string() local
434 if (!pipeline->use_chain_dma) in sof_ipc4_update_card_components_string()
595 struct sof_ipc4_pipeline *pipeline; in sof_ipc4_widget_setup_comp_dai() local
635 pipeline = pipe_widget->private; in sof_ipc4_widget_setup_comp_dai()
637 if (pipeline->use_chain_dma && in sof_ipc4_widget_setup_comp_dai()
763 struct sof_ipc4_pipeline *pipeline; in sof_ipc4_widget_setup_comp_pipeline() local
767 pipeline = kzalloc(sizeof(*pipeline), GFP_KERNEL); in sof_ipc4_widget_setup_comp_pipeline()
768 if (!pipeline) in sof_ipc4_widget_setup_comp_pipeline()
771 ret = sof_update_ipc_object(scomp, pipeline, SOF_SCHED_TOKENS, swidget->tuples, in sof_ipc4_widget_setup_comp_pipeline()
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| /linux-6.12.1/Documentation/gpu/amdgpu/display/ ! |
| D | dcn-overview.rst | 6 (DCN) works, we need to start with an overview of the hardware pipeline. Below
53 pipeline is connected to the Scalable Data Port (SDP) via DCHUB; you can see
86 Display pipeline can be broken down into two components that are usually
127 AMD Hardware Pipeline
130 When discussing graphics on Linux, the **pipeline** term can sometimes be
132 when we say **pipeline**. In the DCN driver, we use the term **hardware
133 pipeline** or **pipeline** or just **pipe** as an abstraction to indicate a
135 core treats DCN blocks as individual resources, meaning we can build a pipeline
136 by taking resources for all individual hardware blocks to compose one pipeline.
139 arbitrarily assigned as needed. We have this pipeline concept for trying to
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| /linux-6.12.1/include/media/ ! |
| D | media-entity.h | 101 * struct media_pipeline - Media pipeline related information
103 * @allocated: Media pipeline allocated and freed by the framework
104 * @mdev: The media device the pipeline is part of
106 * @start_count: Media pipeline start - stop count
116 * struct media_pipeline_pad - A pad part of a media pipeline
122 * This structure associate a pad with a media pipeline. Instances of
124 * pipeline, and stored in the &media_pad.pads list. media_pipeline_stop()
233 * @pipe: Pipeline this pad belongs to. Use media_entity_pipeline() to
264 * part of the same pipeline and enabling one of the pads
997 * media_pad_is_streaming - Test if a pad is part of a streaming pipeline
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| /linux-6.12.1/drivers/gpu/drm/arm/display/komeda/ ! |
| D | komeda_pipeline.h | 21 /* pipeline component IDs */
76 * component into the display pipeline.
82 /** @pipeline: the komeda pipeline this component belongs to */
83 struct komeda_pipeline *pipeline; member
119 * pipeline.
385 * Represent a complete display pipeline and hold all functional components.
388 /** @obj: link pipeline as private obj of drm_atomic_state */
394 /** @id: pipeline id */
396 /** @avail_comps: available components mask of pipeline */
401 * When disable the pipeline, some components can not be disabled
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/amdzen4/ ! |
| D | cache.json | 448 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
454 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
460 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
466 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
472 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
478 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
484 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
490 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of type L…
496 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which hit in the L2 cache of all ty…
502 …"BriefDescription": "L2 prefetches accepted by the L2 pipeline which miss the L2 cache and hit in …
[all …]
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| /linux-6.12.1/drivers/gpu/drm/msm/adreno/ ! |
| D | adreno_gen7_0_0_snapshot.h | 306 /* Block: GRAS Cluster: A7XX_CLUSTER_GRAS Pipeline: A7XX_PIPE_BR */
316 /* Block: GRAS Cluster: A7XX_CLUSTER_GRAS Pipeline: A7XX_PIPE_BV */
326 /* Block: PC Cluster: A7XX_CLUSTER_FE Pipeline: A7XX_PIPE_BR */
334 /* Block: PC Cluster: A7XX_CLUSTER_FE Pipeline: A7XX_PIPE_BV */
342 /* Block: RB_RAC Cluster: A7XX_CLUSTER_PS Pipeline: A7XX_PIPE_BR */
358 /* Block: RB_RBP Cluster: A7XX_CLUSTER_PS Pipeline: A7XX_PIPE_BR */
373 /* Block: SP Cluster: A7XX_CLUSTER_SP_PS Pipeline: A7XX_PIPE_BR Location: HLSQ_STATE */
384 /* Block: SP Cluster: A7XX_CLUSTER_SP_PS Pipeline: A7XX_PIPE_LPAC Location: HLSQ_STATE */
393 /* Block: SP Cluster: A7XX_CLUSTER_SP_PS Pipeline: A7XX_PIPE_BR Location: HLSQ_DP */
400 /* Block: SP Cluster: A7XX_CLUSTER_SP_PS Pipeline: A7XX_PIPE_LPAC Location: HLSQ_DP */
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| /linux-6.12.1/sound/soc/sof/intel/ ! |
| D | hda-dai-ops.c | 130 struct sof_ipc4_pipeline *pipeline; in hda_ipc4_get_hext_stream() local
137 pipeline = pipe_widget->private; in hda_ipc4_get_hext_stream()
139 /* mark pipeline so that it can be skipped during FE trigger */ in hda_ipc4_get_hext_stream()
140 pipeline->skip_during_fe_trigger = true; in hda_ipc4_get_hext_stream()
301 struct sof_ipc4_pipeline *pipeline; in hda_ipc4_pre_trigger() local
309 pipeline = pipe_widget->private; in hda_ipc4_pre_trigger()
328 pipeline->state = SOF_IPC4_PIPE_PAUSED; in hda_ipc4_pre_trigger()
378 struct sof_ipc4_pipeline *pipeline; in hda_ipc4_post_trigger() local
386 pipeline = pipe_widget->private; in hda_ipc4_post_trigger()
395 if (pipeline->state != SOF_IPC4_PIPE_PAUSED) { in hda_ipc4_post_trigger()
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