Lines Matching full:pipeline
5 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered a TLB miss or…
55 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
60 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline finished at dispatch a…
85 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
90 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the s…
95 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a lwsync waiting t…
135 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was dispatched but not…
150 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the L…
155 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline required special handl…
165 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
170 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
205 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the V…
215 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a stcx waiting for…
230 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a TLBIE instructio…
235 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in any u…
240 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline (NTC) finishes. Note t…
270 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting to finish …
275 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a store instructio…
280 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered a TLB miss an…
295 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a store whose cach…
300 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for the no…
305 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a simple fixed poi…
310 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
315 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was not allowed to com…
330 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
335 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was finishing a load a…
380 … are the cycles between finish and completion for the oldest pair of instructions in the pipeline."
390 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered an ERAT miss …
395 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
400 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline cannot complete becaus…
405 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
415 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a load instruction…
420 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a PTESYNC instruct…
425 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the B…
430 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a hwsync waiting f…
435 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a TLBIEL instructi…
450 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline completed without an n…