Searched full:ppv2 (Results 1 – 11 of 11) sorted by relevance
| /linux-6.12.1/drivers/net/ethernet/marvell/mvpp2/ |
| D | mvpp2.h | 3 * Definitions for Marvell PPv2 network controller for Armada 375 SoC.
485 /* Per-port XGMAC registers. PPv2.2 and PPv2.3, only for GOP port 0,
522 /* SMI registers. PPv2.2 and PPv2.3, relative to priv->iface_base. */
526 /* TAI registers, PPv2.2 only, relative to priv->iface_base */
598 /* XPCS registers.PPv2.2 and PPv2.3 */
609 /* FCA registers. PPv2.2 and PPv2.3 */
618 /* XPCS registers. PPv2.2 and PPv2.3 */
625 /* PTP registers. PPv2.2 only */
1034 /* On PPv2.2 and PPv2.3, each "software thread" can access the base
1041 /* On PPv2.2 and PPv2.3, some port control registers are located into
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| D | Makefile | 3 # Makefile for the Marvell PPv2 driver.
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| D | mvpp2_main.c | 3 * Driver for Marvell PPv2 network controller for Armada 375 SoC.
335 /* According to the PPv2.2 datasheet and our experiments on in mvpp2_get_nrxqs()
336 * PPv2.1, RX queues have an allocation granularity of 4 (when in mvpp2_get_nrxqs()
337 * more than a single one on PPv2.2). in mvpp2_get_nrxqs()
397 /* PPv2.1 needs 8 bytes per buffer pointer, PPv2.2 and PPv2.3 needs 16 in mvpp2_bm_pool_create()
1777 * The PHY mode used by the PPv2 driver comes from the network subsystem, while
1783 * "PPv2 (2500BaseX) - COMPHY (2500SGMII)" are valid.
5820 /* Used for PPv2.1, or PPv2.2 with the old Device Tree binding that
5938 /* Handle the more complicated PPv2.2 and PPv2.3 case */ in mvpp2_rx_irqs_setup()
6114 * - PPv2.1: there are no such interrupts.
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| D | mvpp2_cls.h | 3 * RSS and Classifier definitions for Marvell PPv2 Network Controller
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| D | mvpp2_prs.h | 3 * Header Parser definitions for Marvell PPv2 Network Controller
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| D | mvpp2_debugfs.c | 3 * Driver for Marvell PPv2 network controller for Armada 375 SoC.
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| D | mvpp2_cls.c | 3 * RSS and Classifier helpers for Marvell PPv2 Network Controller
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| D | mvpp2_prs.c | 3 * Header Parser helpers for Marvell PPv2 Network Controller
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| /linux-6.12.1/drivers/clk/mvebu/ |
| D | cp110-system-controller.c | 15 * - PPv2 core (1/3 PLL0)
90 [CP110_GATE_PPV2] = "ppv2",
258 /* PPv2 is PLL0/3 */ in cp110_syscon_common_probe()
259 ppv2_name = ap_cp_unique_name(dev, syscon_node, "ppv2-core"); in cp110_syscon_common_probe()
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| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | marvell,pp2.yaml | 14 Marvell Armada 375 Ethernet Controller (PPv2.1)
15 Marvell Armada 7K/8K Ethernet Controller (PPv2.2)
16 Marvell CN913X Ethernet Controller (PPv2.3)
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| /linux-6.12.1/Documentation/devicetree/bindings/arm/marvell/ |
| D | cp110-system-controller.txt | 36 - 0 1 PPv2 core
45 - 1 3 PPv2
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