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/linux-6.12.1/drivers/pinctrl/renesas/
DMakefile4 obj-$(CONFIG_PINCTRL_PFC_EMEV2) += pfc-emev2.o
5 obj-$(CONFIG_PINCTRL_PFC_R8A73A4) += pfc-r8a73a4.o
6 obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o
7 obj-$(CONFIG_PINCTRL_PFC_R8A7742) += pfc-r8a7790.o
8 obj-$(CONFIG_PINCTRL_PFC_R8A7743) += pfc-r8a7791.o
9 obj-$(CONFIG_PINCTRL_PFC_R8A7744) += pfc-r8a7791.o
10 obj-$(CONFIG_PINCTRL_PFC_R8A7745) += pfc-r8a7794.o
11 obj-$(CONFIG_PINCTRL_PFC_R8A77470) += pfc-r8a77470.o
12 obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
13 obj-$(CONFIG_PINCTRL_PFC_R8A774B1) += pfc-r8a77965.o
[all …]
Dpinctrl.c8 #define DRV_NAME "sh-pfc"
39 struct sh_pfc *pfc; member
49 return pmx->pfc->info->nr_groups; in sh_pfc_get_groups_count()
57 return pmx->pfc->info->groups[selector].name; in sh_pfc_get_group_name()
65 *pins = pmx->pfc->info->groups[selector].pins; in sh_pfc_get_group_pins()
66 *num_pins = pmx->pfc->info->groups[selector].nr_pins; in sh_pfc_get_group_pins()
104 struct device *dev = pmx->pfc->dev; in sh_pfc_dt_subnode_to_map()
242 struct device *dev = pmx->pfc->dev; in sh_pfc_dt_node_to_map()
294 return pmx->pfc->info->nr_functions; in sh_pfc_get_functions_count()
302 return pmx->pfc->info->functions[selector].name; in sh_pfc_get_function_name()
[all …]
Dgpio.c29 struct sh_pfc *pfc; member
40 return chip->pfc; in gpio_to_pfc()
47 int idx = sh_pfc_get_pin_index(chip->pfc, offset); in gpio_get_data_reg()
74 struct sh_pfc *pfc = chip->pfc; in gpio_setup_data_reg() local
76 const struct sh_pfc_pin *pin = &pfc->info->pins[idx]; in gpio_setup_data_reg()
81 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_reg()
96 struct sh_pfc *pfc = chip->pfc; in gpio_setup_data_regs() local
103 for (i = 0; pfc->info->data_regs[i].reg_width; ++i) in gpio_setup_data_regs()
106 chip->regs = devm_kcalloc(pfc->dev, i, sizeof(*chip->regs), in gpio_setup_data_regs()
111 for (i = 0, dreg = pfc->info->data_regs; dreg->reg_width; ++i, ++dreg) { in gpio_setup_data_regs()
[all …]
Dcore.c11 #define DRV_NAME "sh-pfc"
30 static int sh_pfc_map_resources(struct sh_pfc *pfc, in sh_pfc_map_resources() argument
54 windows = devm_kcalloc(pfc->dev, num_windows, sizeof(*windows), in sh_pfc_map_resources()
59 pfc->num_windows = num_windows; in sh_pfc_map_resources()
60 pfc->windows = windows; in sh_pfc_map_resources()
63 irqs = devm_kcalloc(pfc->dev, num_irqs, sizeof(*irqs), in sh_pfc_map_resources()
68 pfc->num_irqs = num_irqs; in sh_pfc_map_resources()
69 pfc->irqs = irqs; in sh_pfc_map_resources()
87 static void __iomem *sh_pfc_phys_to_virt(struct sh_pfc *pfc, u32 reg) in sh_pfc_phys_to_virt() argument
94 for (i = 0; i < pfc->num_windows; i++) { in sh_pfc_phys_to_virt()
[all …]
Dcore.h19 int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
21 int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
26 u32 sh_pfc_read(struct sh_pfc *pfc, u32 reg);
27 void sh_pfc_write(struct sh_pfc *pfc, u32 reg, u32 data);
29 int sh_pfc_get_pin_index(struct sh_pfc *pfc, unsigned int pin);
30 int sh_pfc_config_mux(struct sh_pfc *pfc, unsigned mark, int pinmux_type);
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Drenesas,pfc.yaml4 $id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml#
13 The Pin Function Controller (PFC) is a Pin Mux/Config controller.
19 - renesas,pfc-emev2 # EMMA Mobile EV2
20 - renesas,pfc-r8a73a4 # R-Mobile APE6
21 - renesas,pfc-r8a7740 # R-Mobile A1
22 - renesas,pfc-r8a7742 # RZ/G1H
23 - renesas,pfc-r8a7743 # RZ/G1M
24 - renesas,pfc-r8a7744 # RZ/G1N
25 - renesas,pfc-r8a7745 # RZ/G1E
26 - renesas,pfc-r8a77470 # RZ/G1C
[all …]
/linux-6.12.1/drivers/net/ethernet/freescale/dpaa2/
Ddpaa2-eth-dcb.c7 struct ieee_pfc *pfc) in dpaa2_eth_dcbnl_ieee_getpfc() argument
14 memcpy(pfc, &priv->pfc, sizeof(priv->pfc)); in dpaa2_eth_dcbnl_ieee_getpfc()
15 pfc->pfc_cap = dpaa2_eth_tc_count(priv); in dpaa2_eth_dcbnl_ieee_getpfc()
42 * disables generation of PFC frames for them in dpaa2_eth_set_pfc_cn()
62 struct ieee_pfc *pfc) in dpaa2_eth_dcbnl_ieee_setpfc() argument
69 if (pfc->mbc || pfc->delay) in dpaa2_eth_dcbnl_ieee_setpfc()
72 /* If same PFC enabled mask, nothing to do */ in dpaa2_eth_dcbnl_ieee_setpfc()
73 if (priv->pfc.pfc_en == pfc->pfc_en) in dpaa2_eth_dcbnl_ieee_setpfc()
76 /* We allow PFC configuration even if it won't have any effect until in dpaa2_eth_dcbnl_ieee_setpfc()
81 netdev_warn(net_dev, "Pause support must be enabled in order for PFC to work!\n"); in dpaa2_eth_dcbnl_ieee_setpfc()
[all …]
/linux-6.12.1/drivers/net/ethernet/amd/xgbe/
Dxgbe-dcb.c211 struct ieee_pfc *pfc) in xgbe_dcb_ieee_getpfc() argument
215 /* Set number of supported PFC traffic classes */ in xgbe_dcb_ieee_getpfc()
216 pfc->pfc_cap = pdata->hw_feat.tc_cnt; in xgbe_dcb_ieee_getpfc()
218 if (pdata->pfc) { in xgbe_dcb_ieee_getpfc()
219 pfc->pfc_en = pdata->pfc->pfc_en; in xgbe_dcb_ieee_getpfc()
220 pfc->mbc = pdata->pfc->mbc; in xgbe_dcb_ieee_getpfc()
221 pfc->delay = pdata->pfc->delay; in xgbe_dcb_ieee_getpfc()
228 struct ieee_pfc *pfc) in xgbe_dcb_ieee_setpfc() argument
234 pfc->pfc_cap, pfc->pfc_en, pfc->mbc, pfc->delay); in xgbe_dcb_ieee_setpfc()
236 /* Check PFC for supported number of traffic classes */ in xgbe_dcb_ieee_setpfc()
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/i40e/
Di40e_dcb_nl.c13 * i40e_get_pfc_delay - retrieve PFC Link Delay
15 * @delay: holds the PFC Link delay value
17 * Returns PFC Link Delay from the PRTDCB_GENC.PFCLDA
66 * i40e_dcbnl_ieee_getpfc - retrieve local IEEE PFC configuration
68 * @pfc: structure to hold the PFC information
70 * Returns local IEEE PFC configuration
73 struct ieee_pfc *pfc) in i40e_dcbnl_ieee_getpfc() argument
84 pfc->pfc_cap = dcbxcfg->pfc.pfccap; in i40e_dcbnl_ieee_getpfc()
85 pfc->pfc_en = dcbxcfg->pfc.pfcenable; in i40e_dcbnl_ieee_getpfc()
86 pfc->mbc = dcbxcfg->pfc.mbc; in i40e_dcbnl_ieee_getpfc()
[all …]
/linux-6.12.1/arch/arm/boot/dts/renesas/
Dr8a7740-armadillo800eva.dts49 gpio = <&pfc 75 GPIO_ACTIVE_HIGH>;
61 enable-gpios = <&pfc 74 GPIO_ACTIVE_HIGH>;
62 gpios = <&pfc 17 GPIO_ACTIVE_HIGH>;
81 gpios = <&pfc 99 GPIO_ACTIVE_LOW>;
88 gpios = <&pfc 100 GPIO_ACTIVE_LOW>;
94 gpios = <&pfc 97 GPIO_ACTIVE_LOW>;
100 gpios = <&pfc 98 GPIO_ACTIVE_LOW>;
109 gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
113 gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
117 gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
[all …]
Dr8a73a4-ape6evm.dts51 gpio = <&pfc 76 GPIO_ACTIVE_HIGH>;
75 gpios = <&pfc 28 GPIO_ACTIVE_HIGH>;
79 gpios = <&pfc 126 GPIO_ACTIVE_HIGH>;
83 gpios = <&pfc 132 GPIO_ACTIVE_HIGH>;
87 gpios = <&pfc 232 GPIO_ACTIVE_HIGH>;
91 gpios = <&pfc 250 GPIO_ACTIVE_HIGH>;
95 gpios = <&pfc 288 GPIO_ACTIVE_HIGH>;
107 gpios = <&pfc 324 GPIO_ACTIVE_LOW>;
114 gpios = <&pfc 325 GPIO_ACTIVE_LOW>;
120 gpios = <&pfc 326 GPIO_ACTIVE_LOW>;
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/fm10k/
Dfm10k_dcbnl.c73 * fm10k_dcbnl_ieee_getpfc - get the PFC configuration for the device
75 * @pfc: PFC structure to push configuration to
77 static int fm10k_dcbnl_ieee_getpfc(struct net_device *dev, struct ieee_pfc *pfc) in fm10k_dcbnl_ieee_getpfc() argument
82 pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS; in fm10k_dcbnl_ieee_getpfc()
83 pfc->pfc_en = interface->pfc_en; in fm10k_dcbnl_ieee_getpfc()
89 * fm10k_dcbnl_ieee_setpfc - set the PFC configuration for the device
91 * @pfc: PFC structure to pull configuration from
93 static int fm10k_dcbnl_ieee_setpfc(struct net_device *dev, struct ieee_pfc *pfc) in fm10k_dcbnl_ieee_setpfc() argument
97 /* record PFC configuration to interface */ in fm10k_dcbnl_ieee_setpfc()
98 interface->pfc_en = pfc->pfc_en; in fm10k_dcbnl_ieee_setpfc()
/linux-6.12.1/drivers/net/ethernet/intel/ice/
Dice_dcb_nl.c221 * ice_get_pfc_delay - Retrieve PFC Link Delay
223 * @delay: holds the PFC Link Delay value
234 * ice_dcbnl_getpfc - retrieve local IEEE PFC config
236 * @pfc: struct to hold PFC info
238 static int ice_dcbnl_getpfc(struct net_device *netdev, struct ieee_pfc *pfc) in ice_dcbnl_getpfc() argument
246 pfc->pfc_cap = dcbxcfg->pfc.pfccap; in ice_dcbnl_getpfc()
247 pfc->pfc_en = dcbxcfg->pfc.pfcena; in ice_dcbnl_getpfc()
248 pfc->mbc = dcbxcfg->pfc.mbc; in ice_dcbnl_getpfc()
249 ice_get_pfc_delay(&pf->hw, &pfc->delay); in ice_dcbnl_getpfc()
252 pfc->requests[i] = pf->stats.priority_xoff_tx[i]; in ice_dcbnl_getpfc()
[all …]
Dice_dcb.c248 * @tlv: IEEE 802.1Qaz PFC CFG TLV
249 * @dcbcfg: Local store to update PFC CFG data
251 * Parses IEEE 802.1Qaz PFC CFG TLV
260 * |will-|MBC | Re- | PFC | PFC Enable | in ice_parse_ieee_pfccfg_tlv()
265 dcbcfg->pfc.willing = FIELD_GET(ICE_IEEE_PFC_WILLING_M, buf[0]); in ice_parse_ieee_pfccfg_tlv()
266 dcbcfg->pfc.mbc = FIELD_GET(ICE_IEEE_PFC_MBC_M, buf[0]); in ice_parse_ieee_pfccfg_tlv()
267 dcbcfg->pfc.pfccap = FIELD_GET(ICE_IEEE_PFC_CAP_M, buf[0]); in ice_parse_ieee_pfccfg_tlv()
268 dcbcfg->pfc.pfcena = buf[1]; in ice_parse_ieee_pfccfg_tlv()
418 * @tlv: CEE DCBX PFC CFG TLV
419 * @dcbcfg: Local store to update PFC CFG data
[all …]
/linux-6.12.1/drivers/net/ethernet/marvell/octeontx2/nic/
Dotx2_dcbnl.c19 "Increase number of tx queues from %d to %d to support PFC.\n", in otx2_check_pfc_config()
37 /* Either PFC bit is not set in otx2_pfc_txschq_config()
48 "%s configure PFC tx schq for lvl:%d, prio:%d failed!\n", in otx2_pfc_txschq_config()
119 dev_err(pfvf->dev, "%s failed to allocate PFC TX schedulers\n", __func__); in otx2_pfc_txschq_alloc()
132 /* free PFC TLx nodes */ in otx2_pfc_txschq_stop_one()
224 "%s failed to stop PFC tx schedulers for priority: %d\n", in otx2_pfc_txschq_update()
233 /* Either PFC bit is not set in otx2_pfc_txschq_update()
244 "%s failed to allocate PFC tx schedulers for priority: %d\n", in otx2_pfc_txschq_update()
253 dev_err(pfvf->dev, "%s failed PFC Tx schq sq:%d mapping", __func__, prio); in otx2_pfc_txschq_update()
281 dev_err(pfvf->dev, "%s failed to stop PFC TX schedulers\n", __func__); in otx2_pfc_txschq_stop()
[all …]
/linux-6.12.1/tools/testing/selftests/drivers/net/mlxsw/
Dqos_pfc.sh11 # to a small pool ("PFC pool"). The traffic is forwarded to $swp2, which is
12 # shaped, and thus the PFC pool eventually fills, therefore the headroom
19 # - eventually the PFC pool gets some traffic out, headroom therefore gets some
21 # gradually forwarded from the overflow pool, through the PFC pool, out of
24 # - if PFC works, all lossless flow packets that ingress through $swp1 should
43 # | | PFC:enabled=1 | | PFC:enabled=1 |
69 # iPOOL2+ePOOL6 are PFC pools.
154 # PFC pools. As per the writ, the size of egress PFC pool should be
209 # Need to enable PFC so that PAUSE takes effect. Therefore need to put
214 dcb pfc set dev $swp3 prio-pfc all:off 1:on
[all …]
Dqos_headroom.sh40 # whether priority X has PFC enabled (the value is 1) or disabled (0).
41 dcb -j pfc show dev $swp |
80 check_err $? "prio PFC is '$current', expected '$expect'"
192 log_test "Buffer size sans PFC"
196 dcb pfc set dev $swp prio-pfc all:off 5:on 6:on 7:on delay 0
209 log_test "PFC: Cable length 0"
213 dcb pfc set dev $swp delay 1000
220 log_test "PFC: Cable length 1000"
224 dcb pfc set dev $swp prio-pfc all:off delay 0
238 log_test "PFC: Restore defaults"
/linux-6.12.1/drivers/net/ethernet/qlogic/qed/
Dqed_dcbx.c522 u32 pfc, struct qed_dcbx_params *p_params) in qed_dcbx_get_pfc_data() argument
526 p_params->pfc.willing = QED_MFW_GET_FIELD(pfc, DCBX_PFC_WILLING); in qed_dcbx_get_pfc_data()
527 p_params->pfc.max_tc = QED_MFW_GET_FIELD(pfc, DCBX_PFC_CAPS); in qed_dcbx_get_pfc_data()
528 p_params->pfc.enabled = QED_MFW_GET_FIELD(pfc, DCBX_PFC_ENABLED); in qed_dcbx_get_pfc_data()
529 pfc_map = QED_MFW_GET_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP); in qed_dcbx_get_pfc_data()
530 p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0); in qed_dcbx_get_pfc_data()
531 p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1); in qed_dcbx_get_pfc_data()
532 p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2); in qed_dcbx_get_pfc_data()
533 p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3); in qed_dcbx_get_pfc_data()
534 p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4); in qed_dcbx_get_pfc_data()
[all …]
/linux-6.12.1/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum_dcb.c481 struct ieee_pfc *my_pfc = mlxsw_sp_port->dcb.pfc; in mlxsw_sp_port_pfc_cnt_get()
498 struct ieee_pfc *pfc) in mlxsw_sp_dcbnl_ieee_getpfc() argument
506 netdev_err(dev, "Failed to get PFC count for priority %d\n", in mlxsw_sp_dcbnl_ieee_getpfc()
512 memcpy(pfc, mlxsw_sp_port->dcb.pfc, sizeof(*pfc)); in mlxsw_sp_dcbnl_ieee_getpfc()
518 struct ieee_pfc *pfc) in mlxsw_sp_port_pfc_set() argument
525 mlxsw_reg_pfcc_prio_pack(pfcc_pl, pfc->pfc_en); in mlxsw_sp_port_pfc_set()
532 struct ieee_pfc *pfc) in mlxsw_sp_dcbnl_ieee_setpfc() argument
541 if (pause_en && pfc->pfc_en) { in mlxsw_sp_dcbnl_ieee_setpfc()
549 if (pfc->pfc_en) in mlxsw_sp_dcbnl_ieee_setpfc()
550 hdroom.delay_bytes = DIV_ROUND_UP(pfc->delay, BITS_PER_BYTE); in mlxsw_sp_dcbnl_ieee_setpfc()
[all …]
/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/
Den_dcbnl.c343 struct ieee_pfc *pfc) in mlx5e_dcbnl_ieee_getpfc() argument
350 pfc->pfc_cap = mlx5_max_tc(mdev) + 1; in mlx5e_dcbnl_ieee_getpfc()
352 pfc->requests[i] = PPORT_PER_PRIO_GET(pstats, i, tx_pause); in mlx5e_dcbnl_ieee_getpfc()
353 pfc->indications[i] = PPORT_PER_PRIO_GET(pstats, i, rx_pause); in mlx5e_dcbnl_ieee_getpfc()
357 pfc->delay = priv->dcbx.cable_len; in mlx5e_dcbnl_ieee_getpfc()
359 return mlx5_query_port_pfc(mdev, &pfc->pfc_en, NULL); in mlx5e_dcbnl_ieee_getpfc()
363 struct ieee_pfc *pfc) in mlx5e_dcbnl_ieee_setpfc() argument
375 if (pfc->pfc_en != curr_pfc_en) { in mlx5e_dcbnl_ieee_setpfc()
376 ret = mlx5_set_port_pfc(mdev, pfc->pfc_en, pfc->pfc_en); in mlx5e_dcbnl_ieee_setpfc()
383 if (pfc->delay && in mlx5e_dcbnl_ieee_setpfc()
[all …]
/linux-6.12.1/drivers/media/platform/mediatek/vcodec/decoder/vdec/
Dvdec_vp9_req_lat_if.c931 static void vdec_vp9_slice_setup_ref_idx(struct vdec_vp9_slice_pfc *pfc, in vdec_vp9_slice_setup_ref_idx() argument
934 pfc->ref_idx[0] = hdr->last_frame_ts; in vdec_vp9_slice_setup_ref_idx()
935 pfc->ref_idx[1] = hdr->golden_frame_ts; in vdec_vp9_slice_setup_ref_idx()
936 pfc->ref_idx[2] = hdr->alt_frame_ts; in vdec_vp9_slice_setup_ref_idx()
940 struct vdec_vp9_slice_pfc *pfc) in vdec_vp9_slice_setup_pfc() argument
954 vsi = &pfc->vsi; in vdec_vp9_slice_setup_pfc()
969 vdec_vp9_slice_setup_ref_idx(pfc, hdr); in vdec_vp9_slice_setup_pfc()
971 pfc->seq = instance->seq; in vdec_vp9_slice_setup_pfc()
1152 struct vdec_vp9_slice_pfc *pfc) in vdec_vp9_slice_setup_lat() argument
1154 struct vdec_vp9_slice_vsi *vsi = &pfc->vsi; in vdec_vp9_slice_setup_lat()
[all …]
/linux-6.12.1/arch/sh/kernel/cpu/sh4a/
Dpinmux-sh7734.c3 * SH7734 processor support - PFC hardware block
12 #include <cpu/pfc.h>
15 [0] = { /* PFC */
29 return sh_pfc_register("pfc-sh7734", sh7734_pfc_resources, in plat_pinmux_setup()
/linux-6.12.1/drivers/net/ethernet/intel/ixgbe/
Dixgbe_dcb_nl.c493 /* No IEEE PFC settings available */ in ixgbe_dcbnl_ieee_getets()
559 struct ieee_pfc *pfc) in ixgbe_dcbnl_ieee_getpfc() argument
565 pfc->pfc_cap = adapter->dcb_cfg.num_tcs.pfc_tcs; in ixgbe_dcbnl_ieee_getpfc()
567 /* No IEEE PFC settings available */ in ixgbe_dcbnl_ieee_getpfc()
571 pfc->pfc_en = my_pfc->pfc_en; in ixgbe_dcbnl_ieee_getpfc()
572 pfc->mbc = my_pfc->mbc; in ixgbe_dcbnl_ieee_getpfc()
573 pfc->delay = my_pfc->delay; in ixgbe_dcbnl_ieee_getpfc()
576 pfc->requests[i] = adapter->stats.pxoffrxc[i]; in ixgbe_dcbnl_ieee_getpfc()
577 pfc->indications[i] = adapter->stats.pxofftxc[i]; in ixgbe_dcbnl_ieee_getpfc()
584 struct ieee_pfc *pfc) in ixgbe_dcbnl_ieee_setpfc() argument
[all …]
/linux-6.12.1/drivers/net/ethernet/mellanox/mlx4/
Den_dcb_nl.c401 struct ieee_pfc *pfc) in mlx4_en_dcbnl_ieee_getpfc() argument
405 pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS; in mlx4_en_dcbnl_ieee_getpfc()
406 pfc->pfc_en = priv->prof->tx_ppp; in mlx4_en_dcbnl_ieee_getpfc()
412 struct ieee_pfc *pfc) in mlx4_en_dcbnl_ieee_setpfc() argument
421 pfc->pfc_cap, in mlx4_en_dcbnl_ieee_setpfc()
422 pfc->pfc_en, in mlx4_en_dcbnl_ieee_setpfc()
423 pfc->mbc, in mlx4_en_dcbnl_ieee_setpfc()
424 pfc->delay); in mlx4_en_dcbnl_ieee_setpfc()
426 rx_pause = prof->rx_pause && !pfc->pfc_en; in mlx4_en_dcbnl_ieee_setpfc()
427 tx_pause = prof->tx_pause && !pfc->pfc_en; in mlx4_en_dcbnl_ieee_setpfc()
[all …]
/linux-6.12.1/include/uapi/linux/
Ddcbnl.h146 /* This structure contains the IEEE 802.1Qaz PFC managed object
149 * that may simultaneously have PFC enabled.
150 * @pfc_en: bitmap indicating pfc enabled traffic classes
154 * @requests: count of the sent pfc frames
155 * @indications: count of the received pfc frames
200 * struct cee_pfc - CEE PFC managed object
202 * @willing: willing bit in the PFC tlv
203 * @error: error bit in the PFC tlv
204 * @pfc_en: bitmap indicating pfc enabled traffic classes
360 * @DCB_ATTR_PFC_STATE: enable state of PFC in the device (NLA_U8)
[all …]

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