/linux-6.12.1/drivers/net/ethernet/broadcom/bnx2x/ |
D | bnx2x_fw_defs.h | 17 (IRO[151].base + ((assertListEntry) * IRO[151].m1)) 19 (IRO[157].base + (((pfId)>>1) * IRO[157].m1) + (((pfId)&1) * \ 22 (IRO[158].base + (((pfId)>>1) * IRO[158].m1) + (((pfId)&1) * \ 25 (IRO[163].base + ((funcId) * IRO[163].m1)) 27 (IRO[153].base + ((funcId) * IRO[153].m1)) 29 (IRO[143].base + ((hcIndex) * IRO[143].m1) + ((sbId) * IRO[143].m2)) 31 (IRO[142].base + (((hcIndex)>>2) * IRO[142].m1) + (((hcIndex)&3) \ 35 (IRO[324].base + ((pfId) * IRO[324].m1)) 37 (IRO[325].base + ((pfId) * IRO[325].m1)) 39 (IRO[317].base + ((pfId) * IRO[317].m1) + ((iscsiEqId) * IRO[317].m2)) [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/arm/ |
D | apple.yaml | 15 This currently includes devices based on the "M1" SoC: 17 - Mac mini (M1, 2020) 18 - MacBook Pro (13-inch, M1, 2020) 19 - MacBook Air (M1, 2020) 20 - iMac (24-inch, M1, 2021) 28 And devices based on the "M1 Pro", "M1 Max" and "M1 Ultra" SoCs: 30 - MacBook Pro (14-inch, M1 Pro, 2021) 31 - MacBook Pro (14-inch, M1 Max, 2021) 32 - MacBook Pro (16-inch, M1 Pro, 2021) 33 - MacBook Pro (16-inch, M1 Max, 2021) [all …]
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/linux-6.12.1/drivers/net/ethernet/qlogic/qed/ |
D | qed_iro_hsi.h | 87 + ((core_tx_stats_id) * IRO[IRO_CORE_LL2_PSTORM_PER_QUEUE_STAT].m1)) 94 + ((core_rx_queue_id) * IRO[IRO_CORE_LL2_TSTORM_PER_QUEUE_STAT].m1)) 101 + ((core_rx_queue_id) * IRO[IRO_CORE_LL2_USTORM_PER_QUEUE_STAT].m1)) 108 + ((pf_id) * IRO[IRO_ETH_RX_RATE_LIMIT].m1)) 114 + ((queue_id) * IRO[IRO_MSTORM_ETH_PF_PRODS_GTT].m1)) 120 + ((pf_id) * IRO[IRO_MSTORM_ETH_PF_STAT].m1)) 128 + ((vf_id) * IRO[IRO_MSTORM_ETH_VF_PRODS].m1) \ 139 + ((storage_func_id) * IRO[IRO_MSTORM_ISCSI_RX_STATS].m1)) 149 + ((stat_counter_id) * IRO[IRO_MSTORM_QUEUE_STAT].m1)) 155 + ((pf_id) * IRO[IRO_MSTORM_RDMA_ASSERT_LEVEL].m1)) [all …]
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/linux-6.12.1/Documentation/i2c/ |
D | i2c-topology.rst | 63 '--------' | | mux M1 |--. .--------. 72 2. M1 locks muxes on its parent (the root adapter in this case). 73 3. M1 calls ->select to ready the mux. 74 4. M1 (presumably) does some I2C transfers as part of its select. 77 5. M1 feeds the I2C transfer from step 1 to its parent adapter as a 79 6. M1 calls ->deselect, if it has one. 81 8. M1 unlocks muxes on its parent. 142 '--------' | | mux M1 |--. .--------. 151 2. M1 locks muxes on its parent (the root adapter in this case). 152 3. M1 locks its parent adapter. [all …]
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/linux-6.12.1/tools/testing/selftests/tc-testing/tc-tests/qdiscs/ |
D | hfsc.json | 38 … "matchPattern": "class hfsc 1:1 parent 1: sc m1 0bit d 0us m2 20Kbit ul m1 0bit d 0us m2 10Kbit", 60 …"matchPattern": "class hfsc 1:1 parent 1: sc m1 2464Kbit d 5ms m2 10Kbit ul m1 0bit d 0us m2 10Kbi… 82 … "matchPattern": "class hfsc 1:1 parent 1: rt m1 0bit d 0us m2 20Kbit ls m1 0bit d 0us m2 10Kbit", 104 …"matchPattern": "class hfsc 1:1 parent 1: rt m1 2464Kbit d 5ms m2 10Kbit ls m1 0bit d 0us m2 10Kbi… 167 … "matchPattern": "class hfsc 1:1 parent 1: sc m1 0bit d 0us m2 8bit.*rt m1 0bit d 0us m2 8bit",
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/linux-6.12.1/tools/perf/tests/shell/ |
D | test_brstack.sh | 39 grep -E -m1 "^brstack_bench\+[^ ]*/brstack_foo\+[^ ]*/IND_CALL/.*$" $TMPDIR/perf.script 40 grep -E -m1 "^brstack_foo\+[^ ]*/brstack_bar\+[^ ]*/CALL/.*$" $TMPDIR/perf.script 41 grep -E -m1 "^brstack_bench\+[^ ]*/brstack_foo\+[^ ]*/CALL/.*$" $TMPDIR/perf.script 42 grep -E -m1 "^brstack_bench\+[^ ]*/brstack_bar\+[^ ]*/CALL/.*$" $TMPDIR/perf.script 43 grep -E -m1 "^brstack_bar\+[^ ]*/brstack_foo\+[^ ]*/RET/.*$" $TMPDIR/perf.script 44 grep -E -m1 "^brstack_foo\+[^ ]*/brstack_bench\+[^ ]*/RET/.*$" $TMPDIR/perf.script 45 grep -E -m1 "^brstack_bench\+[^ ]*/brstack_bench\+[^ ]*/COND/.*$" $TMPDIR/perf.script 46 grep -E -m1 "^brstack\+[^ ]*/brstack\+[^ ]*/UNCOND/.*$" $TMPDIR/perf.script
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
D | nv40.c | 64 int M1 = (coef & 0x000000ff) >> 0; in read_pll_2() local 68 if ((ctrl & 0x80000000) && M1) { in read_pll_2() 69 khz = ref * N1 / M1; in read_pll_2() 125 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll() argument 138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll() 151 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local 156 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc() 162 clk->npll_coef = (N1 << 8) | M1; in nv40_clk_calc() 165 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc() 171 &N1, &M1, NULL, NULL, &log2P); in nv40_clk_calc() [all …]
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D | pllnv04.c | 151 int M1, N1, M2, N2, log2P; in getMNP_double() local 164 for (M1 = minM1; M1 <= maxM1; M1++) { in getMNP_double() 165 if (crystal/M1 < minU1) in getMNP_double() 167 if (crystal/M1 > maxU1) in getMNP_double() 171 calcclk1 = crystal * N1 / M1; in getMNP_double() 212 *pM1 = M1; in getMNP_double() 228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc() argument 233 ret = getMNP_single(subdev, info, freq, N1, M1, P); in nv04_pll_calc() 239 ret = getMNP_double(subdev, info, freq, N1, M1, N2, M2, P); in nv04_pll_calc()
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D | nv04.c | 35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local 36 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc() 40 pv->M1 = M1; in nv04_clk_pll_calc()
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/linux-6.12.1/arch/arm64/boot/dts/ti/ |
D | k3-am642-hummingboard-t.dts | 83 * - select: 0 = USB-3 (M2); 1 = PCIE (M1) 100 m1-m2-w-disable1-hog { 104 line-name = "m1-m2-pcie-w-disable1"; 107 m1-m2-w-disable2-hog { 111 line-name = "m1-m2-pcie-w-disable2"; 116 m1-pcie-clkreq0-hog { 120 line-name = "m1-pcie-clkreq0"; 239 /* connectors M1 & M2 W_DISABLE1 */ 241 /* connectors M1 & M2 W_DISABLE2 */ 243 /* connectors M1 & M2 PERST0 (PCI Reset) */ [all …]
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/linux-6.12.1/drivers/gpu/drm/i915/display/ |
D | intel_dpll.c | 36 } dot, vco, n, m, m1, m2, p, p1; member 48 .m1 = { .min = 18, .max = 26 }, 61 .m1 = { .min = 18, .max = 26 }, 74 .m1 = { .min = 18, .max = 26 }, 87 .m1 = { .min = 8, .max = 18 }, 100 .m1 = { .min = 8, .max = 18 }, 114 .m1 = { .min = 17, .max = 23 }, 129 .m1 = { .min = 16, .max = 23 }, 142 .m1 = { .min = 17, .max = 23 }, 156 .m1 = { .min = 17, .max = 23 }, [all …]
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/linux-6.12.1/arch/mips/bcm63xx/ |
D | cpu.c | 164 unsigned int tmp, n1, n2, m1; in detect_cpu_clock() local 170 m1 = (tmp & MIPSPLLCTL_M1CPU_MASK) >> MIPSPLLCTL_M1CPU_SHIFT; in detect_cpu_clock() 173 m1 += 1; in detect_cpu_clock() 174 return (16 * 1000000 * n1 * n2) / m1; in detect_cpu_clock() 179 unsigned int tmp, n1, n2, m1; in detect_cpu_clock() local 185 m1 = (tmp & DMIPSPLLCFG_M1_MASK) >> DMIPSPLLCFG_M1_SHIFT; in detect_cpu_clock() 186 return (16 * 1000000 * n1 * n2) / m1; in detect_cpu_clock() 227 unsigned int tmp, p1, p2, ndiv, m1; in detect_cpu_clock() local 242 m1 = (tmp & DMIPSPLLDIV_6368_MDIV_MASK) >> in detect_cpu_clock() 245 return (((64 * 1000000) / p1) * p2 * ndiv) / m1; in detect_cpu_clock()
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/linux-6.12.1/arch/x86/lib/ |
D | msr.c | 66 struct msr m, m1; in __flip_bit() local 76 m1 = m; in __flip_bit() 78 m1.q |= BIT_64(bit); in __flip_bit() 80 m1.q &= ~BIT_64(bit); in __flip_bit() 82 if (m1.q == m.q) in __flip_bit() 85 err = msr_write(msr, &m1); in __flip_bit()
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/linux-6.12.1/arch/powerpc/math-emu/ |
D | udivmodti4.c | 159 _FP_W_TYPE m1, m0, n2; in _fp_udivmodti4() local 172 umul_ppmm (m1, m0, q0, d0); in _fp_udivmodti4() 174 if (m1 > n1 || (m1 == n1 && m0 > n0)) in _fp_udivmodti4() 177 sub_ddmmss (m1, m0, m1, m0, d1, d0); in _fp_udivmodti4() 183 sub_ddmmss (n1, n0, n1, n0, m1, m0); in _fp_udivmodti4()
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/linux-6.12.1/sound/soc/codecs/ |
D | es7241.c | 29 struct gpio_desc *m1; member 36 static void es7241_set_mode(struct es7241_data *priv, int m0, int m1) in es7241_set_mode() argument 43 gpiod_set_value_cansleep(priv->m1, m1); in es7241_set_mode() 281 priv->m1 = devm_gpiod_get_optional(dev, "m1", GPIOD_OUT_LOW); in es7241_probe() 282 if (IS_ERR(priv->m1)) in es7241_probe() 283 return dev_err_probe(dev, PTR_ERR(priv->m1), in es7241_probe() 284 "Failed to get 'm1' gpio"); in es7241_probe()
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/linux-6.12.1/drivers/clk/meson/ |
D | clk-dualdiv.c | 43 return DIV_ROUND_CLOSEST(parent_rate * (p->m1 + p->m2), in __dualdiv_param_to_rate() 44 p->n1 * p->m1 + p->n2 * p->m2); in __dualdiv_param_to_rate() 56 setting.m1 = meson_parm_read(clk->map, &dualdiv->m1) + 1; in meson_clk_dualdiv_recalc_rate() 121 meson_parm_write(clk->map, &dualdiv->m1, setting->m1 - 1); in meson_clk_dualdiv_set_rate()
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/linux-6.12.1/arch/arm64/crypto/ |
D | sm4-ce-gcm-core.S | 36 * input: m0, m1 39 #define PMUL_128x128(r0, r1, m0, m1, T0, T1) \ argument 40 ext T0.16b, m1.16b, m1.16b, #8; \ 41 pmull r0.1q, m0.1d, m1.1d; \ 44 pmull2 r1.1q, m0.2d, m1.2d; \ 51 #define PMUL_128x128_4x(r0, r1, m0, m1, T0, T1, \ argument 55 ext T0.16b, m1.16b, m1.16b, #8; \ 59 pmull r0.1q, m0.1d, m1.1d; \ 71 pmull2 r1.1q, m0.2d, m1.2d; \ 109 #define SM4_CRYPT_PMUL_128x128_BLK(b0, r0, r1, m0, m1, T0, T1) \ argument [all …]
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/linux-6.12.1/drivers/gpu/drm/gma500/ |
D | gma_display.c | 729 if (clock->m1 < limit->m1.min || limit->m1.max < clock->m1) in gma_pll_is_valid() 730 GMA_PLL_INVALID("m1 out of range"); in gma_pll_is_valid() 731 /* On CDV m1 is always 0 */ in gma_pll_is_valid() 732 if (clock->m1 <= clock->m2 && clock->m1 != 0) in gma_pll_is_valid() 733 GMA_PLL_INVALID("m1 <= m2 && m1 != 0"); in gma_pll_is_valid() 782 /* m1 is always 0 on CDV so the outmost loop will run just once */ in gma_find_best_pll() 783 for (clock.m1 = limit->m1.min; clock.m1 <= limit->m1.max; clock.m1++) { in gma_find_best_pll() 785 (clock.m2 < clock.m1 || clock.m1 == 0) && in gma_find_best_pll()
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/linux-6.12.1/arch/riscv/crypto/ |
D | aes-riscv64-zvkned-zvbb-zvkg.S | 92 vsetivli zero, 4, e32, m1, ta, ma 113 vsetvli zero, t0, e32, m1, ta, ma 143 vsetivli zero, 2, e64, m1, ta, ma 145 vsetivli zero, 1, e64, m1, tu, ma 163 vsetivli zero, 4, e32, m1, ta, ma 165 vsetivli zero, 1, e8, m1, tu, ma 217 vsetivli zero, 4, e32, m1, ta, ma 231 vsetivli zero, 4, e32, m1, ta, ma 256 vsetvli zero, TAIL_LEN, e8, m1, tu, ma 261 vsetivli zero, 4, e32, m1, ta, ma
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/linux-6.12.1/arch/mips/kernel/ |
D | r4k-bugs64.c | 48 int m1, m2; in mult_sh_align_mod() local 55 * what the values of m1, m2 and s are and what lv2 and p are in mult_sh_align_mod() 72 : "=r" (m1), "=r" (m2), "=r" (s) in mult_sh_align_mod() 93 : "r" (m1), "r" (m2), "r" (s), "I" (0) in mult_sh_align_mod() 95 /* We have to use single integers for m1 and m2 and a double in mult_sh_align_mod() 103 : "=r" (m1), "=r" (m2), "=r" (s) in mult_sh_align_mod() 104 : "0" (m1), "1" (m2), "2" (s)); in mult_sh_align_mod() 106 p = m1 * m2; in mult_sh_align_mod()
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | renesas,cpg-clocks.yaml | 24 - const: renesas,r8a7778-cpg-clocks # R-Car M1 88 - const: m1 118 - const: m1 213 - const: m1 242 "usb24s", "i", "zg", "b", "m1", "hp", "hpp",
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/linux-6.12.1/tools/testing/selftests/powerpc/benchmarks/ |
D | context_switch.c | 319 static unsigned long *m1, *m2; variable 325 m1 = &_m1; in futex_setup() 346 m1 = shmaddr; in futex_setup() 347 m2 = shmaddr + sizeof(*m1); in futex_setup() 350 *m1 = 0; in futex_setup() 353 mutex_lock(m1); in futex_setup() 364 mutex_unlock(m1); in futex_thread1() 376 mutex_lock(m1); in futex_thread2()
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
D | nv50.c | 41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local 50 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv50_devinit_pll_set() 60 nvkm_mask(device, info.reg + 4, 0x00ff00ff, (M1 << 16) | N1); in nv50_devinit_pll_set() 69 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set() 73 nvkm_wr32(device, info.reg + 4, (N1 << 8) | M1); in nv50_devinit_pll_set()
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/linux-6.12.1/arch/arm64/boot/dts/apple/ |
D | t8103-jxxx.dtsi | 3 * Apple M1 Mac mini, MacBook Air/Pro, iMac 24" (M1, 2020/2021) 5 * This file contains parts common to all Apple M1 devices using the t8103.
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/linux-6.12.1/drivers/media/common/saa7146/ |
D | saa7146_video.c | 107 int i, m1, m2, m3, o1, o2; in saa7146_pgtable_build() local 112 m1 = ((size + PAGE_SIZE) / PAGE_SIZE) - 1; in saa7146_pgtable_build() 117 DEB_CAP("size:%d, m1:%d, m2:%d, m3:%d, o1:%d, o2:%d\n", in saa7146_pgtable_build() 118 size, m1, m2, m3, o1, o2); in saa7146_pgtable_build() 123 m1 = ((size + PAGE_SIZE) / PAGE_SIZE) - 1; in saa7146_pgtable_build() 128 DEB_CAP("size:%d, m1:%d, m2:%d, m3:%d, o1:%d, o2:%d\n", in saa7146_pgtable_build() 129 size, m1, m2, m3, o1, o2); in saa7146_pgtable_build() 152 for (i = m1; i <= m2; i++, ptr2++) in saa7146_pgtable_build() 165 ptr1 = pt1->cpu + m1; in saa7146_pgtable_build() 166 fill = pt1->cpu[m1]; in saa7146_pgtable_build() [all …]
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