| /linux-6.12.1/drivers/gpu/drm/vc4/ |
| D | vc4_hvs.c | 7 * DOC: VC4 HVS module.
9 * The Hardware Video Scaler (HVS) is the piece of hardware that does
16 * There is a single global HVS, with multiple output FIFOs that can
18 * the HVS, while the vc4_crtc.c code actually drives HVS setup for
70 void vc4_hvs_dump_state(struct vc4_hvs *hvs) in vc4_hvs_dump_state() argument
72 struct drm_device *drm = &hvs->vc4->base; in vc4_hvs_dump_state()
73 struct drm_printer p = drm_info_printer(&hvs->pdev->dev); in vc4_hvs_dump_state()
79 drm_print_regset32(&p, &hvs->regset); in vc4_hvs_dump_state()
81 DRM_INFO("HVS ctx:\n"); in vc4_hvs_dump_state()
85 readl((u32 __iomem *)hvs->dlist + i + 0), in vc4_hvs_dump_state()
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| D | vc4_plane.c | 9 * Each DRM plane is a layer of pixels being scanned out by the HVS.
11 * At atomic modeset check time, we compute the HVS display element
15 * into the region of the HVS that it has allocated for us.
35 u32 hvs; /* HVS_FORMAT_* */ member
42 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
48 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
54 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
60 .hvs = HVS_PIXEL_FORMAT_RGBA8888,
66 .hvs = HVS_PIXEL_FORMAT_RGB565,
72 .hvs = HVS_PIXEL_FORMAT_RGB565,
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| D | vc4_crtc.c | 12 * the HVS at that timing, and feeds it to the encoder.
16 * responsible for writing the display list for the HVS channel that
85 struct vc4_hvs *hvs = vc4->hvs; in vc4_crtc_get_cob_allocation() local
105 struct vc4_hvs *hvs = vc4->hvs; in vc4_crtc_get_scanout_position() local
122 * pixelvalve by the HVS, and also the scaler status. in vc4_crtc_get_scanout_position()
132 /* Vertical position of hvs composed scanline. */ in vc4_crtc_get_scanout_position()
140 if (vc4_hvs_get_fifo_frame_count(hvs, vc4_crtc_state->assigned_channel) % 2) in vc4_crtc_get_scanout_position()
145 /* This is the offset we need for translating hvs -> pv scanout pos. */ in vc4_crtc_get_scanout_position()
151 /* HVS more than fifo_lines into frame for compositing? */ in vc4_crtc_get_scanout_position()
155 * from HVS. The actual PV scanout can not trail behind more in vc4_crtc_get_scanout_position()
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| D | vc4_kms.c | 137 struct vc4_hvs *hvs = vc4->hvs; in vc4_ctm_commit() local
211 struct vc4_hvs *hvs = vc4->hvs; in vc4_hvs_pv_muxing_commit() local
252 struct vc4_hvs *hvs = vc4->hvs; in vc5_hvs_pv_muxing_commit() local
327 struct vc4_hvs *hvs = vc4->hvs; in vc4_atomic_commit_tail() local
350 vc4_hvs_mask_underrun(hvs, vc4_crtc_state->assigned_channel); in vc4_atomic_commit_tail()
376 500000000, hvs->max_core_rate); in vc4_atomic_commit_tail()
384 WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate)); in vc4_atomic_commit_tail()
411 hvs->max_core_rate, in vc4_atomic_commit_tail()
417 * Request a clock rate based on the current HVS in vc4_atomic_commit_tail()
420 WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate)); in vc4_atomic_commit_tail()
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| D | vc4_drv.h | 91 struct vc4_hvs *hvs; member
205 * demanding in term of memory or HVS bandwidth which is hard to guess
327 /* Memory manager for the LBM memory used by HVS scaling. */
436 /* Load of this plane on the HVS block. The load is expressed in HVS
499 /* Bitmask of channels (FIFOs) of the HVS that the output can source from */
502 /* Which output of the HVS this pixelvalve sources from. */
559 * set in the HVS for that CRTC. Protected by @irq_lock, and
566 * @current_hvs_channel: HVS channel currently assigned to the
634 readl(hvs->regs + (offset)); \
640 writel(val, hvs->regs + (offset)); \
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| D | vc4_drv.c | 277 { .compatible = "brcm,bcm2711-hvs" },
278 { .compatible = "brcm,bcm2835-hvs" },
419 * but after the HVS to set the possible_crtc field properly
420 * - The HDMI driver needs to be bound after the HVS so that we can
421 * lookup the HVS maximum core clock rate and figure out if we
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| D | vc4_regs.h | 221 /* Global register for clock gating the HVS */
399 /* Last pixel in the COB (display FIFO memory) allocated to this HVS
405 /* First pixel in the COB (display FIFO memory) allocated to this HVS
494 /* Slave addresses for DMAing from HVS composition output to other
819 /* HVS display list information. */
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| D | vc4_txp.c | 50 /* Pre-rotation width/height of the image. Must match HVS config.
133 /* Request odd field from HVS. */
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| D | vc4_hdmi.c | 495 if (!vc4->hvs->vc5_hdmi_enable_hdmi_20) { in vc4_hdmi_connector_get_modes()
1679 if (!vc4->hvs->vc5_hdmi_enable_hdmi_20 && clock > HDMI_14_MAX_TMDS_CLK) in vc4_hdmi_connector_clock_valid()
1683 if (!vc4->hvs->vc5_hdmi_enable_4096by2160 && in vc4_hdmi_connector_clock_valid()
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| /linux-6.12.1/net/vmw_vsock/ |
| D | hyperv_transport.c | 251 struct hvsock *hvs = vsk->trans; in hvs_channel_cb() local
252 struct vmbus_channel *chan = hvs->chan; in hvs_channel_cb()
303 struct hvsock *hvs = NULL; in hvs_open_connection() local
353 hvs = vsock_sk(sk)->trans; in hvs_open_connection()
354 hvs->chan = chan; in hvs_open_connection()
393 hvs->chan = NULL; in hvs_open_connection()
444 struct hvsock *hvs; in hvs_sock_init() local
447 hvs = kzalloc(sizeof(*hvs), GFP_KERNEL); in hvs_sock_init()
448 if (!hvs) in hvs_sock_init()
451 vsk->trans = hvs; in hvs_sock_init()
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| /linux-6.12.1/Documentation/devicetree/bindings/display/ |
| D | brcm,bcm2835-hvs.yaml | 4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-hvs.yaml#
15 - brcm,bcm2711-hvs
16 - brcm,bcm2835-hvs
39 const: brcm,bcm2711-hvs
47 hvs@7e400000 {
48 compatible = "brcm,bcm2835-hvs";
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| D | brcm,bcm2835-vc4.yaml | 14 with HDMI output and the HVS (Hardware Video Scaler) for compositing
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| /linux-6.12.1/Documentation/gpu/ |
| D | vc4.rst | 21 HVS section in Display Hardware Handling
25 :doc: VC4 HVS module.
27 HVS planes
73 * The HVS to PixelValve dynamic FIFO assignment, for the BCM2835-7
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| /linux-6.12.1/drivers/gpu/drm/vc4/tests/ |
| D | vc4_mock.c | 178 vc4->hvs = __vc4_hvs_alloc(vc4, NULL); in __mock_device()
179 KUNIT_ASSERT_NOT_ERR_OR_NULL(test, vc4->hvs); in __mock_device()
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| D | vc4_test_pv_muxing.c | 849 * This test makes sure that we never change the FIFO of an active HVS
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| /linux-6.12.1/tools/testing/selftests/net/ |
| D | test_vxlan_under_vrf.sh | 7 # two for the HVs, two for the VMs.
91 # Check connectivity between HVs by pinging hv-2 from hv-1
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| D | test_vxlan_vnifiltering.sh | 7 # six namespaces: two for the HVs, four for the VMs. Each VM is
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| /linux-6.12.1/arch/arm/boot/dts/broadcom/ |
| D | bcm2711-rpi.dtsi | 72 &hvs {
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| D | bcm283x.dtsi | 431 hvs@7e400000 {
432 compatible = "brcm,bcm2835-hvs";
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| D | bcm2711.dtsi | 292 hvs: hvs@7e400000 { label
293 compatible = "brcm,bcm2711-hvs";
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| /linux-6.12.1/drivers/clk/bcm/ |
| D | clk-raspberrypi.c | 76 * The clock is shared between the HVS and the CSI
78 * on the pixels composited on the HVS and the capture
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| /linux-6.12.1/Documentation/virt/hyperv/ |
| D | clocks.rst | 76 interrupts from stimer0 are recorded on the "HVS" line in /proc/interrupts
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| /linux-6.12.1/drivers/net/ethernet/broadcom/bnx2x/ |
| D | bnx2x_vfpf.h | 29 /* Common definitions for all HVs */
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| /linux-6.12.1/drivers/media/i2c/ |
| D | imx274.c | 230 {0x3018, 0xA2}, /* output XVS, HVS */
271 {0x3018, 0xA2}, /* output XVS, HVS */
311 {0x3018, 0xA2}, /* output XVS, HVS */
351 {0x3018, 0xA2}, /* output XVS, HVS */
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| /linux-6.12.1/arch/x86/kernel/ |
| D | irq.c | 158 seq_printf(p, "%*s: ", prec, "HVS"); in arch_show_interrupts()
|