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Searched full:emc_bgbias_ctl0 (Results 1 – 2 of 2) sorted by relevance

/linux-6.12.1/drivers/memory/tegra/
Dtegra124-emc.c268 #define EMC_BGBIAS_CTL0 0x570 macro
455 u32 emc_bgbias_ctl0; member
641 val = readl(emc->regs + EMC_BGBIAS_CTL0); in tegra_emc_prepare_timing_change()
642 val2 = last->emc_bgbias_ctl0; in tegra_emc_prepare_timing_change()
643 if (!(timing->emc_bgbias_ctl0 & in tegra_emc_prepare_timing_change()
656 writel(val2, emc->regs + EMC_BGBIAS_CTL0); in tegra_emc_prepare_timing_change()
850 timing->emc_bgbias_ctl0 & in tegra_emc_complete_timing_change()
852 val = timing->emc_bgbias_ctl0; in tegra_emc_complete_timing_change()
855 writel(val, emc->regs + EMC_BGBIAS_CTL0); in tegra_emc_complete_timing_change()
858 readl(emc->regs + EMC_BGBIAS_CTL0) != in tegra_emc_complete_timing_change()
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/linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra124-emc.yaml99 value of the EMC_BGBIAS_CTL0 register for this set of timings