Lines Matching full:emc_bgbias_ctl0
268 #define EMC_BGBIAS_CTL0 0x570 macro
455 u32 emc_bgbias_ctl0; member
641 val = readl(emc->regs + EMC_BGBIAS_CTL0); in tegra_emc_prepare_timing_change()
642 val2 = last->emc_bgbias_ctl0; in tegra_emc_prepare_timing_change()
643 if (!(timing->emc_bgbias_ctl0 & in tegra_emc_prepare_timing_change()
656 writel(val2, emc->regs + EMC_BGBIAS_CTL0); in tegra_emc_prepare_timing_change()
850 timing->emc_bgbias_ctl0 & in tegra_emc_complete_timing_change()
852 val = timing->emc_bgbias_ctl0; in tegra_emc_complete_timing_change()
855 writel(val, emc->regs + EMC_BGBIAS_CTL0); in tegra_emc_complete_timing_change()
858 readl(emc->regs + EMC_BGBIAS_CTL0) != in tegra_emc_complete_timing_change()
859 timing->emc_bgbias_ctl0) { in tegra_emc_complete_timing_change()
860 writel(timing->emc_bgbias_ctl0, in tegra_emc_complete_timing_change()
861 emc->regs + EMC_BGBIAS_CTL0); in tegra_emc_complete_timing_change()
959 EMC_READ_PROP(emc_bgbias_ctl0, "nvidia,emc-bgbias-ctl0") in load_one_timing_from_dt()