| /linux-6.12.1/Documentation/devicetree/bindings/gpio/ |
| D | sprd,gpio-eic.yaml | 5 $id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml#
8 title: Unisoc EIC controller
16 The EIC is the abbreviation of external interrupt controller, which can
17 be used only in input mode. The Spreadtrum platform has 2 EIC controllers,
18 one is in digital chip, and another one is in PMIC. The digital chip EIC
19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
20 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub-
23 The EIC-debounce sub-module provides up to 8 source input signal
32 The EIC-latch sub-module is used to latch some special power down signals
33 and generate interrupts, since the EIC-latch does not depend on the APB
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| /linux-6.12.1/drivers/irqchip/ |
| D | irq-mchp-eic.c | 28 * struct mchp_eic - EIC private data structure
32 * @irqs: irqs b/w eic and gic
45 static struct mchp_eic *eic; variable
51 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_mask()
53 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_mask()
62 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_unmask()
64 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_unmask()
74 tmp = readl_relaxed(eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_set_type()
96 writel_relaxed(tmp, eic->base + MCHP_EIC_SCFG(d->hwirq)); in mchp_eic_irq_set_type()
103 irq_set_irq_wake(eic->irqs[d->hwirq], on); in mchp_eic_irq_set_wake()
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| D | irq-mips-gic.c | 82 /* All local interrupts are routable in EIC mode. */ in gic_local_irq_is_routable()
721 /* Enable or disable EIC */ in gic_cpu_startup()
794 /* Always use vector 1 in EIC mode */ in gic_of_init()
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| D | Makefile | 127 obj-$(CONFIG_MCHP_EIC) += irq-mchp-eic.o
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| /linux-6.12.1/drivers/gpio/ |
| D | gpio-ep93xx.c | 35 struct ep93xx_gpio_irq_chip *eic; member
44 return egc->eic; in to_ep93xx_gpio_irq_chip()
58 static void ep93xx_gpio_update_int_params(struct ep93xx_gpio_irq_chip *eic) in ep93xx_gpio_update_int_params() argument
60 writeb_relaxed(0, eic->base + EP93XX_INT_EN_OFFSET); in ep93xx_gpio_update_int_params()
62 writeb_relaxed(eic->int_type2, in ep93xx_gpio_update_int_params()
63 eic->base + EP93XX_INT_TYPE2_OFFSET); in ep93xx_gpio_update_int_params()
65 writeb_relaxed(eic->int_type1, in ep93xx_gpio_update_int_params()
66 eic->base + EP93XX_INT_TYPE1_OFFSET); in ep93xx_gpio_update_int_params()
68 writeb_relaxed(eic->int_unmasked & eic->int_enabled, in ep93xx_gpio_update_int_params()
69 eic->base + EP93XX_INT_EN_OFFSET); in ep93xx_gpio_update_int_params()
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| D | gpio-eic-sprd.c | 17 /* EIC registers definition */
54 * The digital-chip EIC controller can support maximum 3 banks, and each bank
64 * The Spreadtrum EIC (external interrupt controller) can be used only in
67 * The Spreadtrum digital-chip EIC controller contains 4 sub-modules:
68 * debounce EIC, latch EIC, async EIC and sync EIC,
70 * The debounce EIC is used to capture the input signals' stable status
75 * The latch EIC is used to latch some special power down signals and
76 * generate interrupts, since the latch EIC does not depend on the APB clock
79 * The async EIC uses a 32k clock to capture the short signals (microsecond
82 * The EIC-sync is similar with GPIO's input function, which is a synchronized
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| D | gpio-pmic-eic-sprd.c | 15 /* EIC registers definition */
27 * The PMIC EIC controller only has one bank, and each bank now can contain
48 * struct sprd_pmic_eic - PMIC EIC controller
51 * @offset: the EIC controller's offset address of the PMIC.
52 * @reg: the array to cache the EIC registers.
54 * @irq: the interrupt number of the PMIC EIC conteroller.
190 * Will set the trigger level according to current EIC level in sprd_pmic_eic_irq_set_type()
232 /* Generate trigger start pulse for debounce EIC */ in sprd_pmic_eic_bus_sync_unlock()
257 dev_warn(chip->parent, "PMIC EIC level was changed.\n"); in sprd_pmic_eic_toggle_trigger()
264 /* Generate trigger start pulse for debounce EIC */ in sprd_pmic_eic_toggle_trigger()
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| D | Makefile | 59 obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o
135 obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
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| D | Kconfig | 259 tristate "Spreadtrum EIC support"
264 Say yes here to support Spreadtrum EIC device.
1461 tristate "Spreadtrum PMIC EIC support"
1466 Say yes here to support Spreadtrum PMIC EIC device.
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| /linux-6.12.1/drivers/hwmon/ |
| D | sht21.c | 36 * @eic: cached electronic identification code text
45 char eic[18]; member
164 u8 eic[8]; in eic_read() local
186 eic[2] = rx[0]; in eic_read()
187 eic[3] = rx[2]; in eic_read()
188 eic[4] = rx[4]; in eic_read()
189 eic[5] = rx[6]; in eic_read()
197 eic[0] = rx[3]; in eic_read()
198 eic[1] = rx[4]; in eic_read()
199 eic[6] = rx[0]; in eic_read()
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| /linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/ |
| D | microchip,sama7g5-eic.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/microchip,sama7g5-eic.yaml#
19 - microchip,sama7g5-eic
61 eic: interrupt-controller@e1628000 {
62 compatible = "microchip,sama7g5-eic";
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| D | mti,gic.yaml | 43 route interrupts. This property is ignored if the CPU is started in EIC
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| /linux-6.12.1/arch/mips/include/asm/mips-boards/ |
| D | maltaint.h | 42 * Interrupts 96..127 are used for Soc-it EIC interrupts
46 /* SOC-it EIC interrupt offsets */
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| /linux-6.12.1/arch/arm64/boot/dts/sprd/ |
| D | whale2.dtsi | 205 compatible = "sprd,sc9860-eic-debounce";
215 compatible = "sprd,sc9860-eic-latch";
225 compatible = "sprd,sc9860-eic-async";
235 compatible = "sprd,sc9860-eic-sync";
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| D | sc2731.dtsi | 55 compatible = "sprd,sc2731-eic";
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| /linux-6.12.1/arch/s390/kvm/ |
| D | intercept.c | 304 u16 eic = vcpu->arch.sie_block->eic; in handle_external_interrupt() local
323 if ((eic == EXT_IRQ_CLK_COMP || eic == EXT_IRQ_CPU_TIMER) && in handle_external_interrupt()
327 switch (eic) { in handle_external_interrupt()
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| D | interrupt.c | 496 vcpu->arch.sie_block->eic = EXT_IRQ_CPU_TIMER; in __deliver_cpu_timer()
520 vcpu->arch.sie_block->eic = EXT_IRQ_CLK_COMP; in __deliver_ckc()
786 vcpu->arch.sie_block->eic = EXT_IRQ_EMERGENCY_SIG; in __deliver_emergency_signal()
820 vcpu->arch.sie_block->eic = EXT_IRQ_EXTERNAL_CALL; in __deliver_external_call()
978 vcpu->arch.sie_block->eic = EXT_IRQ_SERVICE_SIG; in write_sclp()
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| /linux-6.12.1/Documentation/hwmon/ |
| D | sht21.rst | 55 eic
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| /linux-6.12.1/tools/testing/selftests/kvm/include/s390x/ |
| D | sie.h | 173 __u16 eic; /* 0x00c6 */ member
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| /linux-6.12.1/drivers/net/ethernet/renesas/ |
| D | ravb.h | 149 EIC = 0x0358, enumerator
412 /* EIC */
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| /linux-6.12.1/arch/arm/boot/dts/microchip/ |
| D | sama7g5.dtsi | 650 eic: interrupt-controller@e1628000 { label
651 compatible = "microchip,sama7g5-eic";
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| /linux-6.12.1/drivers/clk/sprd/ |
| D | sc9863a-clk.c | 1152 static SPRD_SC_GATE_CLK_HW(eic_eb, "eic-eb", &aon_apb.common.hw, 0x0,
1242 static SPRD_SC_GATE_CLK_HW(eic_rtc_eb, "eic-rtc-eb", &aon_apb.common.hw,
1244 static SPRD_SC_GATE_CLK_HW(eic_rtcdv5_eb, "eic-rtcdv5-eb", &aon_apb.common.hw,
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| D | ums512-clk.c | 1212 static SPRD_SC_GATE_CLK_FW_NAME(eic_eb, "eic-eb", "ext-26m",
1258 static SPRD_SC_GATE_CLK_FW_NAME(eic_rtc_eb, "eic-rtc-eb", "ext-26m",
1260 static SPRD_SC_GATE_CLK_FW_NAME(eic_rtcdv5_eb, "eic-rtcdv5-eb", "ext-26m",
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| D | sc9860-clk.c | 854 static SPRD_SC_GATE_CLK(eic_eb, "eic-eb", "aon-apb", 0x0,
974 static SPRD_SC_GATE_CLK(eic_rtc_eb, "eic-rtc-eb", "aon-apb", 0x10,
976 static SPRD_SC_GATE_CLK(eic_rtcdv5_eb, "eic-rtcdv5-eb", "aon-apb", 0x10,
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| /linux-6.12.1/arch/s390/include/asm/ |
| D | kvm_host.h | 301 __u16 eic; /* 0x00c6 */ member
|