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/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
29 cpu = <&cpu0>;
32 cpu = <&cpu1>;
35 cpu = <&cpu2>;
38 cpu = <&cpu3>;
43 cpu0: cpu@a00 {
44 device_type = "cpu";
[all …]
Dexynos4212.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
29 cpu = <&cpu0>;
32 cpu = <&cpu1>;
37 cpu0: cpu@a00 {
38 device_type = "cpu";
39 compatible = "arm,cortex-a9";
42 clock-names = "cpu";
[all …]
/linux-6.12.1/arch/arm64/boot/dts/apple/
Dt600x-common.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
18 cpu-map {
21 cpu = <&cpu_e00>;
24 cpu = <&cpu_e01>;
30 cpu = <&cpu_p00>;
33 cpu = <&cpu_p01>;
[all …]
Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
[all …]
Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
23 #size-cells = <0>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/opp/
Dopp-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 - $ref: opp-v2-base.yaml#
17 const: operating-points-v2
22 - |
24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states
28 #address-cells = <1>;
[all …]
Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
[all …]
/linux-6.12.1/Documentation/trace/
Dtimerlat-tracer.rst6 find sources of wakeup latencies of real-time threads. Like cyclictest,
13 -----
28 # _-----=> irqs-off
29 # / _----=> need-resched
30 # | / _---=> hardirq/softirq
31 # || / _--=> preempt-depth
34 # TASK-PID CPU# |||| TIMESTAMP ID CONTEXT LATENCY
36 <idle>-0 [000] d.h1 54.029328: #1 context irq timer_latency 932 ns
37 <...>-867 [000] .... 54.029339: #1 context thread timer_latency 11700 ns
38 <idle>-0 [001] dNh1 54.029346: #1 context irq timer_latency 2833 ns
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am625.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
7 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
12 #include "k3-am62.dtsi"
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu-map {
22 cpu = <&cpu0>;
26 cpu = <&cpu1>;
30 cpu = <&cpu2>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/allwinner/
Dsun8i-a33.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include "sun8i-a23-a33.dtsi"
46 #include <dt-bindings/thermal/thermal.h>
49 cpu0_opp_table: opp-table-cpu {
50 compatible = "operating-points-v2";
51 opp-shared;
53 opp-120000000 {
54 opp-hz = /bits/ 64 <120000000>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/powerpc/opal/
Dpower-mgt.txt1 IBM Power-Management Bindings
6 node @power-mgt in the device-tree by the firmware.
9 ----------------
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
15 extent of state-loss, whether timebase is stopped on this
18 - exit-latency: The latency involved in transitioning the state of the
19 CPU from idle to running.
21 - target-residency: The minimum time that the CPU needs to reside in
22 this idle state in order to accrue power-savings
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/cpufreq/
Dapple,cluster-cpufreq.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/cpufreq/apple,cluster-cpufreq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
13 Apple SoCs (e.g. M1) have a per-cpu-cluster DVFS controller that is part of
15 operating-points-v2 table to define the CPU performance states, with the
16 opp-level property specifying the hardware p-state index for that level.
21 - items:
22 - enum:
[all …]
/linux-6.12.1/tools/perf/scripts/python/
Dfutex-contention.py18 '/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
25 lock_waits = {} # long-lived stats on (tid,lock) blockage elapsed time
26 process_names = {} # long-lived pid-to-execname mapping
29 def syscalls__sys_enter_futex(event, ctxt, cpu, s, ns, tid, comm, callchain, argument
37 thread_blocktime[tid] = nsecs(s, ns)
40 def syscalls__sys_exit_futex(event, ctxt, cpu, s, ns, tid, comm, callchain, argument
43 elapsed = nsecs(s, ns) - thread_blocktime[tid]
56 print("%s[%d] lock %x contended %d times, %d avg ns [max: %d ns, min %d ns]" %
Dpowerpc-hcalls.py1 # SPDX-License-Identifier: GPL-2.0+
13 '/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
30 # cpu: {
159 print_ptrn = '%-28s%10s%10s%10s%10s'
162 print(print_ptrn % ('hcall', 'count', 'min(ns)', 'max(ns)', 'avg(ns)'))
163 print('-' * 68)
173 def powerpc__hcall_exit(name, context, cpu, sec, nsec, pid, comm, callchain, argument
175 if (cpu in d_enter and opcode in d_enter[cpu]):
176 diff = nsecs(sec, nsec) - d_enter[cpu][opcode]
193 del d_enter[cpu][opcode]
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/linux-6.12.1/drivers/of/
Dfdt_address.c1 // SPDX-License-Identifier: GPL-2.0+
3 * FDT Address translation based on u-boot fdt_support.c which in turn was
9 * Copyright 2010-2011 Freescale Semiconductor, Inc.
22 #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ argument
23 (ns) > 0)
30 while(na--) in of_dump_addr()
43 int na, int ns, int pna);
54 prop = fdt_getprop(blob, parentoffset, "#address-cells", NULL); in fdt_bus_default_count_cells()
62 prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); in fdt_bus_default_count_cells()
71 int na, int ns, int pna) in fdt_bus_default_map() argument
[all …]
/linux-6.12.1/arch/powerpc/kernel/
Dsysfs.c1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <linux/cpu.h>
33 static DEFINE_PER_CPU(struct cpu, cpu_devices);
39 * smt-snooze-delay cleanup.") and has been broken even longer. As was foretold in
45 * powerpc-utils stopped using it as of 1.3.8. At some point in the future this
55 current->comm, current->pid); in store_smt_snooze_delay()
64 current->comm, current->pid); in show_smt_snooze_delay()
76 pr_warn("smt-snooze-delay command line option has no effect\n"); in setup_smt_snooze_delay()
79 __setup("smt-snooze-delay=", setup_smt_snooze_delay);
99 struct cpu *cpu = container_of(dev, struct cpu, dev); \
[all …]
/linux-6.12.1/kernel/locking/
Dqspinlock_stat.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 * PV specific per-cpu counter
30 * Average kick latency (ns) = pv_latency_kick/pv_kick_unlock
32 * Average wake latency (ns) = pv_latency_wake/pv_kick_wake
40 int cpu, id, len; in lockevent_read() local
44 * Get the counter ID stored in file->f_inode->i_private in lockevent_read()
46 id = (long)file_inode(file)->i_private; in lockevent_read()
49 return -EBADF; in lockevent_read()
51 for_each_possible_cpu(cpu) { in lockevent_read()
52 sum += per_cpu(lockevents[id], cpu); in lockevent_read()
[all …]
/linux-6.12.1/arch/riscv/boot/dts/starfive/
Djh7110-common.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include "jh7110-pinfunc.h"
10 #include <dt-bindings/gpio/gpio.h>
25 stdout-path = "serial0:115200n8";
33 gpio-restart {
34 compatible = "gpio-restart";
39 pwmdac_codec: audio-codec {
40 compatible = "linux,spdif-dit";
41 #sound-dai-cells = <0>;
[all …]
/linux-6.12.1/arch/powerpc/boot/
Dsimpleboot.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * The simple platform -- for booting when firmware doesn't supply a device
28 const u32 *na, *ns, *reg, *timebase; in platform_init() local
36 /* Find the #address-cells and #size-cells properties */ in platform_init()
40 na = fdt_getprop(_dtb_start, node, "#address-cells", &size); in platform_init()
42 fatal("Cannot find #address-cells property"); in platform_init()
43 ns = fdt_getprop(_dtb_start, node, "#size-cells", &size); in platform_init()
44 if (!ns || (size != 4)) in platform_init()
45 fatal("Cannot find #size-cells property"); in platform_init()
48 node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", in platform_init()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/reserved-memory/
Dnvidia,tegra264-bpmp-shmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reserved-memory/nvidia,tegra264-bpmp-shmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra CPU-NS - BPMP IPC reserved memory
10 - Peter De Schrijver <pdeschrijver@nvidia.com>
13 Define a memory region used for communication between CPU-NS and BPMP.
15 has to be known to both CPU-NS and BPMP for correct IPC operation.
16 The memory region is defined using a child node under /reserved-memory.
17 The sub-node is named shmem@<address>.
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
23 opp-307200000 {
24 opp-hz = /bits/ 64 <307200000>;
25 opp-supported-hw = <0x70>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8qm.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/pads-imx8qm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
[all …]
/linux-6.12.1/tools/testing/selftests/seccomp/
Dseccomp_benchmark.c39 i = finish.tv_sec - start.tv_sec; in timing()
41 i += finish.tv_nsec - start.tv_nsec; in timing()
43 ksft_print_msg("%lu.%09lu - %lu.%09lu = %llu (%.1fs)\n", in timing()
71 i = finish.tv_sec - start.tv_sec; in calibrate()
73 i += finish.tv_nsec - start.tv_nsec; in calibrate()
140 /* Pin to a single CPU so the benchmark won't bounce around the system. */
143 long cpu; in affinity() local
150 * choose the highest CPU instead of the lowest. in affinity()
152 for (cpu = ncores - 1; cpu >= 0; cpu--) { in affinity()
154 CPU_SET_S(cpu, setsz, setp); in affinity()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/include/
Dkgd_pp_interface.h232 * APU power is managed to system-level requirements through the PPT
242 * enum pp_power_limit_level - Used to query the power limits
250 PP_PWR_LIMIT_MIN = -1,
257 * enum pp_power_type - Used to specify the type of the requested power
270 XGMI_PLPD_NONE = -1,
278 PP_PM_POLICY_NONE = -1,
482 /* Driver attached timestamp (in ns) */
551 /* Driver attached timestamp (in ns) */
610 /* Driver attached timestamp (in ns) */
648 /* PMFW attached timestamp (10ns resolution) */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/socionext/
Duniphier-ld20.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
14 compatible = "socionext,uniphier-ld20";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
[all …]

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