powerpc/opal/power-mgt.txt

1 IBM Power-Management Bindings
6 node @power-mgt in the device-tree by the firmware.
9 ----------------
12 - name: The name of the idle state as defined by the firmware.
14 - flags: indicating some aspects of this idle states such as the
15          extent of state-loss, whether timebase is stopped on this
18 - exit-latency: The latency involved in transitioning the state of the
19 		CPU from idle to running.
21 - target-residency: The minimum time that the CPU needs to reside in
22 		    this idle state in order to accrue power-savings
26 ----------------
32 If idle-states are defined, then the properties
33 "ibm,cpu-idle-state-names" and "ibm,cpu-idle-state-flags" are
37 - ibm,cpu-idle-state-names:
40 - ibm,cpu-idle-state-flags:
41 	Array of unsigned 32-bit values containing the values of the
42 	flags associated with the aforementioned idle-states. The
50 		0x00020000 /* This is a fast-sleep state (POWER8)*/
52 		0x00080000 /* This is a fast-sleep state which requires a */
58 		0x00200000 /* This is a deep-stop state (POWER9) */
60 - ibm,cpu-idle-state-latencies-ns:
61 	Array of unsigned 32-bit values containing the values of the
62 	exit-latencies (in ns) for the idle states in
63 	ibm,cpu-idle-state-names.
65 - ibm,cpu-idle-state-residency-ns:
66 	Array of unsigned 32-bit values containing the values of the
67 	target-residency (in ns) for the idle states in
68 	ibm,cpu-idle-state-names. On POWER8 this is an optional
73 - ibm,cpu-idle-state-psscr:
74 	Array of unsigned 64-bit values containing the values for the
75 	PSSCR for each of the idle states in ibm,cpu-idle-state-names.
78 - ibm,cpu-idle-state-psscr-mask:
79 	Array of unsigned 64-bit values containing the masks
81 	entries of ibm,cpu-idle-state-psscr. This property is
85 	ibm,cpu-idle-state-psscr-mask value to 0xf, it implies that
87 	in ibm,cpu-idle-state-psscr should be considered by the
89 	remaining fields of the psscr to the following sane-default
92 		- ESL and EC bits are to 1. So wakeup from any stop
95 		- MTL and PSLL are set to the maximum allowed value as
98 		- The Transition Rate, TR is set to the Maximum value
102 	ibm,cpu-idle-state-psscr-mask, the kernel expects all the
104 	ibm,cpu-idle-state-psscr to be correctly set by the firmware.
106 - ibm,cpu-idle-state-pmicr:
107 	Array of unsigned 64-bit values containing the pmicr values
108 	for the idle states in ibm,cpu-idle-state-names. This 64-bit
114 - ibm,cpu-idle-state-pmicr-mask:
115 	Array of unsigned 64-bit values containing the mask indicating
117 	entries in ibm,cpu-idle-state-pmicr. This is an optional