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/linux-6.12.1/arch/loongarch/vdso/
Dvgetrandom-chacha.S78 #define _20 20, 20, 20, 20
99 li.w copy0, 0x61707865
100 li.w copy1, 0x3320646e
101 li.w copy2, 0x79622d32
103 ld.w cnt_lo, counter, 0
104 ld.w cnt_hi, counter, 4
111 li.w state3, 0x6b206574
114 ld.w state4, key, 0
115 ld.w state5, key, 4
116 ld.w state6, key, 8
[all …]
/linux-6.12.1/net/wireless/
Ddebugfs.c32 DEBUGFS_READONLY_FILE(rts_threshold, 20, "%d",
34 DEBUGFS_READONLY_FILE(fragmentation_threshold, 20, "%d",
36 DEBUGFS_READONLY_FILE(short_retry_limit, 20, "%d",
38 DEBUGFS_READONLY_FILE(long_retry_limit, 20, "%d",
133 struct debugfs_read_work *w = container_of(work, typeof(*w), work); in wiphy_locked_debugfs_read_work() local
135 w->ret = w->handler(w->wiphy, w->file, w->buf, w->bufsize, w->data); in wiphy_locked_debugfs_read_work()
136 complete(&w->completion); in wiphy_locked_debugfs_read_work()
142 struct debugfs_read_work *w = data; in wiphy_locked_debugfs_read_cancel() local
144 wiphy_work_cancel(w->wiphy, &w->work); in wiphy_locked_debugfs_read_cancel()
145 complete(&w->completion); in wiphy_locked_debugfs_read_cancel()
[all …]
/linux-6.12.1/tools/testing/selftests/net/
Dtest_bridge_neigh_suppress.sh17 # | | + eth0.20 | | | + eth0.20 |
36 # | br0.10 br0.20 | | br0.10 br0.20 |
172 ip -n $ns link add link eth0 name eth0.20 up type vlan id 20
175 ip -n $ns address add $v4addr2 dev eth0.20
177 ip -n $ns address add $v6addr2 dev eth0.20
222 ip -n $ns link add link br0 name br0.20 up type vlan id 20
223 bridge -n $ns vlan add vid 20 dev br0 self
227 bridge -n $ns vlan add vid 20 dev swp1
240 bridge -n $ns vlan add vid 20 dev vx0
241 bridge -n $ns vlan add vid 20 dev vx0 tunnel_info id 10020
[all …]
Dtoeplitz_client.sh6 # This program sends packets periodically for, conservatively, 20 seconds. The
8 # needed, rather than waiting for the 20 second expiration.
11 expiration=$((SECONDS+20))
15 echo "msg $i" | nc "${IPVER}" -u -w 0 "${ADDR}" "${PORT}"
17 echo "msg $i" | nc "${IPVER}" -w 0 "${ADDR}" "${PORT}"
Dsctp_vrf.sh23 ip net exec $CLIENT_NS1 sysctl -w net.ipv6.conf.default.accept_dad=0 2>&1 >/dev/null
24 ip net exec $CLIENT_NS2 sysctl -w net.ipv6.conf.default.accept_dad=0 2>&1 >/dev/null
25 ip net exec $SERVER_NS sysctl -w net.ipv6.conf.default.accept_dad=0 2>&1 >/dev/null
41 ip -n $SERVER_NS link add vrf-2 type vrf table 20
57 ip -n $SERVER_NS route add table 20 $CLIENT_IP4 dev veth2 src $SERVER_IP4
60 ip -n $SERVER_NS route add table 20 $CLIENT_IP6 dev veth2 src $SERVER_IP6
75 [ $((CNT++)) = "20" ] && { RET=3; return $RET; }
117 ip netns exec $SERVER_NS sysctl -w net.sctp.l3mdev_accept=1 2>&1 >/dev/null
126 ip netns exec $SERVER_NS sysctl -w net.sctp.l3mdev_accept=0 2>&1 >/dev/null
/linux-6.12.1/include/linux/soc/ti/
Domap1-usb.h24 # define USB2_TRX_MODE(w) (((w)>>24)&0x07) argument
25 # define USB1_TRX_MODE(w) (((w)>>20)&0x07) argument
26 # define USB0_TRX_MODE(w) (((w)>>16)&0x07) argument
38 # define SRP_GPUVBUS(w) (((w)>>24)&0x07) argument
39 # define A_WAIT_VRISE(w) (((w)>>20)&0x07) argument
40 # define B_ASE_BRST(w) (((w)>>16)&0x07) argument
49 # define OTG_HMC(w) (((w)>>0)&0x3f) argument
60 # define OTG_ASESSVLD (1 << 20)
/linux-6.12.1/drivers/crypto/cavium/cpt/
Dcpt_hw_types.h87 u64 reserved_172_19:20;
95 u64 reserved_172_191:20;
243 * aura:12; [59:48](R/W) Guest-aura for returning this queue's
248 * size:13 [44:32](R/W) Command-buffer size, in number of 64-bit words per
252 * cont_err:1 [10:10](R/W) Continue on error.
261 * inst_free:1 [9:9](R/W) Instruction FPA free. When set, when CPT reaches the
263 * inst_be:1 [8:8](R/W) Instruction big-endian control. When set, instructions,
266 * iqb_ldwb:1 [7:7](R/W) Instruction load don't write back.
277 * grp:3; [3:1](R/W) Engine group.
278 * pri:1; [0:0](R/W) Queue priority.
[all …]
/linux-6.12.1/drivers/crypto/marvell/octeontx/
Dotx_cpt_hw_types.h96 #define OTX_CPT_PF_QX_CTL(b) (0x8000000ll | (u64)(b) << 20)
97 #define OTX_CPT_PF_QX_GMCTL(b) (0x8000020ll | (u64)(b) << 20)
98 #define OTX_CPT_PF_QX_CTL2(b) (0x8000100ll | (u64)(b) << 20)
99 #define OTX_CPT_PF_VFX_MBOXX(b, c) (0x8001000ll | (u64)(b) << 20 | \
103 #define OTX_CPT_VQX_CTL(b) (0x100ll | (u64)(b) << 20)
104 #define OTX_CPT_VQX_SADDR(b) (0x200ll | (u64)(b) << 20)
105 #define OTX_CPT_VQX_DONE_WAIT(b) (0x400ll | (u64)(b) << 20)
106 #define OTX_CPT_VQX_INPROG(b) (0x410ll | (u64)(b) << 20)
107 #define OTX_CPT_VQX_DONE(b) (0x420ll | (u64)(b) << 20)
108 #define OTX_CPT_VQX_DONE_ACK(b) (0x440ll | (u64)(b) << 20)
[all …]
/linux-6.12.1/Documentation/leds/
Dleds-lp5562.rst26 Value: RGB or W
46 Engine mux has two different mode, RGB and W.
47 RGB is used for loading RGB program data, W is used for W program data.
61 echo "W" > /sys/bus/i2c/devices/xxxx/engine_mux
87 .led_current = 20,
93 .led_current = 20,
99 .led_current = 20,
103 .name = "W",
105 .led_current = 20,
/linux-6.12.1/drivers/media/platform/samsung/s5p-mfc/
Dregs-mfc-v7.h46 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V7 (20 * SZ_1K) /* 20KB */
51 #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V7(w, h) \ argument
52 (SZ_1M + ((w) * 144) + (8192 * (h)) + 49216)
54 #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V7(w, h) \ argument
55 (((w) * 48) + 8192 + ((((w) + 1) / 2) * 128) + 144 + \
56 ((((((w) * 16) * ((h) * 16)) * 3) / 2) * 4))
Dregs-mfc-v8.h97 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V8 (20 * SZ_1K) /* 20KB */
102 #define S5P_FIMV_TMV_BUFFER_SIZE_V8(w, h) (((w) + 1) * ((h) + 1) * 8) argument
104 #define S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V8(w, h) (((w) * 704) + 2176) argument
105 #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V8(w, h) \ argument
106 (((w) * 576 + (h) * 128) + 4128)
108 #define S5P_FIMV_SCRATCH_BUF_SIZE_H264_ENC_V8(w, h) \ argument
109 (((w) * 592) + 2336)
110 #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_ENC_V8(w, h) \ argument
111 (((w) * 576) + 10512 + \
112 ((((((w) * 16) * ((h) * 16)) * 3) / 2) * 4))
Dregs-mfc-v6.h352 #define S5P_FIMV_CODEC_H264_ENC_V6 20
377 #define S5P_FIMV_TMV_BUFFER_SIZE_V6(w, h) (((w) + 1) * ((h) + 3) * 8) argument
381 #define S5P_FIMV_SCRATCH_BUF_SIZE_H264_DEC_V6(w, h) (((w) * 192) + 64) argument
382 #define S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6(w, h) \ argument
383 ((w) * 144 + 8192 * (h) + 49216 + 1048576)
384 #define S5P_FIMV_SCRATCH_BUF_SIZE_VC1_DEC_V6(w, h) \ argument
385 (2096 * ((w) + (h) + 1))
386 #define S5P_FIMV_SCRATCH_BUF_SIZE_H263_DEC_V6(w, h) \ argument
387 S5P_FIMV_SCRATCH_BUF_SIZE_MPEG4_DEC_V6(w, h)
388 #define S5P_FIMV_SCRATCH_BUF_SIZE_VP8_DEC_V6(w, h) \ argument
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Dmd5-asm.S62 LOAD_DATA(w0, off) /* W */ \
66 LOAD_DATA(w1, off+4) /* W */ \
68 addi w0,w0,k0l; /* 1: wk = w + k */ \
70 addis w0,w0,k0h; /* 1: wk = w + k' */ \
71 addis w1,w1,k1h; /* 2: wk = w + k */ \
73 addi w1,w1,k1l; /* 2: wk = w + k' */ \
88 addi w0,w0,k0l; /* 1: wk = w + k */ \
90 addis w0,w0,k0h; /* 1: wk = w + k' */ \
92 addi w1,w1,k1l; /* 2: wk = w + k */ \
94 addis w1,w1,k1h; /* 2: wk = w + k' */ \
[all …]
/linux-6.12.1/drivers/scsi/
Dnsp32.h81 #define IRQ_CONTROL 0x00 /* BASE+00, W, W */
82 #define IRQ_STATUS 0x00 /* BASE+00, W, R */
112 #define TRANSFER_CONTROL 0x02 /* BASE+02, W, W */
113 #define TRANSFER_STATUS 0x02 /* BASE+02, W, R */
130 #define INDEX_REG 0x04 /* BASE+04, Byte(R/W), Word(R) */
132 #define TIMER_SET 0x06 /* BASE+06, W, R/W */
136 #define DATA_REG_LOW 0x08 /* BASE+08, LowW, R/W */
137 #define DATA_REG_HI 0x0a /* BASE+0a, Hi-W, R/W */
139 #define FIFO_REST_CNT 0x0c /* BASE+0c, W, R/W */
144 #define SREQ_SMPL_RATE 0x0f /* BASE+0f, B, R/W */
[all …]
/linux-6.12.1/tools/testing/selftests/net/mptcp/
Ddiag.sh99 local timeout=20
275 ./mptcp_connect -p 10000 -l -t ${timeout_poll} -w 20 \
284 ./mptcp_connect -p 10000 -r 0 -t ${timeout_poll} -w 20 \
301 ./mptcp_connect -p 10001 -l -s TCP -t ${timeout_poll} -w 20 \
307 ./mptcp_connect -p 10001 -r 0 -t ${timeout_poll} -w 20 \
323 ./mptcp_connect -p $((I+10001)) -l -w 20 \
332 ./mptcp_connect -p $((I+10001)) -w 20 \
/linux-6.12.1/arch/sh/lib/
Dcopy_page.S211 EX( mov.l r9,@(20,r4) )
249 EX( mov.w r0,@r4 )
269 EX( mov.l r1,@(20,r4) )
271 EX( mov.w r0,@(28,r4) )
277 EX( mov.l @(20,r5),r9 )
279 EX( mov.w r0,@(30,r4) )
286 EX( mov.l r9,@(20,r4) )
299 swap.w r10,r0
301 EX( mov.w r0,@(2,r4) )
314 EX( mov.w r0,@r4 )
[all …]
/linux-6.12.1/include/linux/mmc/
Dmmc.h59 #define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
90 #define MMC_QUE_TASK_PARAMS 44 /* ac [20:16] task id R1 */
92 #define MMC_EXECUTE_READ_TASK 46 /* adtc [20:16] task id R1 */
93 #define MMC_EXECUTE_WRITE_TASK 47 /* adtc [20:16] task id R1 */
94 #define MMC_CMDQ_TASK_MGMT 48 /* ac [20:16] task id R1b */
145 #define R1_CC_ERROR (1 << 20) /* erx, c */
256 #define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */
257 #define EXT_CSD_FLUSH_CACHE 32 /* W */
258 #define EXT_CSD_CACHE_CTRL 33 /* R/W */
259 #define EXT_CSD_POWER_OFF_NOTIFICATION 34 /* R/W */
[all …]
/linux-6.12.1/arch/m68k/lib/
Duaccess.c24 "3: "MOVES".w (%1)+,%3\n" in __generic_copy_from_user()
25 " move.w %3,(%2)+\n" in __generic_copy_from_user()
70 " move.w (%1)+,%3\n" in __generic_copy_to_user()
71 "5: "MOVES".w %3,(%2)+\n" in __generic_copy_to_user()
79 "20: lsl.l #2,%0\n" in __generic_copy_to_user()
86 " .long 2b,20b\n" in __generic_copy_to_user()
87 " .long 3b,20b\n" in __generic_copy_to_user()
116 "4: "MOVES".w %2,(%1)+\n" in __clear_user()
/linux-6.12.1/net/ipv4/
Dtcp_westwood.c47 #define TCP_WESTWOOD_RTT_MIN (HZ/20) /* 50ms */
48 #define TCP_WESTWOOD_INIT_RTT (20*HZ) /* maybe too conservative?! */
63 struct westwood *w = inet_csk_ca(sk); in tcp_westwood_init() local
65 w->bk = 0; in tcp_westwood_init()
66 w->bw_ns_est = 0; in tcp_westwood_init()
67 w->bw_est = 0; in tcp_westwood_init()
68 w->accounted = 0; in tcp_westwood_init()
69 w->cumul_ack = 0; in tcp_westwood_init()
70 w->reset_rtt_min = 1; in tcp_westwood_init()
71 w->rtt_min = w->rtt = TCP_WESTWOOD_INIT_RTT; in tcp_westwood_init()
[all …]
/linux-6.12.1/arch/sh/drivers/pci/
Dpcie-sh7786.h44 #define BITS_BADOPC (5) /* 5 BADOPC 0 R/W */
46 #define BITS_BADDEST (4) /*4 BADDEST 0 R/W */
48 #define BITS_UNSOLRESP (3) /* 3 UNSOLRESP 0 R/W */
56 #define SH4A_PCIEENBLR (0x000008) /* R/W - 0x0000 0001 32 */
59 #define SH4A_PCIEECR (0x00000C) /* R/W - 0x0000 0000 32 */
60 #define BITS_ENBL (0) /* 0 ENBL 0 R/W */
64 #define SH4A_PCIEPAR (0x000010) /* R/W - 0x0000 0000 32 */
77 #define SH4A_PCIEPCTLR (0x000018) /* R/W - 0x0000 0000 32 */
86 #define SH4A_PCIEPDR (0x000020) /* R/W - 0x0000 0000 32 */
91 #define SH4A_PCIEMSGALR (0x000030) /* R/W - 0x0000 0000 32 */
[all …]
/linux-6.12.1/drivers/gpu/drm/sun4i/
Dsun8i_ui_scaler.h19 #define SUN8I_UI_SCALER_SCALE_MAX ((1UL << 20) - 1)
21 #define SUN8I_UI_SCALER_SCALE_FRAC 20
22 #define SUN8I_UI_SCALER_PHASE_FRAC 20
24 #define SUN8I_UI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1)) argument
/linux-6.12.1/include/video/
Dpm3fb.h210 #define PM3VideoOverlayMode_FLIP_VIDEO (0 << 20)
211 #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMA (1 << 20)
212 #define PM3VideoOverlayMode_FLIP_VIDEOSTREAMB (2 << 20)
226 #define PM3VideoOverlayWidth_WIDTH(w) (((w) & 0xfff) << 0) argument
555 #define PM3FBDestReadBufferWidth_Width(w) ((w) & 0x0fff) argument
595 #define PM3FBDestReadMode_Origin0 (1 << 20)
612 #define PM3FBSourceReadBufferWidth_Width(w) ((w) & 0x0fff) argument
626 #define PM3FBSourceReadMode_WrapX(w) (((w) & 0xf) << 16) argument
627 #define PM3FBSourceReadMode_WrapY(w) (((w) & 0xf) << 20) argument
645 #define PM3FBWriteBufferWidth_Width(w) ((w) & 0x0fff) argument
[all …]
/linux-6.12.1/drivers/staging/media/sunxi/cedrus/
Dcedrus_regs.h40 #define VE_MODE_REC_WR_MODE_2MB (0x01 << 20)
41 #define VE_MODE_REC_WR_MODE_1MB (0x00 << 20)
123 #define VE_DEC_MPEG_PICCODEDSIZE_WIDTH(w) \ argument
124 SHIFT_AND_MASK_BITS(DIV_ROUND_UP(w, 16), 15, 8)
130 #define VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(w) SHIFT_AND_MASK_BITS(w, 27, 16) argument
135 #define VE_DEC_MPEG_MBADDR_X(w) SHIFT_AND_MASK_BITS(w, 15, 8) argument
199 #define VE_DEC_MPEG_STATUS_JPEG_RESTART_ERROR BIT(20)
277 SHIFT_AND_MASK_BITS(v, 22, 20)
297 #define VE_DEC_H265_DEC_PIC_SIZE_WIDTH(w) (((w) << 0) & GENMASK(13, 0)) argument
366 SHIFT_AND_MASK_BITS(v, 23, 20)
[all …]
/linux-6.12.1/drivers/dma/dw-axi-dmac/
Ddw-axi-dmac.h153 #define DMAC_CFG 0x010 /* R/W DMAC Configuration */
154 #define DMAC_CHEN 0x018 /* R/W DMAC Channel Enable */
155 #define DMAC_CHEN_L 0x018 /* R/W DMAC Channel Enable 00-31 */
156 #define DMAC_CHEN_H 0x01C /* R/W DMAC Channel Enable 32-63 */
157 #define DMAC_CHSUSPREG 0x020 /* R/W DMAC Channel Suspend */
158 #define DMAC_CHABORTREG 0x028 /* R/W DMAC Channel Abort */
160 #define DMAC_COMMON_INTCLEAR 0x038 /* W DMAC Interrupt Clear */
162 #define DMAC_COMMON_INTSIGNAL_ENA 0x048 /* R/W DMAC Interrupt Signal Enable */
167 #define CH_SAR 0x000 /* R/W Chan Source Address */
168 #define CH_DAR 0x008 /* R/W Chan Destination Address */
[all …]
/linux-6.12.1/arch/arm/crypto/
Dsha1-armv7-neon.S88 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
90 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
94 pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
98 pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
102 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
104 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
108 pre2(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
111 pre3(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
115 W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28) \ argument
117 pre1(i16,W,W_m04,W_m08,W_m12,W_m16,W_m20,W_m24,W_m28); \
[all …]

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