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/linux-6.12.1/arch/alpha/lib/
Dev6-memcpy.S16 * E - either cluster
21 * $1,$2, - scratch
34 mov $16, $0 # E : copy dest to return
36 xor $16, $17, $1 # E : are source and dest alignments the same?
37 and $1, 7, $1 # E : are they the same mod 8?
39 bne $1, $misaligned # U : Nope - gotta do this the slow way
41 and $16, 7, $1 # E : Are both 0mod8?
42 beq $1, $both_0mod8 # U : Yes
43 nop # E :
52 ldbu $1, 0($17) # L : grab a byte
[all …]
Dev6-memchr.S26 * E - either cluster
42 # Hack -- if someone passes in (size_t)-1, hoping to just
49 ldq_u $1, 0($16) # L : load first quadword Latency=3
50 and $17, 0xff, $17 # E : L L U U : 00000000000000ch
52 insbl $17, 1, $2 # U : 000000000000ch00
53 cmpult $18, 9, $4 # E : small (< 1 quad) string?
54 or $2, $17, $17 # E : 000000000000chch
55 lda $3, -1($31) # E : U L L U
58 addq $16, $5, $5 # E : Max search address
59 or $2, $17, $17 # E : 00000000chchchch
[all …]
Dev6-memset.S15 * E - either cluster
53 and $17,255,$1 # E : 00000000000000ch
54 insbl $17,1,$2 # U : 000000000000ch00
55 bis $16,$16,$0 # E : return value
58 addq $18,$16,$6 # E : max address to write to
59 bis $1,$2,$17 # E : 000000000000chch
60 insbl $1,2,$3 # U : 0000000000ch0000
61 insbl $1,3,$4 # U : 00000000ch000000
63 or $3,$4,$3 # E : 00000000chch0000
65 xor $16,$6,$1 # E : will complete write be within one quadword?
[all …]
Dev6-clear_user.S18 * E - either cluster
53 and $16, 7, $4 # .. E .. .. : find dest head misalignment
56 addq $0, $4, $1 # .. .. .. E : bias counter
57 and $1, 7, $2 # .. .. E .. : number of misaligned bytes in tail
60 srl $1, 3, $1 # .. E .. .. : number of quadwords to clear
68 beq $1, $onebyte # .. .. U .. : sub-word store?
70 addq $16, 8, $16 # E .. .. .. : L U U L
73 subq $1, 1, $1 # .. .. E .. :
74 addq $0, $4, $0 # .. E .. .. : bytes left -= 8 - misalignment
75 subq $0, 8, $0 # E .. .. .. : U L U L
[all …]
Dev6-csum_ipv6_magic.S17 * E - either cluster
66 ldq_u $1,8($16) # L : Latency: 3
69 and $16,7,$6 # E : src misalignment
75 extqh $1,$6,$22 # U :
79 cmoveq $6,$31,$22 # E : src aligned?
82 addl $19,$7,$19 # E : U L U L : <sign bits>bbaabb00
84 or $0,$22,$0 # E : 1st src word complete
85 extql $1,$6,$1 # U :
86 or $18,$4,$18 # E : 000000CCDDAABBCC
89 and $17,7,$6 # E : dst misalignment
[all …]
Dev6-stxncpy.S36 * E - either cluster
65 /* Create the 1st output word and detect 0's in the 1st input word. */
66 lda t2, -1 # E : build a mask against false zero
69 ornot t1, t2, t2 # E : (stall)
72 cmpbge zero, t2, t8 # E : bits set iff null found
73 or t0, t3, t0 # E : (stall)
87 * limit of 1 bcond/quad to permit training
91 addq a0, 8, a0 # E :
92 subq a2, 1, a2 # E :
96 addq a1, 8, a1 # E :
[all …]
Dev6-copy_user.S21 * E - either cluster
49 mov $18, $0 # .. .. .. E
50 subq $18, 32, $1 # .. .. E. .. : Is this going to be a small copy?
51 nop # .. E .. ..
54 and $16,7,$3 # .. .. .. E : is leading dest misalignment
55 ble $1, $onebyteloop # .. .. U .. : 1st branch : small amount of data
57 subq $3, 8, $3 # E .. .. .. : L U U L : trip counter
59 * The fetcher stall also hides the 1 cycle cross-cluster stall for $3 (L --> U)
64 EXI( ldbu $1,0($17) ) # .. .. .. L : Keep loads separate from stores
65 addq $16,1,$16 # .. .. E .. : Section 3.8 in the CWG
[all …]
Dev67-strncat.S10 * past count, whereas libc may write to count+1. This follows the generic
18 * E - either cluster
37 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
38 lda $2, -1($31) # E :
41 andnot $16, 7, $16 # E :
42 nop # E :
43 or $2, $1, $1 # E :
45 nop # E :
46 nop # E :
47 cmpbge $31, $1, $2 # E : bits set iff byte == 0
[all …]
Dev6-divide.S38 * $1 - shifted divisor
53 * E - either cluster
66 #define divisor $1
109 subq $30,STACK,$30 # E :
113 7: stq $1, 0($30) # L :
114 bis $25,$25,divisor # E :
117 bis $24,$24,modulus # E :
119 bis $31,$31,quotient # E :
120 LONGIFY(divisor) # E : U L L U
123 LONGIFY(modulus) # E :
[all …]
Dev6-stxcpy.S28 * E - either cluster
57 /* Create the 1st output word and detect 0's in the 1st input word. */
58 lda t2, -1 # E : build a mask against false zero
61 ornot t1, t2, t2 # E : (stall)
64 cmpbge zero, t2, t8 # E : bits set iff null found
65 or t0, t3, t1 # E : (stall)
75 addq a0, 8, a0 # E :
80 addq a1, 8, a1 # E :
81 cmpbge zero, t1, t8 # E : (3 cycle stall)
89 negq t8, t6 # E : find low bit set
[all …]
/linux-6.12.1/Documentation/driver-api/media/drivers/ccs/
Dccs-regs.asc6 # - e enum value # after a field
7 # - e enum value [LSB MSB]
13 # v1.1 defined in version 1.1
23 - e GRBG 0
24 - e RGGB 1
25 - e BGGR 2
26 - e GBRG 3
28 - e v1_0 0x10
29 - e v1_1 0x11
40 - e ts 0
[all …]
/linux-6.12.1/security/apparmor/
Dpolicy_unpack_test.c15 (3 + strlen(TEST_STRING_NAME) + 1)
20 (TEST_STRING_BUF_OFFSET + 3 + strlen(TEST_STRING_DATA) + 1)
22 (TEST_NAMED_U32_BUF_OFFSET + 3 + strlen(TEST_U32_NAME) + 1)
29 #define TEST_NAMED_U64_BUF_OFFSET (TEST_U32_BUF_OFFSET + sizeof(u32) + 1)
31 (TEST_NAMED_U64_BUF_OFFSET + 3 + strlen(TEST_U64_NAME) + 1)
36 #define TEST_NAMED_BLOB_BUF_OFFSET (TEST_U64_BUF_OFFSET + sizeof(u64) + 1)
38 (TEST_NAMED_BLOB_BUF_OFFSET + 3 + strlen(TEST_BLOB_NAME) + 1)
45 (TEST_NAMED_ARRAY_BUF_OFFSET + 3 + strlen(TEST_ARRAY_NAME) + 1)
50 struct aa_ext *e; member
58 struct aa_ext *e; in build_aa_ext_struct() local
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Dsha1-spe-asm.S3 * Fast SHA-1 implementation for SPE instruction set (PPC)
106 #define R_00_15(a, b, c, d, e, w0, w1, k, off) \ argument
107 LOAD_DATA(w0, off) /* 1: W */ \
108 and rT2,b,c; /* 1: F' = B and C */ \
109 LOAD_K##k##1 \
110 andc rT1,d,b; /* 1: F" = ~B and D */ \
111 rotrwi rT0,a,27; /* 1: A' = A rotl 5 */ \
112 or rT2,rT2,rT1; /* 1: F = F' or F" */ \
113 add e,e,rT0; /* 1: E = E + A' */ \
114 rotrwi b,b,2; /* 1: B = B rotl 30 */ \
[all …]
/linux-6.12.1/tools/testing/selftests/filesystems/epoll/
Depoll_wakeup_test.c27 #define __NR_epoll_pwait2 -1
52 struct epoll_event e; in waiter_entry1a() local
55 if (epoll_wait(ctx->efd[0], &e, 1, -1) > 0) in waiter_entry1a()
56 __sync_fetch_and_add(&ctx->count, 1); in waiter_entry1a()
64 struct epoll_event e; in waiter_entry1ap() local
69 if (poll(&pfd, 1, -1) > 0) { in waiter_entry1ap()
70 if (epoll_wait(ctx->efd[0], &e, 1, 0) > 0) in waiter_entry1ap()
71 __sync_fetch_and_add(&ctx->count, 1); in waiter_entry1ap()
79 struct epoll_event e; in waiter_entry1o() local
82 if (epoll_wait(ctx->efd[0], &e, 1, -1) > 0) in waiter_entry1o()
[all …]
/linux-6.12.1/tools/testing/selftests/powerpc/pmu/
Devent.c24 static void __event_init_opts(struct event *e, u64 config, in __event_init_opts() argument
27 memset(e, 0, sizeof(*e)); in __event_init_opts()
29 e->name = name; in __event_init_opts()
31 e->attr.type = type; in __event_init_opts()
32 e->attr.config = config; in __event_init_opts()
33 e->attr.size = sizeof(e->attr); in __event_init_opts()
35 e->attr.read_format = PERF_FORMAT_TOTAL_TIME_ENABLED | \ in __event_init_opts()
38 e->attr.sample_period = 1000; in __event_init_opts()
39 e->attr.sample_type = PERF_SAMPLE_REGS_INTR; in __event_init_opts()
40 e->attr.disabled = 1; in __event_init_opts()
[all …]
Dper_event_excludes.c25 struct event *e, events[4]; in per_event_excludes() local
34 e = &events[0]; in per_event_excludes()
35 event_init_opts(e, PERF_COUNT_HW_INSTRUCTIONS, in per_event_excludes()
37 e->attr.disabled = 1; in per_event_excludes()
39 e = &events[1]; in per_event_excludes()
40 event_init_opts(e, PERF_COUNT_HW_INSTRUCTIONS, in per_event_excludes()
42 e->attr.disabled = 1; in per_event_excludes()
43 e->attr.exclude_user = 1; in per_event_excludes()
44 e->attr.exclude_hv = 1; in per_event_excludes()
46 e = &events[2]; in per_event_excludes()
[all …]
/linux-6.12.1/net/netfilter/ipset/
Dip_set_hash_netnet.c24 /* 1 Forceadd support added */
71 return elem->nomatch ? -ENOTEMPTY : 1; in hash_netnet4_do_data_match()
90 elem->ip[1] = orig->ip[1]; in hash_netnet4_data_reset_elem()
97 elem->ip[1] &= ip_set_netmask(cidr); in hash_netnet4_data_netmask()
98 elem->cidr[1] = cidr; in hash_netnet4_data_netmask()
112 nla_put_ipaddr4(skb, IPSET_ATTR_IP2, data->ip[1]) || in hash_netnet4_data_list()
114 nla_put_u8(skb, IPSET_ATTR_CIDR2, data->cidr[1]) || in hash_netnet4_data_list()
136 hash_netnet4_init(struct hash_netnet4_elem *e) in hash_netnet4_init() argument
138 e->cidr[0] = HOST_MASK; in hash_netnet4_init()
139 e->cidr[1] = HOST_MASK; in hash_netnet4_init()
[all …]
Dip_set_hash_netportnet.c25 /* 1 Forceadd support added */
75 return elem->nomatch ? -ENOTEMPTY : 1; in hash_netportnet4_do_data_match()
94 elem->ip[1] = orig->ip[1]; in hash_netportnet4_data_reset_elem()
102 elem->ip[1] &= ip_set_netmask(cidr); in hash_netportnet4_data_netmask()
103 elem->cidr[1] = cidr; in hash_netportnet4_data_netmask()
117 nla_put_ipaddr4(skb, IPSET_ATTR_IP2, data->ip[1]) || in hash_netportnet4_data_list()
120 nla_put_u8(skb, IPSET_ATTR_CIDR2, data->cidr[1]) || in hash_netportnet4_data_list()
144 hash_netportnet4_init(struct hash_netportnet4_elem *e) in hash_netportnet4_init() argument
146 e->cidr[0] = HOST_MASK; in hash_netportnet4_init()
147 e->cidr[1] = HOST_MASK; in hash_netportnet4_init()
[all …]
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb4/
Dl2t.c54 #define SYNC_WR_F SYNC_WR_V(1)
65 static inline unsigned int vlan_prio(const struct l2t_entry *e) in vlan_prio() argument
67 return e->vlan >> VLAN_PRIO_SHIFT; in vlan_prio()
70 static inline void l2t_hold(struct l2t_data *d, struct l2t_entry *e) in l2t_hold() argument
72 if (atomic_add_return(1, &e->refcnt) == 1) /* 0 -> 1 transition */ in l2t_hold()
98 u32 xor = key[0] ^ key[1] ^ key[2] ^ key[3]; in ipv6_hash()
118 static int addreq(const struct l2t_entry *e, const u32 *addr) in addreq() argument
120 if (e->v6) in addreq()
121 return (e->addr[0] ^ addr[0]) | (e->addr[1] ^ addr[1]) | in addreq()
122 (e->addr[2] ^ addr[2]) | (e->addr[3] ^ addr[3]); in addreq()
[all …]
/linux-6.12.1/fs/
Dbinfmt_misc.c34 # define USE_DEBUG 1
40 VERBOSE_STATUS = 1 /* make it zero to save 400 bytes kernel memory */
44 #define MISC_FMT_PRESERVE_ARGV0 (1UL << 31)
45 #define MISC_FMT_OPEN_BINARY (1UL << 30)
46 #define MISC_FMT_CREDENTIALS (1UL << 29)
47 #define MISC_FMT_OPEN_FILE (1UL << 28)
69 * - type: 1 byte
94 Node *e; in search_binfmt_handler() local
97 list_for_each_entry(e, &misc->entries, list) { in search_binfmt_handler()
102 if (!test_bit(Enabled, &e->flags)) in search_binfmt_handler()
[all …]
/linux-6.12.1/fs/ntfs3/
Dbitmap.c60 * Return: -1 if not found.
78 return -1; in wnd_scan()
109 return -1; in wnd_scan()
112 wpos = free_bits + 1; in wnd_scan()
117 return -1; in wnd_scan()
167 static inline bool rb_insert_count(struct rb_root *root, struct e_node *e) in rb_insert_count() argument
171 size_t e_ckey = e->count.key; in rb_insert_count()
172 size_t e_skey = e->start.key; in rb_insert_count()
187 WARN_ON(1); in rb_insert_count()
192 rb_link_node(&e->count.node, parent, p); in rb_insert_count()
[all …]
/linux-6.12.1/drivers/net/ethernet/mellanox/mlx5/core/esw/
Dindir_table.c21 #define MLX5_ESW_INDIR_TABLE_FWD_IDX (MLX5_ESW_INDIR_TABLE_SIZE - 1)
97 struct mlx5_esw_indir_table_entry *e) in mlx5_esw_indir_table_rule_get() argument
109 if (e->recirc_rule) { in mlx5_esw_indir_table_rule_get()
110 refcount_inc(&e->recirc_rule->refcnt); in mlx5_esw_indir_table_rule_get()
139 flow_act.fg = e->recirc_grp; in mlx5_esw_indir_table_rule_get()
141 dest.ft = mlx5_chains_get_table(chains, 0, 1, 0); in mlx5_esw_indir_table_rule_get()
146 handle = mlx5_add_flow_rules(e->ft, NULL, &flow_act, &dest, 1); in mlx5_esw_indir_table_rule_get()
155 refcount_set(&rule->refcnt, 1); in mlx5_esw_indir_table_rule_get()
156 e->recirc_rule = rule; in mlx5_esw_indir_table_rule_get()
160 mlx5_chains_put_table(chains, 0, 1, 0); in mlx5_esw_indir_table_rule_get()
[all …]
/linux-6.12.1/tools/testing/selftests/
Dkselftest_deps.sh13 echo -e "Usage: $0 -[p] <compiler> [test_name]\n"
14 echo -e "\tkselftest_deps.sh [-p] gcc"
15 echo -e "\tkselftest_deps.sh [-p] gcc mm"
16 echo -e "\tkselftest_deps.sh [-p] aarch64-linux-gnu-gcc"
17 echo -e "\tkselftest_deps.sh [-p] aarch64-linux-gnu-gcc mm\n"
30 exit 1
41 echo -e "\tPlease run $0 in"
42 echo -e "\ttools/testing/selftests directory ..."
43 exit 1
51 print_targets=1
[all …]
/linux-6.12.1/arch/x86/crypto/
Dsha1_ssse3_asm.S3 * This is a SIMD SHA-1 implementation. It requires the Intel(R) Supplemental
17 … http://software.intel.com/en-us/articles/improving-the-performance-of-the-secure-hash-algorithm-1/
67 * This macro implements the SHA-1 function's body for single 64-byte block
109 * This macro implements 80 rounds of SHA-1 for one 64-byte block
118 mov 16(HASH_PTR), E
123 .set i, (i+1)
127 1:
128 RR F1,A,B,C,D,E,0
129 RR F1,D,E,A,B,C,2
130 RR F1,B,C,D,E,A,4
[all …]
/linux-6.12.1/fs/bcachefs/
Dreplicas.c24 static void verify_replicas_entry(struct bch_replicas_entry_v1 *e) in verify_replicas_entry() argument
27 BUG_ON(!e->nr_devs); in verify_replicas_entry()
28 BUG_ON(e->nr_required > 1 && in verify_replicas_entry()
29 e->nr_required >= e->nr_devs); in verify_replicas_entry()
31 for (unsigned i = 0; i + 1 < e->nr_devs; i++) in verify_replicas_entry()
32 BUG_ON(e->devs[i] >= e->devs[i + 1]); in verify_replicas_entry()
36 void bch2_replicas_entry_sort(struct bch_replicas_entry_v1 *e) in bch2_replicas_entry_sort() argument
38 bubble_sort(e->devs, e->nr_devs, u8_cmp); in bch2_replicas_entry_sort()
48 struct bch_replicas_entry_v0 *e) in bch2_replicas_entry_v0_to_text() argument
50 bch2_prt_data_type(out, e->data_type); in bch2_replicas_entry_v0_to_text()
[all …]

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