| /linux-6.12.1/tools/testing/selftests/cgroup/ |
| D | test_cpuset_prs.sh | 2 # SPDX-License-Identifier: GPL-2.0
11 echo "$1"
16 [[ $(id -u) -eq 0 ]] || skip_test "Test must be run as root!"
23 CGROUP2=$(mount -t cgroup2 | head -1 | awk -e '{print $3}')
24 [[ -n "$CGROUP2" ]] || skip_test "Cgroup v2 mount point not found!"
28 NR_CPUS=$(lscpu | grep "^CPU(s):" | sed -e "s/.*:[[:space:]]*//")
29 [[ $NR_CPUS -lt 8 ]] && skip_test "Test needs at least 8 cpus available!"
32 if [[ -c /dev/console && -w /dev/console ]]
40 PROG=$1
42 DELAY_FACTOR=1
[all …]
|
| /linux-6.12.1/arch/arm64/include/asm/ |
| D | sysreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
96 #define PSTATE_UAO pstate_field(0, 3)
[all …]
|
| /linux-6.12.1/arch/powerpc/lib/ |
| D | feature-fixups-test.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
19 or 1,1,1
21 or 3,3,3
26 or 1,1,1
28 or 3,3,3
31 or 1,1,1
33 or 3,3,3
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | uncore-memory.json | 4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
15 "Counter": "0,1,2,3",
18 "PerPkg": "1",
26 "Counter": "0,1,2,3",
29 "Experimental": "1",
30 "PerPkg": "1",
37 "Counter": "0,1,2,3",
40 "Experimental": "1",
41 "PerPkg": "1",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/knightslanding/ |
| D | uncore-cache.json | 3 …ries successfully inserted into the TOR that match qualifications specified by the subevent -IPQ",
4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
12 …ries successfully inserted into the TOR that match qualifications specified by the subevent -IPQ",
13 "Counter": "0,1,2,3",
16 "PerPkg": "1",
21 …ries successfully inserted into the TOR that match qualifications specified by the subevent -IRQ",
22 "Counter": "0,1,2,3",
25 "PerPkg": "1",
30 …ries successfully inserted into the TOR that match qualifications specified by the subevent -IRQ",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | uncore-memory.json | 4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
15 "Counter": "0,1,2,3",
18 "PerPkg": "1",
26 "Counter": "0,1,2,3",
29 "Experimental": "1",
30 "PerPkg": "1",
37 "Counter": "0,1,2,3",
40 "Experimental": "1",
41 "PerPkg": "1",
[all …]
|
| /linux-6.12.1/drivers/phy/rockchip/ |
| D | phy-rockchip-inno-hdmi.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Author: Zheng Yang <zhengyang@rock-chips.com>
10 #include <linux/clk-provider.h>
16 #include <linux/nvmem-consumer.h>
29 #define RK3228_BYPASS_PWRON_EN BIT(1)
44 #define RK3228_RXSENSE_CLK_CH_ENABLE BIT(3)
46 #define RK3228_RXSENSE_DATA_CH1_ENABLE BIT(1)
50 #define RK3228_TMDS_DRIVER_ENABLE GENMASK(3, 0)
74 #define RK3228_PRE_PLL_TMDSCLK_DIV_A_MASK GENMASK(3, 2)
75 #define RK3228_PRE_PLL_TMDSCLK_DIV_A(x) UPDATE(x, 3, 2)
[all …]
|
| /linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
| D | rk3568-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include "rockchip-pinconf.dtsi"
15 /omit-if-no-ref/
16 acodec_pins: acodec-pins {
19 <1 RK_PB1 5 &pcfg_pull_none>,
21 <1 RK_PA1 5 &pcfg_pull_none>,
23 <1 RK_PA0 5 &pcfg_pull_none>,
25 <1 RK_PA7 5 &pcfg_pull_none>,
27 <1 RK_PB0 5 &pcfg_pull_none>,
[all …]
|
| /linux-6.12.1/tools/arch/arm64/include/asm/ |
| D | sysreg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #include <asm/gpr-num.h>
21 * [20-19] : Op0
22 * [18-16] : Op1
23 * [15-12] : CRn
24 * [11-8] : CRm
25 * [7-5] : Op2
82 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
95 #define PSTATE_UAO pstate_field(0, 3)
96 #define PSTATE_SSBS pstate_field(3, 1)
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | uncore-memory.json | 4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
15 "Counter": "0,1,2,3",
18 "PerPkg": "1",
26 "Counter": "0,1,2,3",
29 "PerPkg": "1",
36 "Counter": "0,1,2,3",
39 "PerPkg": "1",
46 "Counter": "0,1,2,3",
49 "PerPkg": "1",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/haswellx/ |
| D | uncore-memory.json | 4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
15 "Counter": "0,1,2,3",
18 "PerPkg": "1",
26 "Counter": "0,1,2,3",
29 "PerPkg": "1",
36 "Counter": "0,1,2,3",
39 "PerPkg": "1",
46 "Counter": "0,1,2,3",
49 "PerPkg": "1",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | uncore-memory.json | 4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
14 "Counter": "0,1,2,3",
17 "PerPkg": "1",
24 "Counter": "0,1,2,3",
27 "PerPkg": "1",
34 "Counter": "0,1,2,3",
37 "PerPkg": "1",
43 "Counter": "0,1,2,3",
46 "PerPkg": "1",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/sierraforest/ |
| D | uncore-interconnect.json | 4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
12 "Counter": "0,1,2,3",
15 "Experimental": "1",
16 "PerPkg": "1",
22 "Counter": "0,1,2,3",
25 "PerPkg": "1",
31 "Counter": "0,1,2,3",
34 "Experimental": "1",
35 "PerPkg": "1",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/graniterapids/ |
| D | uncore-interconnect.json | 4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
21 "Counter": "0,1,2,3",
24 "PerPkg": "1",
30 "Counter": "0,1,2,3",
33 "PerPkg": "1",
39 "Counter": "0,1,2,3",
42 "PerPkg": "1",
[all …]
|
| /linux-6.12.1/arch/powerpc/boot/ |
| D | string.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 addi r5,r3,-1
14 addi r4,r4,-1
15 1: lbzu r0,1(r4)
17 stbu r0,1(r5)
18 bne 1b
26 addi r6,r3,-1
27 addi r4,r4,-1
28 1: lbzu r0,1(r4)
30 stbu r0,1(r6)
[all …]
|
| /linux-6.12.1/arch/xtensa/variants/csp/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
35 #define XCHAL_CP_NUM 1 /* number of coprocessors */
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
44 #define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */
49 #define XCHAL_CP0_SA_ALIGN 1
51 #define XCHAL_CP1_SA_ALIGN 1
53 #define XCHAL_CP2_SA_ALIGN 1
55 #define XCHAL_CP3_SA_ALIGN 1
57 #define XCHAL_CP4_SA_ALIGN 1
[all …]
|
| /linux-6.12.1/arch/xtensa/variants/test_kc705_be/include/variant/ |
| D | tie.h | 2 * tie.h -- compile-time HAL definitions dependent on CORE & TIE configuration
11 Copyright (c) 1999-2015 Cadence Design Systems Inc.
36 #define XCHAL_CP_MAX 8 /* max CP ID + 1 (0 if none) */
45 #define XCHAL_CP_ID_AUDIOENGINELX 1 /* coprocessor ID (0..7) */
49 #define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */
54 #define XCHAL_CP0_SA_ALIGN 1
56 #define XCHAL_CP2_SA_ALIGN 1
58 #define XCHAL_CP3_SA_ALIGN 1
60 #define XCHAL_CP4_SA_ALIGN 1
62 #define XCHAL_CP5_SA_ALIGN 1
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| D | uncore-memory.json | 3 "BriefDescription": "Cycles - at UCLK",
4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
20 "Counter": "0,1,2,3",
23 "Experimental": "1",
24 "PerPkg": "1",
30 "Counter": "0,1,2,3",
33 "Experimental": "1",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| D | uncore-memory.json | 3 "BriefDescription": "Cycles - at UCLK",
4 "Counter": "0,1,2,3",
7 "PerPkg": "1",
12 "Counter": "0,1,2,3",
15 "PerPkg": "1",
20 "Counter": "0,1,2,3",
23 "Experimental": "1",
24 "PerPkg": "1",
30 "Counter": "0,1,2,3",
33 "Experimental": "1",
[all …]
|
| /linux-6.12.1/Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
15 1. Introduction
17 3. Differentiating hardware versions
18 4. Hardware version 1
25 5.2.1 Parity checking and packet re-synchronization
27 5.2.3 Two finger touch
28 6. Hardware version 3
31 6.2.1 One/Three finger touch
36 7.2.1 Status packet
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/westmereep-dp/ |
| D | pipeline.json | 4 "Counter": "0,1,2,3",
12 "Counter": "0,1,2,3",
13 "CounterMask": "1",
14 "EdgeDetect": "1",
17 "Invert": "1",
23 "Counter": "0,1,2,3",
31 "Counter": "0,1,2,3",
39 "Counter": "0,1,2,3",
47 "Counter": "0,1,2,3",
55 "Counter": "0,1,2,3",
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/westmereep-sp/ |
| D | pipeline.json | 4 "Counter": "0,1,2,3",
12 "Counter": "0,1,2,3",
13 "CounterMask": "1",
14 "EdgeDetect": "1",
17 "Invert": "1",
23 "Counter": "0,1,2,3",
31 "Counter": "0,1,2,3",
39 "Counter": "0,1,2,3",
47 "Counter": "0,1,2,3",
55 "Counter": "0,1,2,3",
[all …]
|
| /linux-6.12.1/include/dt-bindings/pinctrl/ |
| D | pads-imx8qm.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
12 #define IMX8QM_SIM0_RST 1
14 #define IMX8QM_SIM0_PD 3
285 #define IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 IMX8QM_SIM0_CLK 3
287 #define IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 IMX8QM_SIM0_RST 3
289 #define IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 IMX8QM_SIM0_IO 3
291 #define IMX8QM_SIM0_PD_DMA_I2C3_SCL IMX8QM_SIM0_PD 1
292 #define IMX8QM_SIM0_PD_LSIO_GPIO0_IO03 IMX8QM_SIM0_PD 3
294 #define IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA IMX8QM_SIM0_POWER_EN 1
295 #define IMX8QM_SIM0_POWER_EN_LSIO_GPIO0_IO04 IMX8QM_SIM0_POWER_EN 3
[all …]
|
| /linux-6.12.1/tools/perf/pmu-events/arch/x86/westmereex/ |
| D | pipeline.json | 4 "Counter": "0,1,2,3",
12 "Counter": "0,1,2,3",
13 "CounterMask": "1",
14 "EdgeDetect": "1",
17 "Invert": "1",
23 "Counter": "0,1,2,3",
31 "Counter": "0,1,2,3",
39 "Counter": "0,1,2,3",
47 "Counter": "0,1,2,3",
55 "Counter": "0,1,2,3",
[all …]
|
| /linux-6.12.1/arch/arm/mach-omap1/ |
| D | mux.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/arch/arm/mach-omap1/mux.c
7 * Copyright (C) 2003 - 2008 Nokia Corporation
15 #include <linux/soc/ti/omap1-io.h>
30 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
31 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
34 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
35 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
36 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
37 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
[all …]
|