Lines Matching +full:1 +full:- +full:3

4         "Counter": "0,1,2,3",
12 "Counter": "0,1,2,3",
13 "CounterMask": "1",
14 "EdgeDetect": "1",
17 "Invert": "1",
23 "Counter": "0,1,2,3",
31 "Counter": "0,1,2,3",
39 "Counter": "0,1,2,3",
47 "Counter": "0,1,2,3",
55 "Counter": "0,1,2,3",
63 "Counter": "0,1,2,3",
71 "Counter": "0,1,2,3",
79 "Counter": "0,1,2,3",
87 "Counter": "0,1,2,3",
95 "Counter": "0,1,2,3",
103 "Counter": "0,1,2,3",
111 "Counter": "0,1,2,3",
119 "Counter": "0,1,2,3",
127 "Counter": "0,1,2,3",
135 "Counter": "0,1,2,3",
143 "Counter": "0,1,2,3",
151 "Counter": "0,1,2,3",
159 "Counter": "0,1,2,3",
167 "Counter": "0,1,2,3",
170 "PEBS": "1",
176 "Counter": "0,1,2,3",
179 "PEBS": "1",
185 "Counter": "0,1,2,3",
188 "PEBS": "1",
194 "Counter": "0,1,2,3",
202 "Counter": "0,1,2,3",
210 "Counter": "0,1,2,3",
218 "Counter": "0,1,2,3",
226 "Counter": "0,1,2,3",
234 "Counter": "0,1,2,3",
242 "Counter": "0,1,2,3",
250 "Counter": "0,1,2,3",
258 "Counter": "0,1,2,3",
266 "Counter": "0,1,2,3",
274 "Counter": "0,1,2,3",
277 "PEBS": "1",
283 "Counter": "0,1,2,3",
286 "PEBS": "1",
292 "Counter": "0,1,2,3",
295 "PEBS": "1",
301 "Counter": "Fixed counter 3",
307 "Counter": "0,1,2,3",
321 "Counter": "0,1,2,3",
328 "Counter": "0,1,2,3",
332 "Invert": "1",
337 "Counter": "0,1,2,3",
345 "Counter": "0,1,2,3",
353 "Counter": "0,1,2,3",
361 "Counter": "0,1,2,3",
369 "Counter": "0,1,2,3",
377 "Counter": "0,1,2,3",
385 "Counter": "0,1,2,3",
393 "Counter": "0,1,2,3",
401 "Counter": "Fixed counter 1",
407 "Counter": "0,1,2,3",
410 "PEBS": "1",
416 "Counter": "0,1,2,3",
419 "PEBS": "1",
425 "Counter": "0,1,2,3",
429 "Invert": "1",
430 "PEBS": "1",
436 "Counter": "0,1,2,3",
440 "Invert": "1",
446 "BriefDescription": "Retired floating-point operations (Precise Event)",
447 "Counter": "0,1,2,3",
450 "PEBS": "1",
456 "Counter": "0,1",
464 "Counter": "0,1,2,3",
465 "CounterMask": "1",
473 "Counter": "0,1,2,3",
474 "CounterMask": "1",
477 "Invert": "1",
483 "Counter": "0,1,2,3",
491 "Counter": "0,1,2,3",
499 "Counter": "0,1,2,3",
506 "BriefDescription": "Self-Modifying Code detected",
507 "Counter": "0,1,2,3",
515 "Counter": "0,1,2,3",
523 "Counter": "0,1,2,3",
531 "Counter": "0,1,2,3",
539 "Counter": "0,1,2,3",
547 "Counter": "0,1,2,3",
555 "Counter": "0,1,2,3",
563 "Counter": "0,1,2,3",
571 "Counter": "0,1,2,3",
579 "Counter": "0,1,2,3",
587 "Counter": "0,1,2,3",
595 "Counter": "0,1,2,3",
603 "Counter": "0,1,2,3",
611 "Counter": "0,1,2,3",
618 "BriefDescription": "SIMD Packed-Double Uops retired (Precise Event)",
619 "Counter": "0,1,2,3",
622 "PEBS": "1",
627 "BriefDescription": "SIMD Packed-Single Uops retired (Precise Event)",
628 "Counter": "0,1,2,3",
631 "PEBS": "1",
636 "BriefDescription": "SIMD Scalar-Double Uops retired (Precise Event)",
637 "Counter": "0,1,2,3",
640 "PEBS": "1",
645 "BriefDescription": "SIMD Scalar-Single Uops retired (Precise Event)",
646 "Counter": "0,1,2,3",
649 "PEBS": "1",
655 "Counter": "0,1,2,3",
658 "PEBS": "1",
664 "Counter": "0,1,2,3",
672 "Counter": "0,1,2,3",
680 "Counter": "0,1,2,3",
681 "CounterMask": "1",
689 "Counter": "0,1,2,3",
690 "CounterMask": "1",
693 "Invert": "1",
698 "AnyThread": "1",
700 "Counter": "0,1,2,3",
701 "CounterMask": "1",
708 "AnyThread": "1",
709 "BriefDescription": "Cycles Uops executed on ports 0-4 (core count)",
710 "Counter": "0,1,2,3",
711 "CounterMask": "1",
718 "AnyThread": "1",
720 "Counter": "0,1,2,3",
721 "CounterMask": "1",
722 "EdgeDetect": "1",
725 "Invert": "1",
730 "AnyThread": "1",
731 "BriefDescription": "Uops executed on ports 0-4 (core count)",
732 "Counter": "0,1,2,3",
733 "CounterMask": "1",
734 "EdgeDetect": "1",
737 "Invert": "1",
742 "AnyThread": "1",
744 "Counter": "0,1,2,3",
745 "CounterMask": "1",
748 "Invert": "1",
753 "AnyThread": "1",
754 "BriefDescription": "Cycles no Uops issued on ports 0-4 (core count)",
755 "Counter": "0,1,2,3",
756 "CounterMask": "1",
759 "Invert": "1",
765 "Counter": "0,1,2,3",
772 "BriefDescription": "Uops issued on ports 0, 1 or 5",
773 "Counter": "0,1,2,3",
780 "BriefDescription": "Cycles no Uops issued on ports 0, 1 or 5",
781 "Counter": "0,1,2,3",
782 "CounterMask": "1",
785 "Invert": "1",
790 "BriefDescription": "Uops executed on port 1",
791 "Counter": "0,1,2,3",
798 "AnyThread": "1",
799 "BriefDescription": "Uops issued on ports 2, 3 or 4",
800 "Counter": "0,1,2,3",
807 "AnyThread": "1",
809 "Counter": "0,1,2,3",
816 "AnyThread": "1",
817 "BriefDescription": "Uops executed on port 3 (core count)",
818 "Counter": "0,1,2,3",
825 "AnyThread": "1",
827 "Counter": "0,1,2,3",
835 "Counter": "0,1,2,3",
843 "Counter": "0,1,2,3",
850 "AnyThread": "1",
852 "Counter": "0,1,2,3",
853 "CounterMask": "1",
856 "Invert": "1",
861 "AnyThread": "1",
863 "Counter": "0,1,2,3",
864 "CounterMask": "1",
872 "Counter": "0,1,2,3",
880 "Counter": "0,1,2,3",
881 "CounterMask": "1",
884 "Invert": "1",
890 "Counter": "0,1,2,3",
891 "CounterMask": "1",
894 "PEBS": "1",
900 "Counter": "0,1,2,3",
903 "PEBS": "1",
908 "BriefDescription": "Macro-fused Uops retired (Precise Event)",
909 "Counter": "0,1,2,3",
912 "PEBS": "1",
918 "Counter": "0,1,2,3",
921 "PEBS": "1",
927 "Counter": "0,1,2,3",
928 "CounterMask": "1",
931 "Invert": "1",
932 "PEBS": "1",
938 "Counter": "0,1,2,3",
942 "Invert": "1",
943 "PEBS": "1",
949 "Counter": "0,1,2,3",