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/linux-6.12.1/Documentation/devicetree/bindings/sound/
Datmel,sama5d2-pdmic.yaml61 default: 0
84 reg = <0xf8018000 0x124>;
87 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
93 pinctrl-0 = <&pinctrl_pdmic_default>;
97 atmel,mic-offset = <0x0>;
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dsam9x60.dtsi37 #size-cells = <0>;
39 cpu@0 {
42 reg = <0>;
48 reg = <0x20000000 0x10000000>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x00300000 0x100000>;
68 ranges = <0 0x00300000 0x100000>;
79 #size-cells = <0>;
81 reg = <0x00500000 0x100000
[all …]
Dat91sam9x5.dtsi44 #size-cells = <0>;
46 cpu@0 {
49 reg = <0>;
55 reg = <0x20000000 0x10000000>;
61 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
68 clock-frequency = <0>;
73 #clock-cells = <0>;
80 reg = <0x00300000 0x8000>;
[all …]
Dsama5d2.dtsi29 #size-cells = <0>;
31 cpu@0 {
34 reg = <0>;
41 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
46 reg = <0x740000 0x1000>;
62 reg = <0x73c000 0x1000>;
78 reg = <0x20000000 0x20000000>;
84 #clock-cells = <0>;
85 clock-frequency = <0>;
90 #clock-cells = <0>;
[all …]
Dsama5d3.dtsi46 #size-cells = <0>;
47 cpu@0 {
50 reg = <0x0>;
56 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
61 reg = <0x20000000 0x8000000>;
67 #clock-cells = <0>;
68 clock-frequency = <0>;
73 #clock-cells = <0>;
74 clock-frequency = <0>;
79 #clock-cells = <0>;
[all …]
Dsama5d4.dtsi47 #size-cells = <0>;
49 cpu@0 {
52 reg = <0>;
59 reg = <0x20000000 0x20000000>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
72 clock-frequency = <0>;
77 #clock-cells = <0>;
84 reg = <0x00210000 0x10000>;
[all …]
/linux-6.12.1/arch/mips/kernel/
Dsmp-bmips.c50 #define RESET_FROM_KSEG0 0x80080800
51 #define RESET_FROM_KSEG1 0xa0080800
68 /* SW interrupts 0,1 are used for interprocessor signaling */
69 #define IPI0_IRQ (MIPS_CPU_IRQ_BASE + 0)
73 #define ACTION_CLR_IPI(cpu, ipi) (0x2000 | CPUNUM(cpu, 9) | ((ipi) << 8))
74 #define ACTION_SET_IPI(cpu, ipi) (0x3000 | CPUNUM(cpu, 9) | ((ipi) << 8))
75 #define ACTION_BOOT_THREAD(cpu) (0x08 | CPUNUM(cpu, 0))
79 int i, cpu = 1, boot_cpu = 0; in bmips_smp_setup()
86 clear_c0_brcm_cmt_ctrl(0x30); in bmips_smp_setup()
89 set_c0_brcm_config_0(0x30000); in bmips_smp_setup()
[all …]