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/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dtable.c6 0x800, 0x80040000,
7 0x804, 0x00000003,
8 0x808, 0x0000FC00,
9 0x80C, 0x0000000A,
10 0x810, 0x10001331,
11 0x814, 0x020C3D10,
12 0x818, 0x02200385,
13 0x81C, 0x00000000,
14 0x820, 0x01000100,
15 0x824, 0x00390204,
[all …]
Ddm.h7 #define MAIN_ANT 0
10 #define AUX_ANT_CG_TRX 0
11 #define MAIN_ANT_CGCS_RX 0
15 #define DM_REG_RF_MODE_11N 0x00
16 #define DM_REG_RF_0B_11N 0x0B
17 #define DM_REG_CHNBW_11N 0x18
18 #define DM_REG_T_METER_11N 0x24
19 #define DM_REG_RF_25_11N 0x25
20 #define DM_REG_RF_26_11N 0x26
21 #define DM_REG_RF_27_11N 0x27
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dbrcm,bcmgenet.yaml56 "^mdio@[0-9a-f]+$":
82 reg = <0xf0b60000 0xfc4c>;
83 interrupts = <0x0 0x14 0x0>, <0x0 0x15 0x0>;
90 #size-cells = <0>;
91 reg = <0xe14 0x8>;
104 fixed-link = <1 0 1000 0 0>;
109 reg = <0xf0b80000 0xfc4c>;
110 interrupts = <0x0 0x16 0x0>, <0x0 0x17 0x0>;
115 #size-cells = <0>;
116 reg = <0xe14 0x8>;
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
Dtable.c7 0x800, 0x80040000,
8 0x804, 0x00000003,
9 0x808, 0x0000fc00,
10 0x80c, 0x0000000a,
11 0x810, 0x10005388,
12 0x814, 0x020c3d10,
13 0x818, 0x02200385,
14 0x81c, 0x00000000,
15 0x820, 0x01000100,
16 0x824, 0x00390004,
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/
Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10000330,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192du/
Dtable.c9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10001331,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
17 0x820, 0x01000100,
18 0x824, 0x00390004,
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dtable.c9 0x024, 0x0011800d,
10 0x028, 0x00ffdb83,
11 0x014, 0x088ba955,
12 0x010, 0x49022b03,
13 0x800, 0x80040002,
14 0x804, 0x00000003,
15 0x808, 0x0000fc00,
16 0x80c, 0x0000000a,
17 0x810, 0x80706388,
18 0x814, 0x020c3d10,
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192se/
Dtable.c7 0x01c, 0x07000000,
8 0x800, 0x00040000,
9 0x804, 0x00008003,
10 0x808, 0x0000fc00,
11 0x80c, 0x0000000a,
12 0x810, 0x10005088,
13 0x814, 0x020c3d10,
14 0x818, 0x00200185,
15 0x81c, 0x00000000,
16 0x820, 0x01000000,
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/
Dtable.c7 0x024, 0x0011800f,
8 0x028, 0x00ffdb83,
9 0x800, 0x80040002,
10 0x804, 0x00000003,
11 0x808, 0x0000fc00,
12 0x80c, 0x0000000a,
13 0x810, 0x10005388,
14 0x814, 0x020c3d10,
15 0x818, 0x02200385,
16 0x81c, 0x00000000,
[all …]
/linux-6.12.1/drivers/staging/rtl8723bs/hal/
Dodm_reg.h16 #define ODM_BB_RESET 0x002
17 #define ODM_DUMMY 0x4fe
18 #define RF_T_METER_OLD 0x24
19 #define RF_T_METER_NEW 0x42
21 #define ODM_EDCA_VO_PARAM 0x500
22 #define ODM_EDCA_VI_PARAM 0x504
23 #define ODM_EDCA_BE_PARAM 0x508
24 #define ODM_EDCA_BK_PARAM 0x50C
25 #define ODM_TXPAUSE 0x522
28 #define ODM_FPGA_PHY0_PAGE8 0x800
[all …]
Dodm_RegDefine11N.h13 #define ODM_REG_RF_MODE_11N 0x00
14 #define ODM_REG_RF_0B_11N 0x0B
15 #define ODM_REG_CHNBW_11N 0x18
16 #define ODM_REG_T_METER_11N 0x24
17 #define ODM_REG_RF_25_11N 0x25
18 #define ODM_REG_RF_26_11N 0x26
19 #define ODM_REG_RF_27_11N 0x27
20 #define ODM_REG_RF_2B_11N 0x2B
21 #define ODM_REG_RF_2C_11N 0x2C
22 #define ODM_REG_RXRF_A3_11N 0x3C
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtw88/
Drtw8723x.c16 [DESC_RATE1M] = { .addr = 0xe08, .mask = 0x0000ff00 },
17 [DESC_RATE2M] = { .addr = 0x86c, .mask = 0x0000ff00 },
18 [DESC_RATE5_5M] = { .addr = 0x86c, .mask = 0x00ff0000 },
19 [DESC_RATE11M] = { .addr = 0x86c, .mask = 0xff000000 },
20 [DESC_RATE6M] = { .addr = 0xe00, .mask = 0x000000ff },
21 [DESC_RATE9M] = { .addr = 0xe00, .mask = 0x0000ff00 },
22 [DESC_RATE12M] = { .addr = 0xe00, .mask = 0x00ff0000 },
23 [DESC_RATE18M] = { .addr = 0xe00, .mask = 0xff000000 },
24 [DESC_RATE24M] = { .addr = 0xe04, .mask = 0x000000ff },
25 [DESC_RATE36M] = { .addr = 0xe04, .mask = 0x0000ff00 },
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/igb/
De1000_phy.h8 e1000_ms_hw_default = 0,
15 e1000_smart_speed_default = 0,
60 #define IGP01E1000_PHY_PORT_CONFIG 0x10 /* Port Config */
61 #define IGP01E1000_PHY_PORT_STATUS 0x11 /* Status */
62 #define IGP01E1000_PHY_PORT_CTRL 0x12 /* Control */
63 #define IGP01E1000_PHY_LINK_HEALTH 0x13 /* PHY Link Health */
64 #define IGP02E1000_PHY_POWER_MGMT 0x19 /* Power Management */
65 #define IGP01E1000_PHY_PAGE_SELECT 0x1F /* Page Select */
66 #define IGP01E1000_PHY_PCS_INIT_REG 0x00B4
67 #define IGP01E1000_PHY_POLARITY_MASK 0x0078
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
Ddm.h11 #define MF_USC_LSC 0
14 #define MAIN_ANT 0
17 #define AUX_ANT_CG_TRX 0
18 #define MAIN_ANT_CGCS_RX 0
22 #define DM_REG_RF_MODE_11N 0x00
23 #define DM_REG_RF_0B_11N 0x0B
24 #define DM_REG_CHNBW_11N 0x18
25 #define DM_REG_T_METER_11N 0x24
26 #define DM_REG_RF_25_11N 0x25
27 #define DM_REG_RF_26_11N 0x26
[all …]
/linux-6.12.1/drivers/staging/rtl8192e/rtl8192e/
Dtable.c10 0x800, 0x00000000,
11 0x804, 0x00000001,
12 0x808, 0x0000fc00,
13 0x80c, 0x0000001c,
14 0x810, 0x801010aa,
15 0x814, 0x008514d0,
16 0x818, 0x00000040,
17 0x81c, 0x00000000,
18 0x820, 0x00000004,
19 0x824, 0x00690000,
[all …]
Dr8190P_rtl8256.c24 for (eRFPath = 0; eRFPath < priv->num_total_rf_path; eRFPath++) { in rtl92e_set_bandwidth()
28 0x0b, bMask12Bits, 0x100); in rtl92e_set_bandwidth()
30 0x2c, bMask12Bits, 0x3d7); in rtl92e_set_bandwidth()
32 0x0e, bMask12Bits, 0x021); in rtl92e_set_bandwidth()
36 0x0b, bMask12Bits, 0x300); in rtl92e_set_bandwidth()
38 0x2c, bMask12Bits, 0x3ff); in rtl92e_set_bandwidth()
40 0x0e, bMask12Bits, 0x0e1); in rtl92e_set_bandwidth()
52 u32 u4RegValue = 0; in rtl92e_config_rf()
57 u32 RegOffSetToBeCheck = 0x3; in rtl92e_config_rf()
58 u32 RegValueToBeCheck = 0x7f1; in rtl92e_config_rf()
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Ddm.h7 #define MAIN_ANT 0
10 #define AUX_ANT_CG_TRX 0
11 #define MAIN_ANT_CGCS_RX 0
17 #define DM_REG_RF_MODE_11N 0x00
18 #define DM_REG_RF_0B_11N 0x0B
19 #define DM_REG_CHNBW_11N 0x18
20 #define DM_REG_T_METER_11N 0x24
21 #define DM_REG_RF_25_11N 0x25
22 #define DM_REG_RF_26_11N 0x26
23 #define DM_REG_RF_27_11N 0x27
[all …]
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
Ddm.h7 #define MAIN_ANT 0
10 #define AUX_ANT_CG_TRX 0
11 #define MAIN_ANT_CGCS_RX 0
17 #define DM_REG_RF_MODE_11N 0x00
18 #define DM_REG_RF_0B_11N 0x0B
19 #define DM_REG_CHNBW_11N 0x18
20 #define DM_REG_T_METER_11N 0x24
21 #define DM_REG_RF_25_11N 0x25
22 #define DM_REG_RF_26_11N 0x26
23 #define DM_REG_RF_27_11N 0x27
[all …]
/linux-6.12.1/drivers/staging/rtl8723bs/include/
DHal8192CPhyReg.h41 /* BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF */
43 /* 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 */
44 /* 3. RF register 0x00-2E */
50 /* 3. Page8(0x800) */
52 #define rFPGA0_RFMOD 0x800 /* RF mode & CCK TxSC RF BW Setting?? */
54 #define rFPGA0_XA_HSSIParameter1 0x820 /* RF 3 wire register */
55 #define rFPGA0_XA_HSSIParameter2 0x824
56 #define rFPGA0_XB_HSSIParameter1 0x828
57 #define rFPGA0_XB_HSSIParameter2 0x82c
58 #define rTxAGC_B_Rate18_06 0x830
[all …]
/linux-6.12.1/arch/mips/boot/dts/brcm/
Dbcm7420.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x441400 0x30>, <0x441600 0x30>;
72 reg = <0x401800 0x30>;
81 reg = <0x400000 0xdc>;
[all …]
Dbcm7358.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
25 #address-cells = <0>;
35 #clock-cells = <0>;
41 #clock-cells = <0>;
51 ranges = <0 0x10000000 0x01000000>;
55 reg = <0x411400 0x30>;
66 reg = <0x403000 0x30>;
75 reg = <0x400000 0xdc>;
[all …]
Dbcm7362.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
31 #address-cells = <0>;
41 #clock-cells = <0>;
47 #clock-cells = <0>;
57 ranges = <0 0x10000000 0x01000000>;
61 reg = <0x411400 0x30>, <0x411600 0x30>;
72 reg = <0x403000 0x30>;
81 reg = <0x400000 0xdc>;
[all …]
Dbcm7360.dtsi9 #size-cells = <0>;
13 cpu@0 {
16 reg = <0>;
25 #address-cells = <0>;
35 #clock-cells = <0>;
41 #clock-cells = <0>;
51 ranges = <0 0x10000000 0x01000000>;
55 reg = <0x411400 0x30>;
66 reg = <0x403000 0x30>;
75 reg = <0x400000 0xdc>;
[all …]
/linux-6.12.1/drivers/staging/media/starfive/camss/
Dstf-isp.h19 #define STF_ISP_REG_OFFSET_MAX 0x0fff
23 #define ISP_REG_CSI_INPUT_EN_AND_STATUS 0x000
29 #define CSI_EN_S BIT(0)
31 #define ISP_REG_CSIINTS 0x008
33 #define CSI_SHA_M(n) ((n) << 0)
36 #define ISP_REG_CSI_MODULE_CFG 0x010
48 #define CSI_DC_EN BIT(0)
50 #define ISP_REG_SENSOR 0x014
53 #define IMAGER_SEL(n) ((n) << 0)
55 #define ISP_REG_RAW_FORMAT_CFG 0x018
[all …]
/linux-6.12.1/include/linux/fsl/
Dguts.h29 u32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
30 u32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
31 u32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and
34 u32 pordevsr; /* 0x.000c - POR I/O Device Status Register */
35 u32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */
36 u32 pordevsr2; /* 0x.0014 - POR device status register 2 */
37 u8 res018[0x20 - 0x18];
38 u32 porcir; /* 0x.0020 - POR Configuration Information
41 u8 res024[0x30 - 0x24];
42 u32 gpiocr; /* 0x.0030 - GPIO Control Register */
[all …]

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