16 	[DESC_RATE1M]	= { .addr = 0xe08, .mask = 0x0000ff00 },
17 	[DESC_RATE2M]	= { .addr = 0x86c, .mask = 0x0000ff00 },
18 	[DESC_RATE5_5M]	= { .addr = 0x86c, .mask = 0x00ff0000 },
19 	[DESC_RATE11M]	= { .addr = 0x86c, .mask = 0xff000000 },
20 	[DESC_RATE6M]	= { .addr = 0xe00, .mask = 0x000000ff },
21 	[DESC_RATE9M]	= { .addr = 0xe00, .mask = 0x0000ff00 },
22 	[DESC_RATE12M]	= { .addr = 0xe00, .mask = 0x00ff0000 },
23 	[DESC_RATE18M]	= { .addr = 0xe00, .mask = 0xff000000 },
24 	[DESC_RATE24M]	= { .addr = 0xe04, .mask = 0x000000ff },
25 	[DESC_RATE36M]	= { .addr = 0xe04, .mask = 0x0000ff00 },
26 	[DESC_RATE48M]	= { .addr = 0xe04, .mask = 0x00ff0000 },
27 	[DESC_RATE54M]	= { .addr = 0xe04, .mask = 0xff000000 },
28 	[DESC_RATEMCS0]	= { .addr = 0xe10, .mask = 0x000000ff },
29 	[DESC_RATEMCS1]	= { .addr = 0xe10, .mask = 0x0000ff00 },
30 	[DESC_RATEMCS2]	= { .addr = 0xe10, .mask = 0x00ff0000 },
31 	[DESC_RATEMCS3]	= { .addr = 0xe10, .mask = 0xff000000 },
32 	[DESC_RATEMCS4]	= { .addr = 0xe14, .mask = 0x000000ff },
33 	[DESC_RATEMCS5]	= { .addr = 0xe14, .mask = 0x0000ff00 },
34 	[DESC_RATEMCS6]	= { .addr = 0xe14, .mask = 0x00ff0000 },
35 	[DESC_RATEMCS7]	= { .addr = 0xe14, .mask = 0xff000000 },
45 	if ((val_ctx & BIT_MASK_CTX_TYPE) != 0)  in __rtw8723x_lck()
48 		rtw_write8(rtwdev, REG_TXPAUSE, 0xFF);  in __rtw8723x_lck()
53 	ret = read_poll_timeout(rtw_read_rf, rf_val, rf_val != 0x1,  in __rtw8723x_lck()
60 	if ((val_ctx & BIT_MASK_CTX_TYPE) != 0)  in __rtw8723x_lck()
63 		rtw_write8(rtwdev, REG_TXPAUSE, 0x00);  in __rtw8723x_lck()
67 	rtw_dbg(rtwdev, RTW_DBG_EFUSE, # name "=0x%02x\n",	\
70 	rtw_dbg(rtwdev, RTW_DBG_EFUSE, # name "=0x%02x%02x\n",	\
71 		(map)->name[0], (map)->name[1])
110 	for (int i = 0; i < tx_path_count; i++)  in __rtw8723x_debug_txpwr_limit()
114 			table[i].pwr_idx_2g.cck_base[0],  in __rtw8723x_debug_txpwr_limit()
123 	for (int i = 0; i < tx_path_count; i++)  in __rtw8723x_debug_txpwr_limit()
126 			'A' + i, 0 /* no diff for 1S */,  in __rtw8723x_debug_txpwr_limit()
133 	for (int i = 0; i < tx_path_count; i++)  in __rtw8723x_debug_txpwr_limit()
137 			table[i].pwr_idx_2g.bw40_base[0],  in __rtw8723x_debug_txpwr_limit()
145 	for (int i = 0; i < tx_path_count; i++)  in __rtw8723x_debug_txpwr_limit()
156 	for (int i = 0; i < tx_path_count; i++)  in __rtw8723x_debug_txpwr_limit()
167 	for (int i = 0; i < tx_path_count; i++)  in __rtw8723x_debug_txpwr_limit()
170 			'A' + i, 0 /* no diff for 1S */,  in __rtw8723x_debug_txpwr_limit()
250 	efuse->rfe_option = 0;  in __rtw8723x_read_efuse()
254 	efuse->lna_type_2g = map->lna_type_2g[0];  in __rtw8723x_read_efuse()
256 	efuse->country_code[0] = map->country_code[0];  in __rtw8723x_read_efuse()
259 	efuse->regd = map->rf_board_option & 0x7;  in __rtw8723x_read_efuse()
260 	efuse->thermal_meter[0] = map->thermal_meter;  in __rtw8723x_read_efuse()
264 	for (i = 0; i < 4; i++)  in __rtw8723x_read_efuse()
282 	return 0;  in __rtw8723x_read_efuse()
290 #define WLAN_RX_FILTER0		0xFFFF
291 #define WLAN_RX_FILTER1		0x400
292 #define WLAN_RX_FILTER2		0xFFFF
293 #define WLAN_RCR_CFG		0x700060CE
305 	rtw_write32(rtwdev, REG_INT_MIG, 0);  in __rtw8723x_mac_init()
306 	rtw_write32(rtwdev, REG_MCUTST_1, 0x0);  in __rtw8723x_mac_init()
309 	rtw_write8(rtwdev, REG_2ND_CCA_CTRL, 0);  in __rtw8723x_mac_init()
311 	return 0;  in __rtw8723x_mac_init()
336 	for (j = 0; j < rtw_rate_size[rs]; j++) {  in rtw8723x_set_tx_power_index_by_rate()
341 			rtw_warn(rtwdev, "rate 0x%x isn't supported\n", rate);  in rtw8723x_set_tx_power_index_by_rate()
346 			rtw_warn(rtwdev, "rate 0x%x isn't defined\n", rate);  in rtw8723x_set_tx_power_index_by_rate()
359 	for (path = 0; path < hal->rf_path_num; path++) {  in __rtw8723x_set_tx_power_index()
360 		for (rs = 0; rs <= RTW_RATE_SECTION_HT_1S; rs++)  in __rtw8723x_set_tx_power_index()
418 	dm_info->vht_err_cnt = 0;  in __rtw8723x_false_alarm_statistics()
419 	dm_info->vht_ok_cnt = 0;  in __rtw8723x_false_alarm_statistics()
428 	rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTC_11N, BIT_MASK_OFDM_FA_RST, 0);  in __rtw8723x_false_alarm_statistics()
430 	rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_RST1, 0);  in __rtw8723x_false_alarm_statistics()
431 	rtw_write32_mask(rtwdev, REG_OFDM_FA_HOLDC_11N, BIT_MASK_OFDM_FA_KEEP, 0);  in __rtw8723x_false_alarm_statistics()
432 	rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, BIT_MASK_OFDM_FA_KEEP1, 0);  in __rtw8723x_false_alarm_statistics()
433 	rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_CNT_KPEN, 0);  in __rtw8723x_false_alarm_statistics()
435 	rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KPEN, 0);  in __rtw8723x_false_alarm_statistics()
438 	rtw_write32_mask(rtwdev, REG_PAGE_F_RST_11N, BIT_MASK_F_RST_ALL, 0);  in __rtw8723x_false_alarm_statistics()
449 	for (i = 0; i < RTW8723X_IQK_ADDA_REG_NUM; i++)  in __rtw8723x_iqk_backup_regs()
453 	for (i = 0; i < RTW8723X_IQK_MAC8_REG_NUM; i++)  in __rtw8723x_iqk_backup_regs()
456 	for (i = 0; i < RTW8723X_IQK_MAC32_REG_NUM; i++)  in __rtw8723x_iqk_backup_regs()
460 	for (i = 0; i < RTW8723X_IQK_BB_REG_NUM; i++)  in __rtw8723x_iqk_backup_regs()
476 	for (i = 0; i < RTW8723X_IQK_ADDA_REG_NUM; i++)  in __rtw8723x_iqk_restore_regs()
480 	for (i = 0; i < RTW8723X_IQK_MAC8_REG_NUM; i++)  in __rtw8723x_iqk_restore_regs()
483 	for (i = 0; i < RTW8723X_IQK_MAC32_REG_NUM; i++)  in __rtw8723x_iqk_restore_regs()
487 	for (i = 0; i < RTW8723X_IQK_BB_REG_NUM; i++)  in __rtw8723x_iqk_restore_regs()
491 	rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50);  in __rtw8723x_iqk_restore_regs()
494 	rtw_write32_mask(rtwdev, REG_OFDM0_XBAGC1, MASKBYTE0, 0x50);  in __rtw8723x_iqk_restore_regs()
497 	rtw_write32(rtwdev, REG_TXIQK_TONE_A_11N, 0x01008c00);  in __rtw8723x_iqk_restore_regs()
498 	rtw_write32(rtwdev, REG_RXIQK_TONE_A_11N, 0x01008c00);  in __rtw8723x_iqk_restore_regs()
507 	u32 bitmap = 0;  in __rtw8723x_iqk_similarity_cmp()
513 	for (i = 0; i < IQK_NR; i++) {  in __rtw8723x_iqk_similarity_cmp()
523 			if (result[c1][i] + result[c1][i + 1] == 0)  in __rtw8723x_iqk_similarity_cmp()
525 			else if (result[c2][i] + result[c2][i + 1] == 0)  in __rtw8723x_iqk_similarity_cmp()
534 	if (bitmap != 0)  in __rtw8723x_iqk_similarity_cmp()
537 	for (i = 0; i < PATH_NR; i++) {  in __rtw8723x_iqk_similarity_cmp()
549 	for (i = 0; i < IQK_NR; i++) {  in __rtw8723x_iqk_similarity_cmp()
586 		rtw_warn(rtwdev, "pwrtrack unhandled tx_rate 0x%x\n", tx_rate);  in __rtw8723x_pwrtrack_get_limit_ofdm()
608 	xtal_cap = rtwdev->efuse.crystal_cap & 0x3F;  in __rtw8723x_pwrtrack_set_xtal()
609 	xtal_cap = clamp_t(s8, xtal_cap + pwrtrk_xtal[delta], 0, 0x3F);  in __rtw8723x_pwrtrack_set_xtal()
620 	__le16 chksum = 0;  in __rtw8723x_fill_txdesc_checksum()
624 	le32p_replace_bits(&tx_desc->w7, 0, RTW_TX_DESC_W7_TXDESC_CHECKSUM);  in __rtw8723x_fill_txdesc_checksum()
641 	/* 0x790[5:0]=0x5 */  in __rtw8723x_coex_cfg_init()
642 	rtw_write8_mask(rtwdev, REG_BT_TDMA_TIME, BIT_MASK_SAMPLE_RATE, 0x5);  in __rtw8723x_coex_cfg_init()
645 	rtw_write8(rtwdev, REG_BT_STAT_CTRL, 0x1);  in __rtw8723x_coex_cfg_init()
657 		0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, 0xe7c, 0xe80, 0xe84,
658 		0xe88, 0xe8c, 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, 0xeec
660 	.iqk_mac8_regs = {0x522, 0x550, 0x551},
661 	.iqk_mac32_regs = {0x40},
663 		0xc04, 0xc08, 0x874, 0xb68, 0xb6c, 0x870, 0x860, 0x864, 0xa04
672 		[RF_PATH_A] = { .hssi_1 = 0x820, .lssi_read    = 0x8a0,
673 				.hssi_2 = 0x824, .lssi_read_pi = 0x8b8},
674 		[RF_PATH_B] = { .hssi_1 = 0x828, .lssi_read    = 0x8a4,
675 				.hssi_2 = 0x82c, .lssi_read_pi = 0x8bc},
678 		[0] = { .addr = 0xc50, .mask = 0x7f },
679 		[1] = { .addr = 0xc50, .mask = 0x7f },
682 		[0] = { .addr = 0xa0c, .mask = 0x3f00 },