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/linux-6.12.1/drivers/dma/ti/
Dk3-psil-priv.h25 * 0x4400 and 0xc400) only the src configuration can be present. If no dst
26 * configuration found the code will look for (dst_thread_id & ~0x8000) to find
Dk3-psil-am62.c73 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
74 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
75 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
76 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
78 PSIL_PDMA_XY_PKT(0x4300),
79 PSIL_PDMA_XY_PKT(0x4301),
80 PSIL_PDMA_XY_PKT(0x4302),
81 PSIL_PDMA_XY_PKT(0x4303),
82 PSIL_PDMA_XY_PKT(0x4304),
83 PSIL_PDMA_XY_PKT(0x4305),
[all …]
Dk3-psil-am62a.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
Dk3-psil-j7200.c64 PSIL_PDMA_MCASP(0x4400),
65 PSIL_PDMA_MCASP(0x4401),
66 PSIL_PDMA_MCASP(0x4402),
68 PSIL_PDMA_XY_PKT(0x4600),
69 PSIL_PDMA_XY_PKT(0x4601),
70 PSIL_PDMA_XY_PKT(0x4602),
71 PSIL_PDMA_XY_PKT(0x4603),
72 PSIL_PDMA_XY_PKT(0x4604),
73 PSIL_PDMA_XY_PKT(0x4605),
74 PSIL_PDMA_XY_PKT(0x4606),
[all …]
Dk3-psil-am62p.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
Dk3-psil-j721e.c72 PSIL_SA2UL(0x4000, 0),
73 PSIL_SA2UL(0x4001, 0),
74 PSIL_SA2UL(0x4002, 0),
75 PSIL_SA2UL(0x4003, 0),
77 PSIL_ETHERNET(0x4100),
78 PSIL_ETHERNET(0x4101),
79 PSIL_ETHERNET(0x4102),
80 PSIL_ETHERNET(0x4103),
82 PSIL_ETHERNET(0x4200),
83 PSIL_ETHERNET(0x4201),
[all …]
/linux-6.12.1/arch/csky/kernel/
Djump_label.c10 #define NOP32_HI 0xc400
11 #define NOP32_LO 0x4820
12 #define BSR_LINK 0xe000
19 int ret = 0; in arch_jump_label_transform()
29 insn[0] = BSR_LINK | in arch_jump_label_transform()
30 ((uint16_t)((unsigned long) offset >> 16) & 0x3ff); in arch_jump_label_transform()
31 insn[1] = (uint16_t)((unsigned long) offset & 0xffff); in arch_jump_label_transform()
33 insn[0] = NOP32_HI; in arch_jump_label_transform()
Dftrace.c11 #define NOP 0x4000
12 #define NOP32_HI 0xc400
13 #define NOP32_LO 0x4820
14 #define PUSH_LR 0x14d0
15 #define MOVIH_LINK 0xea3a
16 #define ORI_LINK 0xef5a
17 #define JSR_LINK 0xe8fa
18 #define BSR_LINK 0xe000
46 call[0] = nolr ? NOP : PUSH_LR; in make_jbsr()
54 call[4] = callee & 0xffff; in make_jbsr()
[all …]
/linux-6.12.1/drivers/net/ethernet/chelsio/cxgb3/
Daq100x.c38 AQ_LINK_STAT = 0xe800,
39 AQ_IMASK_PMA = 0xf000,
42 AQ_XAUI_RX_CFG = 0xc400,
43 AQ_XAUI_TX_CFG = 0xe400,
46 AQ_1G_CTRL = 0xc400,
47 AQ_ANEG_STAT = 0xc800,
50 AQ_FW_VERSION = 0x0020,
51 AQ_IFLAG_GLOBAL = 0xfc00,
52 AQ_IMASK_GLOBAL = 0xff00,
74 CH_WARN(phy->adapter, "PHY%d: reset failed (0x%x).\n", in aq100x_reset()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Ddavinci-mcasp-audio.yaml35 description: 0 - I2S or 1 - DIT operation mode
37 - 0
52 0 - Inactive, 1 - TX, 2 - RX
58 minimum: 0
83 0 disables the FIFO use
90 0 disables the FIFO use
97 0 - 3-state, 2 - logic low, 3 - logic high
99 - 0
154 const: 0
175 - 0
[all …]
/linux-6.12.1/drivers/staging/media/meson/vdec/
Dhevc_regs.h9 #define HEVC_ASSIST_MMU_MAP_ADDR 0xc024
11 #define HEVC_ASSIST_MBOX1_CLR_REG 0xc1d4
12 #define HEVC_ASSIST_MBOX1_MASK 0xc1d8
14 #define HEVC_ASSIST_SCRATCH_0 0xc300
15 #define HEVC_ASSIST_SCRATCH_1 0xc304
16 #define HEVC_ASSIST_SCRATCH_2 0xc308
17 #define HEVC_ASSIST_SCRATCH_3 0xc30c
18 #define HEVC_ASSIST_SCRATCH_4 0xc310
19 #define HEVC_ASSIST_SCRATCH_5 0xc314
20 #define HEVC_ASSIST_SCRATCH_6 0xc318
[all …]
/linux-6.12.1/drivers/net/dsa/
Dbcm_sf2_regs.h13 REG_SWITCH_CNTRL = 0,
36 #define MDIO_MASTER_SEL (1 << 0)
39 #define SF2_REV_MASK 0xffff
41 #define SWITCH_TOP_REV_MASK 0xffff
44 #define PHY_REVISION_MASK 0xffff
47 #define IDDQ_BIAS (1 << 0)
54 #define PHY_PHYAD_MASK 0x1F
57 #define CROSSBAR_BCM4908_INT_P7 0
59 #define CROSSBAR_BCM4908_EXT_SERDES 0
64 #define LED_CNTRL_NO_LINK_ENCODE_SHIFT 0
[all …]
/linux-6.12.1/arch/arm64/boot/dts/broadcom/bcmbca/
Dbcm4908.dtsi26 #size-cells = <0>;
28 cpu0: cpu@0 {
31 reg = <0x0>;
33 cpu-release-addr = <0x0 0xfff8>;
40 reg = <0x1>;
42 cpu-release-addr = <0x0 0xfff8>;
49 reg = <0x2>;
51 cpu-release-addr = <0x0 0xfff8>;
58 reg = <0x3>;
60 cpu-release-addr = <0x0 0xfff8>;
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt7601u/
Dinit.c94 mt7601u_wr(dev, MT_USB_DMA_CFG, 0); in mt7601u_reset_csr_bbp()
96 mt7601u_wr(dev, MT_MAC_SYS_CTRL, 0); in mt7601u_reset_csr_bbp()
142 for (i = 0; i < 16; i++) { in mt76_init_beacon_offsets()
148 for (i = 0; i < 4; i++) in mt76_init_beacon_offsets()
167 mt7601u_wr(dev, MT_AUX_CLK_CFG, 0); in mt7601u_write_mac_initvals()
169 return 0; in mt7601u_write_mac_initvals()
181 for (i = 0; i < N_WCIDS; i++) { in mt7601u_init_wcid_mem()
182 vals[i * 2] = 0xffffffff; in mt7601u_init_wcid_mem()
183 vals[i * 2 + 1] = 0x00ffffff; in mt7601u_init_wcid_mem()
210 for (i = 0; i < N_WCIDS * 2; i++) in mt7601u_init_wcid_attr_mem()
[all …]
/linux-6.12.1/sound/soc/codecs/
Drt1318.c34 { 0x0000C000, 0x01},
35 { 0x0000F20D, 0x00},
36 { 0x0000F212, 0x3E},
37 { 0x0000C001, 0x02},
38 { 0x0000C003, 0x22},
39 { 0x0000C004, 0x44},
40 { 0x0000C005, 0x44},
41 { 0x0000C007, 0x64},
42 { 0x0000C00E, 0xE7},
43 { 0x0000F223, 0x7F},
[all …]
Drt1318-sdw.c24 { 0xc001, 0x43 },
25 { 0xc003, 0xa2 },
26 { 0xc004, 0x44 },
27 { 0xc005, 0x44 },
28 { 0xc006, 0x33 },
29 { 0xc007, 0x64 },
30 { 0xc320, 0x20 },
31 { 0xf203, 0x18 },
32 { 0xf211, 0x00 },
33 { 0xf212, 0x26 },
[all …]
Drt286.c33 #define RT286_VENDOR_ID 0x10ec0286
34 #define RT288_VENDOR_ID 0x10ec0288
50 { 0x01, 0xaaaa },
51 { 0x02, 0x8aaa },
52 { 0x03, 0x0002 },
53 { 0x04, 0xaf01 },
54 { 0x08, 0x000d },
55 { 0x09, 0xd810 },
56 { 0x0a, 0x0120 },
57 { 0x0b, 0x0000 },
[all …]
Drt298.c33 #define RT298_VENDOR_ID 0x10ec0298
50 { 0x01, 0xa5a8 },
51 { 0x02, 0x8e95 },
52 { 0x03, 0x0002 },
53 { 0x04, 0xaf67 },
54 { 0x08, 0x200f },
55 { 0x09, 0xd010 },
56 { 0x0a, 0x0100 },
57 { 0x0b, 0x0000 },
58 { 0x0d, 0x2800 },
[all …]
Dwm9713.c32 #define WM9713_VENDOR_ID 0x574d4c13
33 #define WM9713_VENDOR_ID_MASK 0xffffffff
43 #define HPL_MIXER 0
70 SOC_ENUM_SINGLE(AC97_LINE, 3, 4, wm9713_mic_mixer), /* record mic mixer 0 */
74 SOC_ENUM_SINGLE(AC97_VIDEO, 0, 8, wm9713_rec_src), /* record mux right 4*/
83 SOC_ENUM_SINGLE(AC97_REC_GAIN, 0, 4, wm9713_out4_pga), /* out 4 source 13 */
92 static const DECLARE_TLV_DB_SCALE(out_tlv, -4650, 150, 0);
93 static const DECLARE_TLV_DB_SCALE(main_tlv, -3450, 150, 0);
94 static const DECLARE_TLV_DB_SCALE(misc_tlv, -1500, 300, 0);
96 0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
[all …]
/linux-6.12.1/include/linux/mfd/
Didt8a340_reg.h3 * Based on 5.2.0, Family Programming Guide (Sept 30, 2020)
10 #define PAGE_ADDR_BASE 0x0000
11 #define PAGE_ADDR 0x00fc
13 #define HW_REVISION 0x8180
14 #define REV_ID 0x007a
16 #define HW_DPLL_0 (0x8a00)
17 #define HW_DPLL_1 (0x8b00)
18 #define HW_DPLL_2 (0x8c00)
19 #define HW_DPLL_3 (0x8d00)
20 #define HW_DPLL_4 (0x8e00)
[all …]
/linux-6.12.1/drivers/net/phy/aquantia/
Daquantia_main.c18 #define PHY_ID_AQ1202 0x03a1b445
19 #define PHY_ID_AQ2104 0x03a1b460
20 #define PHY_ID_AQR105 0x03a1b4a2
21 #define PHY_ID_AQR106 0x03a1b4d0
22 #define PHY_ID_AQR107 0x03a1b4e0
23 #define PHY_ID_AQCS109 0x03a1b5c2
24 #define PHY_ID_AQR405 0x03a1b4b0
25 #define PHY_ID_AQR111 0x03a1b610
26 #define PHY_ID_AQR111B0 0x03a1b612
27 #define PHY_ID_AQR112 0x03a1b662
[all …]
/linux-6.12.1/drivers/input/misc/
Diqs7222.c25 #define IQS7222_PROD_NUM 0x00
31 #define IQS7222_SYS_STATUS 0x10
34 #define IQS7222_SYS_STATUS_ATI_ACTIVE BIT(0)
41 #define IQS7222_SLDR_SETUP_0_CHAN_CNT_MASK GENMASK(2, 0)
44 #define IQS7222_SLDR_SETUP_2_TOP_SPEED_MASK GENMASK(7, 0)
46 #define IQS7222_GPIO_SETUP_0_GPIO_EN BIT(0)
48 #define IQS7222_SYS_SETUP 0xD0
55 #define IQS7222_SYS_SETUP_ACK_RESET BIT(0)
61 #define IQS7222_EVENT_MASK_PROX BIT(0)
63 #define IQS7222_COMMS_HOLD BIT(0)
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/
Dsi.c159 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
160 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
161 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
164 (0x8000 << 16) | (0x98f4 >> 2),
165 0x00000000,
166 (0x8040 << 16) | (0x98f4 >> 2),
167 0x00000000,
168 (0x8000 << 16) | (0xe80 >> 2),
169 0x00000000,
170 (0x8040 << 16) | (0xe80 >> 2),
[all …]
/linux-6.12.1/drivers/firmware/
Dti_sci.h16 #define TI_SCI_MSG_ENABLE_WDT 0x0000
17 #define TI_SCI_MSG_WAKE_RESET 0x0001
18 #define TI_SCI_MSG_VERSION 0x0002
19 #define TI_SCI_MSG_WAKE_REASON 0x0003
20 #define TI_SCI_MSG_GOODBYE 0x0004
21 #define TI_SCI_MSG_SYS_RESET 0x0005
24 #define TI_SCI_MSG_SET_DEVICE_STATE 0x0200
25 #define TI_SCI_MSG_GET_DEVICE_STATE 0x0201
26 #define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202
29 #define TI_SCI_MSG_SET_CLOCK_STATE 0x0100
[all …]
/linux-6.12.1/drivers/usb/dwc3/
Dcore.h55 #define DWC3_EVENT_TYPE_MASK 0xfe
57 #define DWC3_EVENT_TYPE_DEV 0
61 #define DWC3_DEVICE_EVENT_DISCONNECT 0
74 #define DWC3_OTG_ROLE_IDLE 0
78 #define DWC3_GEVNTCOUNT_MASK 0xfffc
80 #define DWC3_GSNPSID_MASK 0xffff0000
81 #define DWC3_GSNPSREV_MASK 0xffff
85 #define DWC3_XHCI_REGS_START 0x0
86 #define DWC3_XHCI_REGS_END 0x7fff
87 #define DWC3_GLOBALS_REGS_START 0xc100
[all …]

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