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/linux-6.12.1/tools/testing/selftests/ia64/
Daliasing-test.c36 if (fnmatch("/proc/bus/pci/*", path, 0) == 0) { in map_mem()
59 return 0; in map_mem()
66 int i, n, r, rc = 0, result = 0; in scan_tree()
69 n = scandir(path, &namelist, 0, alphasort); in scan_tree()
70 if (n < 0) { in scan_tree()
75 for (i = 0; i < n; i++) { in scan_tree()
78 if (fnmatch(".", name, 0) == 0) in scan_tree()
80 if (fnmatch("..", name, 0) == 0) in scan_tree()
88 if (fnmatch(file, name, 0) == 0) { in scan_tree()
90 if (rc == 0) in scan_tree()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/crypto/
Dfsl-sec6.txt23 Definition: Must include "fsl,sec-v6.0".
63 compatible = "fsl,sec-v6.0";
67 reg = <0xa0000 0x20000>;
68 ranges = <0 0xa0000 0x20000>;
84 Definition: Must include "fsl,sec-v6.0-job-ring".
103 compatible = "fsl,sec-v6.0-job-ring";
104 reg = <0x1000 0x1000>;
105 interrupts = <49 2 0 0>;
115 In qoriq-sec6.0.dtsi:
117 compatible = "fsl,sec-v6.0";
[all …]
/linux-6.12.1/drivers/clk/imx/
Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/linux-6.12.1/drivers/vfio/pci/
Dvfio_pci_rdwr.c57 return 0; \
85 return 0; \
124 return 0; \
145 ssize_t done = 0; in vfio_pci_core_do_io_rw()
156 fillable = 0; in vfio_pci_core_do_io_rw()
189 u8 val = 0xFF; in vfio_pci_core_do_io_rw()
192 for (i = 0; i < filled; i++) in vfio_pci_core_do_io_rw()
215 return 0; in vfio_pci_core_setup_barmap()
221 io = pci_iomap(pdev, bar, 0); in vfio_pci_core_setup_barmap()
229 return 0; in vfio_pci_core_setup_barmap()
[all …]
/linux-6.12.1/drivers/video/
Dscreen_info_generic.c12 memset(r, 0, sizeof(*r)); in resource_init_named()
37 case 0x0d: /* 320x200-4 */ in __screen_info_has_ega_gfx()
38 case 0x0e: /* 640x200-4 */ in __screen_info_has_ega_gfx()
39 case 0x0f: /* 640x350-1 */ in __screen_info_has_ega_gfx()
40 case 0x10: /* 640x350-4 */ in __screen_info_has_ega_gfx()
50 case 0x10: /* 640x480-1 */ in __screen_info_has_vga_gfx()
51 case 0x12: /* 640x480-4 */ in __screen_info_has_vga_gfx()
52 case 0x13: /* 320-200-8 */ in __screen_info_has_vga_gfx()
53 case 0x6a: /* 800x600-4 (VESA) */ in __screen_info_has_vga_gfx()
82 if (num > 0) in screen_info_resources()
[all …]
/linux-6.12.1/arch/mips/boot/dts/ralink/
Dgardena_smart_gateway_mt7688.dts18 memory@0 {
20 reg = <0x0 0x8000000>;
27 pinctrl-0 = <&pinmux_gpio_gpio>; /* GPIO11 */
40 pinctrl-0 = <&pinmux_pwm0_gpio>, /* GPIO18 */
130 pinctrl-0 = <&pinmux_spi_spi>, <&pinmux_spi_cs1_cs>;
132 flash@0 {
134 reg = <0>;
142 partition@0 {
144 reg = <0x0 0xa0000>;
150 reg = <0xa0000 0x10000>;
[all …]
/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dc293si-post.dtsi39 interrupts = <19 2 0 0>;
42 /* controller at 0xa000 */
48 bus-range = <0 255>;
50 interrupts = <16 2 0 0>;
52 pcie@0 {
53 reg = <0 0 0 0 0>;
58 interrupts = <16 2 0 0>;
59 interrupt-map-mask = <0xf800 0 0 7>;
61 /* IDSEL 0x0 */
62 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/
Dmtk,scp.yaml217 reg = <0x10500000 0x80000>,
218 <0x10700000 0x8000>,
219 <0x10720000 0xe0000>;
233 reg = <0x10720000 0xe0000>,
234 <0x10700000 0x8000>;
239 ranges = <0 0x10500000 0x100000>;
241 scp@0 {
243 reg = <0x0 0xa0000>;
254 reg = <0xa0000 0x20000>;
/linux-6.12.1/drivers/gpu/drm/sun4i/
Dsun8i_mixer.h19 #define SUN8I_MIXER_GLOBAL_CTL 0x0
20 #define SUN8I_MIXER_GLOBAL_STATUS 0x4
21 #define SUN8I_MIXER_GLOBAL_DBUFF 0x8
22 #define SUN8I_MIXER_GLOBAL_SIZE 0xc
24 #define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0)
26 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0)
28 #define DE2_MIXER_UNIT_SIZE 0x6000
29 #define DE3_MIXER_UNIT_SIZE 0x3000
31 #define DE2_BLD_BASE 0x1000
32 #define DE2_CH_BASE 0x2000
[all …]
Dsun8i_csc.h14 #define CCSC00_OFFSET 0xAA050
15 #define CCSC01_OFFSET 0xFA050
16 #define CCSC01_D1_OFFSET 0xFA000
17 #define CCSC10_OFFSET 0xA0000
18 #define CCSC11_OFFSET 0xF0000
20 #define SUN8I_CSC_CTRL(base) ((base) + 0x0)
21 #define SUN8I_CSC_COEFF(base, i) ((base) + 0x10 + 4 * (i))
23 #define SUN8I_CSC_CTRL_EN BIT(0)
/linux-6.12.1/drivers/staging/media/atomisp/pci/
Dstr2mem_defs.h19 #define _STR2MEM_CRUN_BIT 0x100000
20 #define _STR2MEM_CMD_BITS 0x0F0000
21 #define _STR2MEM_COUNT_BITS 0x00FFFF
23 #define _STR2MEM_BLOCKS_CMD 0xA0000
24 #define _STR2MEM_PACKETS_CMD 0xB0000
25 #define _STR2MEM_BYTES_CMD 0xC0000
26 #define _STR2MEM_BYTES_FROM_PACKET_CMD 0xD0000
28 #define _STR2MEM_SOFT_RESET_REG_ID 0
/linux-6.12.1/drivers/gpu/drm/vboxvideo/
Dvboxvideo_vbe.h9 #define VBE_DISPI_BANK_ADDRESS 0xA0000
16 #define VBE_DISPI_IOPORT_INDEX 0x01CE
17 #define VBE_DISPI_IOPORT_DATA 0x01CF
19 #define VBE_DISPI_IOPORT_DAC_WRITE_INDEX 0x03C8
20 #define VBE_DISPI_IOPORT_DAC_DATA 0x03C9
22 #define VBE_DISPI_INDEX_ID 0x0
23 #define VBE_DISPI_INDEX_XRES 0x1
24 #define VBE_DISPI_INDEX_YRES 0x2
25 #define VBE_DISPI_INDEX_BPP 0x3
26 #define VBE_DISPI_INDEX_ENABLE 0x4
[all …]
/linux-6.12.1/sound/soc/intel/atom/sst/
Dsst_acpi.c38 #define SST_BYT_IRAM_PHY_START 0xff2c0000
39 #define SST_BYT_IRAM_PHY_END 0xff2d4000
40 #define SST_BYT_DRAM_PHY_START 0xff300000
41 #define SST_BYT_DRAM_PHY_END 0xff320000
42 #define SST_BYT_IMR_VIRT_START 0xc0000000 /* virtual addr in LPE */
43 #define SST_BYT_IMR_VIRT_END 0xc01fffff
44 #define SST_BYT_SHIM_PHY_ADDR 0xff340000
45 #define SST_BYT_MBOX_PHY_ADDR 0xff344000
46 #define SST_BYT_DMA0_PHY_ADDR 0xff298000
47 #define SST_BYT_DMA1_PHY_ADDR 0xff29c000
[all …]
/linux-6.12.1/arch/arm/mach-orion5x/
Dorion5x.h36 #define ORION5X_REGS_PHYS_BASE 0xf1000000
37 #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000)
40 #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000
41 #define ORION5X_PCIE_IO_BUS_BASE 0x00000000
44 #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000
45 #define ORION5X_PCI_IO_BUS_BASE 0x00010000
48 #define ORION5X_SRAM_PHYS_BASE (0xf2200000)
52 #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000
53 #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000)
56 #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000
[all …]
/linux-6.12.1/arch/arm/mach-omap2/
Domap34xx.h17 #define L4_34XX_BASE 0x48000000
18 #define L4_WK_34XX_BASE 0x48300000
19 #define L4_PER_34XX_BASE 0x49000000
20 #define L4_EMU_34XX_BASE 0x54000000
21 #define L3_34XX_BASE 0x68000000
23 #define L4_WK_AM33XX_BASE 0x44C00000
25 #define OMAP3430_32KSYNCT_BASE 0x48320000
26 #define OMAP3430_CM_BASE 0x48004800
27 #define OMAP3430_PRM_BASE 0x48306800
28 #define OMAP343X_SMS_BASE 0x6C000000
[all …]
Domap24xx.h19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
[all …]
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dtny_a9260_common.dtsi14 reg = <0x20000000 0x4000000>;
30 timer@0 {
32 reg = <0>, <1>;
51 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
55 reg = <0x3 0x0 0x800000>;
68 at91bootstrap@0 {
70 reg = <0x0 0x20000>;
75 reg = <0x20000 0x40000>;
80 reg = <0x60000 0x20000>;
85 reg = <0x80000 0x20000>;
[all …]
Dtny_a9263.dts19 reg = <0x20000000 0x4000000>;
39 timer@0 {
41 reg = <0>, <1>;
61 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
65 reg = <0x3 0x0 0x800000>;
78 at91bootstrap@0 {
80 reg = <0x0 0x20000>;
85 reg = <0x20000 0x40000>;
90 reg = <0x60000 0x20000>;
95 reg = <0x80000 0x20000>;
[all …]
Dusb_a9260_common.dtsi26 timer@0 {
28 reg = <0>, <1>;
53 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
57 reg = <0x3 0x0 0x800000>;
70 at91bootstrap@0 {
72 reg = <0x0 0x20000>;
77 reg = <0x20000 0x40000>;
82 reg = <0x60000 0x20000>;
87 reg = <0x80000 0x20000>;
92 reg = <0xa0000 0x20000>;
[all …]
/linux-6.12.1/arch/x86/include/uapi/asm/
De820.h4 #define E820MAP 0x2d0 /* our map */
29 #define E820NR 0x1e8 /* # entries in E820MAP */
70 #define ISA_START_ADDRESS 0xa0000
71 #define ISA_END_ADDRESS 0x100000
73 #define BIOS_BEGIN 0x000a0000
74 #define BIOS_END 0x00100000
76 #define BIOS_ROM_BASE 0xffe00000
77 #define BIOS_ROM_END 0xffffffff
/linux-6.12.1/drivers/acpi/acpica/
Dtbxfroot.c35 return (0); in acpi_tb_get_rsdp_length()
77 if (acpi_ut_checksum((u8 *)rsdp, ACPI_RSDP_CHECKSUM_LENGTH) != 0) { in acpi_tb_validate_rsdp()
84 (acpi_ut_checksum((u8 *)rsdp, ACPI_RSDP_XCHECKSUM_LENGTH) != 0)) { in acpi_tb_validate_rsdp()
128 "Could not map memory at 0x%8.8X for length %u", in acpi_find_root_pointer()
147 if (physical_address > 0x400 && physical_address < 0xA0000) { in acpi_find_root_pointer()
155 0xA0000 - physical_address); in acpi_find_root_pointer()
165 "Could not map memory at 0x%8.8X for length %u", in acpi_find_root_pointer()
197 "Could not map memory at 0x%8.8X for length %u", in acpi_find_root_pointer()
/linux-6.12.1/arch/alpha/include/asm/
Dvga.h59 (((a) >= 0x3b0) && ((a) < 0x3e0) && \
60 ((a) != 0x3b3) && ((a) != 0x3d3))
63 (((a) >= 0xa0000) && ((a) <= 0xc0000))
68 } while(0)
73 } while(0)
76 # define pci_vga_hose 0
77 # define __is_port_vga(a) 0
78 # define __is_mem_vga(a) 0
/linux-6.12.1/drivers/firmware/
Discsi_ibft_find.c45 #define VGA_MEM 0xA0000 /* VGA buffer */
46 #define VGA_SIZE 0x20000 /* 128kB */
53 unsigned long pos, virt_pos = 0; in reserve_ibft_region()
54 unsigned int len = 0; in reserve_ibft_region()
58 ibft_phys_addr = 0; in reserve_ibft_region()
73 if (offset_in_page(pos) == 0) { in reserve_ibft_region()
80 for (i = 0; i < ARRAY_SIZE(ibft_signs); i++) { in reserve_ibft_region()
82 IBFT_SIGN_LEN) == 0) { in reserve_ibft_region()
/linux-6.12.1/drivers/media/platform/qcom/venus/
Dhfi_venus_io.h9 #define VBIF_BASE 0x80000
11 #define VBIF_AXI_HALT_CTRL0 0x208
12 #define VBIF_AXI_HALT_CTRL1 0x20c
14 #define VBIF_AXI_HALT_CTRL0_HALT_REQ BIT(0)
15 #define VBIF_AXI_HALT_CTRL1_HALT_ACK BIT(0)
18 #define CPU_BASE 0xc0000
20 #define CPU_CS_BASE (CPU_BASE + 0x12000)
21 #define CPU_IC_BASE (CPU_BASE + 0x1f000)
22 #define CPU_BASE_V6 0xa0000
24 #define CPU_IC_BASE_V6 (CPU_BASE_V6 + 0x138)
[all …]
/linux-6.12.1/drivers/hwtracing/intel_th/
Dintel_th.h16 INTEL_TH_SOURCE = 0,
61 #define INTEL_TH_CAP(_th, _cap) ((_th)->drvdata ? (_th)->drvdata->_cap : 0)
107 for (i = 0; i < thdev->num_resources; i++) in intel_th_device_get_resource()
118 GTH_NONE = 0,
135 (thdev->output.port >= 0 || in intel_th_output_assigned()
245 TH_MMIO_CONFIG = 0,
314 REG_GTH_OFFSET = 0x0000,
315 REG_GTH_LENGTH = 0x2000,
318 REG_TSCU_OFFSET = 0x2000,
319 REG_TSCU_LENGTH = 0x1000,
[all …]

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