Lines Matching +full:0 +full:xa0000
16 INTEL_TH_SOURCE = 0,
61 #define INTEL_TH_CAP(_th, _cap) ((_th)->drvdata ? (_th)->drvdata->_cap : 0)
107 for (i = 0; i < thdev->num_resources; i++) in intel_th_device_get_resource()
118 GTH_NONE = 0,
135 (thdev->output.port >= 0 || in intel_th_output_assigned()
245 TH_MMIO_CONFIG = 0,
314 REG_GTH_OFFSET = 0x0000,
315 REG_GTH_LENGTH = 0x2000,
318 REG_TSCU_OFFSET = 0x2000,
319 REG_TSCU_LENGTH = 0x1000,
321 REG_CTS_OFFSET = 0x3000,
322 REG_CTS_LENGTH = 0x1000,
324 /* Software Trace Hub (STH) [0x4000..0x4fff] */
325 REG_STH_OFFSET = 0x4000,
326 REG_STH_LENGTH = 0x2000,
328 /* Memory Storage Unit (MSU) [0xa0000..0xa1fff] */
329 REG_MSU_OFFSET = 0xa0000,
330 REG_MSU_LENGTH = 0x02000,
332 /* Internal MSU trace buffer [0x80000..0x9ffff] */
333 BUF_MSU_OFFSET = 0x80000,
334 BUF_MSU_LENGTH = 0x20000,
351 SCRPD_MEM_IS_PRIM_DEST = BIT(0),
368 /* MSU controller 0/1 is enabled */