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/linux-6.12.1/Documentation/devicetree/bindings/dma/
Dcirrus,ep9301-dma-m2m.yaml76 reg = <0x80000100 0x0040>,
77 <0x80000140 0x0040>;
/linux-6.12.1/arch/arm/boot/dts/cirrus/
Dep7209.dtsi28 #address-cells = <0>;
29 #size-cells = <0>;
47 reg = <0x80000000 0xc000>;
53 reg = <0x80000000 0x4000>;
60 reg = <0x80000000 0x1 0x80000040 0x1>;
67 reg = <0x80000001 0x1 0x80000041 0x1>;
74 reg = <0x80000003 0x1 0x80000043 0x1>;
81 reg = <0x80000083 0x1 0x800000c3 0x1>;
88 reg = <0x80000100 0x80>;
96 reg = <0x80000180 0x80>;
[all …]
Dep93xx.dtsi18 reg = <0x80930000 0x1000>;
101 reg = <0x80900000 0x28>;
110 * windows in the 256MB space from 0x50000000 to 0x5fffffff.
116 reg = <0x80080000 0x20>;
125 reg = <0x80000000 0x0040>,
126 <0x80000040 0x0040>,
127 <0x80000080 0x0040>,
128 <0x800000c0 0x0040>,
129 <0x80000240 0x0040>,
130 <0x80000200 0x0040>,
[all …]
/linux-6.12.1/include/media/drv-intf/
Dcx25840.h45 CX25840_SVIDEO_LUMA1 = 0x10,
46 CX25840_SVIDEO_LUMA2 = 0x20,
47 CX25840_SVIDEO_LUMA3 = 0x30,
48 CX25840_SVIDEO_LUMA4 = 0x40,
49 CX25840_SVIDEO_LUMA5 = 0x50,
50 CX25840_SVIDEO_LUMA6 = 0x60,
51 CX25840_SVIDEO_LUMA7 = 0x70,
52 CX25840_SVIDEO_LUMA8 = 0x80,
53 CX25840_SVIDEO_CHROMA4 = 0x400,
54 CX25840_SVIDEO_CHROMA5 = 0x500,
[all …]
/linux-6.12.1/drivers/video/fbdev/geode/
Dvideo_cs5530.c29 { 39721, 0x31C45801, }, /* 25.1750 MHz */
30 { 35308, 0x20E36802, }, /* 28.3220 */
31 { 31746, 0x33915801, }, /* 31.5000 */
32 { 27777, 0x31EC4801, }, /* 36.0000 */
33 { 26666, 0x21E22801, }, /* 37.5000 */
34 { 25000, 0x33088801, }, /* 40.0000 */
35 { 22271, 0x33E22801, }, /* 44.9000 */
36 { 20202, 0x336C4801, }, /* 49.5000 */
37 { 20000, 0x23088801, }, /* 50.0000 */
38 { 19860, 0x23088801, }, /* 50.3500 */
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv40.c43 u32 ctrl = nvkm_rd32(device, reg + 0x00); in read_pll_1()
44 int P = (ctrl & 0x00070000) >> 16; in read_pll_1()
45 int N = (ctrl & 0x0000ff00) >> 8; in read_pll_1()
46 int M = (ctrl & 0x000000ff) >> 0; in read_pll_1()
47 u32 ref = 27000, khz = 0; in read_pll_1()
49 if (ctrl & 0x80000000) in read_pll_1()
59 u32 ctrl = nvkm_rd32(device, reg + 0x00); in read_pll_2()
60 u32 coef = nvkm_rd32(device, reg + 0x04); in read_pll_2()
61 int N2 = (coef & 0xff000000) >> 24; in read_pll_2()
62 int M2 = (coef & 0x00ff0000) >> 16; in read_pll_2()
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/gt/
Dgen9_renderstate.c11 0x000007a8,
12 0x000007b4,
13 0x000007bc,
14 0x000007cc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
Dgen8_renderstate.c11 0x00000798,
12 0x000007a4,
13 0x000007ac,
14 0x000007bc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxgf110.c32 { 0x001000, 1, 0x01, 0x00000004 },
33 { 0x0000a9, 1, 0x01, 0x0000ffff },
34 { 0x000038, 1, 0x01, 0x0fac6881 },
35 { 0x00003d, 1, 0x01, 0x00000001 },
36 { 0x0000e8, 8, 0x01, 0x00000400 },
37 { 0x000078, 8, 0x01, 0x00000300 },
38 { 0x000050, 1, 0x01, 0x00000011 },
39 { 0x000058, 8, 0x01, 0x00000008 },
40 { 0x000208, 8, 0x01, 0x00000001 },
41 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
Dctxgf119.c32 { 0x001000, 1, 0x01, 0x00000004 },
33 { 0x0000a9, 1, 0x01, 0x0000ffff },
34 { 0x000038, 1, 0x01, 0x0fac6881 },
35 { 0x00003d, 1, 0x01, 0x00000001 },
36 { 0x0000e8, 8, 0x01, 0x00000400 },
37 { 0x000078, 8, 0x01, 0x00000300 },
38 { 0x000050, 1, 0x01, 0x00000011 },
39 { 0x000058, 8, 0x01, 0x00000008 },
40 { 0x000208, 8, 0x01, 0x00000001 },
41 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
Dctxgk208.c32 { 0x001000, 1, 0x01, 0x00000004 },
33 { 0x000039, 3, 0x01, 0x00000000 },
34 { 0x0000a9, 1, 0x01, 0x0000ffff },
35 { 0x000038, 1, 0x01, 0x0fac6881 },
36 { 0x00003d, 1, 0x01, 0x00000001 },
37 { 0x0000e8, 8, 0x01, 0x00000400 },
38 { 0x000078, 8, 0x01, 0x00000300 },
39 { 0x000050, 1, 0x01, 0x00000011 },
40 { 0x000058, 8, 0x01, 0x00000008 },
41 { 0x000208, 8, 0x01, 0x00000001 },
[all …]
Dctxgf108.c34 { 0x001000, 1, 0x01, 0x00000004 },
35 { 0x0000a9, 1, 0x01, 0x0000ffff },
36 { 0x000038, 1, 0x01, 0x0fac6881 },
37 { 0x00003d, 1, 0x01, 0x00000001 },
38 { 0x0000e8, 8, 0x01, 0x00000400 },
39 { 0x000078, 8, 0x01, 0x00000300 },
40 { 0x000050, 1, 0x01, 0x00000011 },
41 { 0x000058, 8, 0x01, 0x00000008 },
42 { 0x000208, 8, 0x01, 0x00000001 },
43 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
Dctxgk110.c32 { 0x001000, 1, 0x01, 0x00000004 },
33 { 0x000039, 3, 0x01, 0x00000000 },
34 { 0x0000a9, 1, 0x01, 0x0000ffff },
35 { 0x000038, 1, 0x01, 0x0fac6881 },
36 { 0x00003d, 1, 0x01, 0x00000001 },
37 { 0x0000e8, 8, 0x01, 0x00000400 },
38 { 0x000078, 8, 0x01, 0x00000300 },
39 { 0x000050, 1, 0x01, 0x00000011 },
40 { 0x000058, 8, 0x01, 0x00000008 },
41 { 0x000208, 8, 0x01, 0x00000001 },
[all …]
Dctxgm107.c35 { 0x001000, 1, 0x01, 0x00000004 },
36 { 0x000039, 3, 0x01, 0x00000000 },
37 { 0x0000a9, 1, 0x01, 0x0000ffff },
38 { 0x000038, 1, 0x01, 0x0fac6881 },
39 { 0x00003d, 1, 0x01, 0x00000001 },
40 { 0x0000e8, 8, 0x01, 0x00000400 },
41 { 0x000078, 8, 0x01, 0x00000300 },
42 { 0x000050, 1, 0x01, 0x00000011 },
43 { 0x000058, 8, 0x01, 0x00000008 },
44 { 0x000208, 8, 0x01, 0x00000001 },
[all …]
Dctxgk104.c35 { 0x001000, 1, 0x01, 0x00000004 },
36 { 0x000039, 3, 0x01, 0x00000000 },
37 { 0x0000a9, 1, 0x01, 0x0000ffff },
38 { 0x000038, 1, 0x01, 0x0fac6881 },
39 { 0x00003d, 1, 0x01, 0x00000001 },
40 { 0x0000e8, 8, 0x01, 0x00000400 },
41 { 0x000078, 8, 0x01, 0x00000300 },
42 { 0x000050, 1, 0x01, 0x00000011 },
43 { 0x000058, 8, 0x01, 0x00000008 },
44 { 0x000208, 8, 0x01, 0x00000001 },
[all …]
Dctxgf100.c37 { 0x001000, 1, 0x01, 0x00000004 },
38 { 0x0000a9, 1, 0x01, 0x0000ffff },
39 { 0x000038, 1, 0x01, 0x0fac6881 },
40 { 0x00003d, 1, 0x01, 0x00000001 },
41 { 0x0000e8, 8, 0x01, 0x00000400 },
42 { 0x000078, 8, 0x01, 0x00000300 },
43 { 0x000050, 1, 0x01, 0x00000011 },
44 { 0x000058, 8, 0x01, 0x00000008 },
45 { 0x000208, 8, 0x01, 0x00000001 },
46 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
/linux-6.12.1/drivers/video/fbdev/
Dstifb.c120 #define REG_1 0x000118
121 #define REG_2 0x000480
122 #define REG_3 0x0004a0
123 #define REG_4 0x000600
124 #define REG_6 0x000800
125 #define REG_7 0x000804
126 #define REG_8 0x000820
127 #define REG_9 0x000a04
128 #define REG_10 0x018000
129 #define REG_11 0x018004
[all …]
/linux-6.12.1/drivers/media/dvb-frontends/
Dmxl692.c36 int ret = 0; in mxl692_i2c_write()
39 .flags = 0, in mxl692_i2c_write()
53 int ret = 0; in mxl692_i2c_read()
72 for (i = 0; i < (size & ~3); i += 4) { in convert_endian()
73 d[i + 0] ^= d[i + 3]; in convert_endian()
74 d[i + 3] ^= d[i + 0]; in convert_endian()
75 d[i + 0] ^= d[i + 3]; in convert_endian()
83 case 0: in convert_endian()
88 d[i + 0] ^= d[i + 1]; in convert_endian()
89 d[i + 1] ^= d[i + 0]; in convert_endian()
[all …]
/linux-6.12.1/drivers/gpu/drm/msm/registers/display/
Dhdmi.xml15 <value name="HDCP_KEYS_STATE_NO_KEYS" value="0"/>
25 <value name="DDC_WRITE" value="0"/>
29 <value name="ACR_NONE" value="0"/>
36 <value name="CEC_TX_OK" value="0"/>
42 <reg32 offset="0x00000" name="CTRL">
43 <bitfield name="ENABLE" pos="0" type="boolean"/>
47 <reg32 offset="0x00020" name="AUDIO_PKT_CTRL1">
48 <bitfield name="AUDIO_SAMPLE_SEND" pos="0" type="boolean"/>
50 <reg32 offset="0x00024" name="ACR_PKT_CTRL">
54 acr_pck_ctrl_reg |= 0x80000100;
[all …]
/linux-6.12.1/drivers/thunderbolt/
Dxdomain.c81 UUID_INIT(0xb638d70e, 0x42ff, 0x40bb,
82 0x97, 0xc2, 0x90, 0xe2, 0xc0, 0xb2, 0xff, 0x07);
126 req->result.err = 0; in tb_xdomain_copy()
163 * Return: %0 in case of success and negative errno in case of failure
215 * Return: %0 in case of success and negative errno in case of failure
246 return 0; in tb_xdp_handle_error()
260 return 0; in tb_xdp_handle_error()
270 memset(&req, 0, sizeof(req)); in tb_xdp_uuid_request()
274 memset(&res, 0, sizeof(res)); in tb_xdp_uuid_request()
289 return 0; in tb_xdp_uuid_request()
[all …]
Dtest.c21 return 0; in __ida_init()
51 sw->config.enabled = 0; in alloc_switch()
59 for (i = 0; i <= sw->config.max_port_number; i++) { in alloc_switch()
76 sw = alloc_switch(test, 0, 7, 13); in alloc_host()
80 sw->config.vendor_id = 0x8086; in alloc_host()
81 sw->config.device_id = 0x9a1b; in alloc_host()
83 sw->ports[0].config.type = TB_TYPE_PORT; in alloc_host()
84 sw->ports[0].config.max_in_hop_id = 7; in alloc_host()
85 sw->ports[0].config.max_out_hop_id = 7; in alloc_host()
130 sw->ports[7].config.nfc_credits = 0x41800000; in alloc_host()
[all …]