Searched +full:0 +full:x70000000 (Results 1 – 25 of 221) sorted by relevance
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| /linux-6.12.1/arch/arm64/boot/dts/ti/ |
| D | k3-am65.dtsi | 54 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
57 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
58 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
59 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
60 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
62 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
63 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
64 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
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| D | k3-am62p-main.dtsi | 11 reg = <0x00 0x0f910000 0x00 0x800>,
12 <0x00 0x0f918000 0x00 0x400>;
15 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
24 reg = <0x00 0x31100000 0x00 0x50000>;
25 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
26 <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
37 reg = <0x00 0x70000000 0x00 0x10000>;
38 ranges = <0x00 0x00 0x70000000 0x10000>;
47 <&main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD>,
60 gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>,
[all …]
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| D | k3-am64.dtsi | 54 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
58 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
63 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
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| D | k3-am62.dtsi | 55 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
56 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
57 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
58 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
59 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
60 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
61 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
62 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
63 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
64 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
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| D | k3-am62p.dtsi | 53 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
57 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
58 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
59 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
60 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
62 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
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| D | k3-am62a.dtsi | 54 ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
55 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
56 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
57 <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
58 <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
59 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
60 <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
61 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
62 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
63 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
[all …]
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| D | k3-j721s2.dtsi | 29 #size-cells = <0>;
42 cpu0: cpu@0 {
44 reg = <0x000>;
47 i-cache-size = <0xc000>;
50 d-cache-size = <0x8000>;
58 reg = <0x001>;
61 i-cache-size = <0xc000>;
64 d-cache-size = <0x8000>;
75 cache-size = <0x100000>;
118 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
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| D | k3-j7200.dtsi | 25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xc000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
113 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
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| D | k3-j721e.dtsi | 25 #size-cells = <0>;
39 cpu0: cpu@0 {
41 reg = <0x000>;
44 i-cache-size = <0xC000>;
47 d-cache-size = <0x8000>;
55 reg = <0x001>;
58 i-cache-size = <0xC000>;
61 d-cache-size = <0x8000>;
72 cache-size = <0x100000>;
114 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
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| /linux-6.12.1/drivers/of/unittest-data/ |
| D | tests-address.dtsi | 17 ranges = <0x70000000 0x70000000 0x50000000>,
18 <0x00000000 0xd0000000 0x20000000>;
19 dma-ranges = <0x0 0x20000000 0x40000000>;
22 reg = <0x70000000 0x1000>;
28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>;
29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>;
32 reg = <0x0 0x1000 0x0 0x1000>;
40 reg = <0x90000000 0x1000>;
41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>;
42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>,
[all …]
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| /linux-6.12.1/arch/sparc/include/asm/ |
| D | fbio.h | 10 #define CG6_FBC 0x70000000
11 #define CG6_TEC 0x70001000
12 #define CG6_BTREGS 0x70002000
13 #define CG6_FHC 0x70004000
14 #define CG6_THC 0x70005000
15 #define CG6_ROM 0x70006000
16 #define CG6_RAM 0x70016000
17 #define CG6_DHC 0x80000000
19 #define CG3_MMAP_OFFSET 0x4000000
22 #define TCX_RAM8BIT 0x00000000
[all …]
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| /linux-6.12.1/arch/arm/mach-tegra/ |
| D | iomap.h | 16 #define TEGRA_IRAM_BASE 0x40000000
19 #define TEGRA_ARM_PERIF_BASE 0x50040000
22 #define TEGRA_ARM_INT_DIST_BASE 0x50041000
25 #define TEGRA_TMR1_BASE 0x60005000
28 #define TEGRA_TMR2_BASE 0x60005008
31 #define TEGRA_TMRUS_BASE 0x60005010
34 #define TEGRA_TMR3_BASE 0x60005050
37 #define TEGRA_TMR4_BASE 0x60005058
40 #define TEGRA_CLK_RESET_BASE 0x60006000
43 #define TEGRA_FLOW_CTRL_BASE 0x60007000
[all …]
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| /linux-6.12.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/ |
| D | phytbl_lcn.c | 10 0x00000000,
11 0x00000000,
12 0x00000000,
13 0x00000000,
14 0x00000000,
15 0x00000000,
16 0x00000000,
17 0x00000000,
18 0x00000004,
19 0x00000000,
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/pci/ |
| D | sifive,fu740-pcie.yaml | 94 reg = <0xe 0x00000000 0x0 0x80000000>,
95 <0xd 0xf0000000 0x0 0x10000000>,
96 <0x0 0x100d0000 0x0 0x1000>;
100 bus-range = <0x0 0xff>;
101 ranges = <0x81000000 0x0 0x60080000 0x0 0x60080000 0x0 0x10000>, /* I/O */
102 <0x82000000 0x0 0x60090000 0x0 0x60090000 0x0 0xff70000>, /* mem */
103 <0x82000000 0x0 0x70000000 0x0 0x70000000 0x0 0x1000000>, /* mem */
104 … <0xc3000000 0x20 0x00000000 0x20 0x00000000 0x20 0x00000000>; /* mem prefetchable */
105 num-lanes = <0x8>;
109 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
[all …]
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| /linux-6.12.1/arch/m68k/include/asm/ |
| D | fbio.h | 13 #define FBTYPE_SUN1BW 0 /* mono */
58 #define FBIOGTYPE _IOR('F', 0, struct fbtype)
61 int index; /* first element (0 origin) */
124 #define FB_WID_SHARED_8 0
196 #define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
225 #define CG6_FBC 0x70000000
226 #define CG6_TEC 0x70001000
227 #define CG6_BTREGS 0x70002000
228 #define CG6_FHC 0x70004000
229 #define CG6_THC 0x70005000
[all …]
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| /linux-6.12.1/arch/powerpc/boot/dts/ |
| D | kuroboxHD.dts | 37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
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| D | kuroboxHG.dts | 37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
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| /linux-6.12.1/arch/arm64/boot/dts/sprd/ |
| D | sharkl64.dtsi | 27 reg = <0 0x70000000 0 0x100>;
28 interrupts = <0 2 0xf04>;
35 reg = <0 0x70100000 0 0x100>;
36 interrupts = <0 3 0xf04>;
43 reg = <0 0x70200000 0 0x100>;
44 interrupts = <0 4 0xf04>;
51 reg = <0 0x70300000 0 0x100>;
52 interrupts = <0 5 0xf04>;
61 #clock-cells = <0>;
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| /linux-6.12.1/include/uapi/linux/ |
| D | elf.h | 26 #define PT_NULL 0
34 #define PT_LOOS 0x60000000 /* OS-specific */
35 #define PT_HIOS 0x6fffffff /* OS-specific */
36 #define PT_LOPROC 0x70000000
37 #define PT_HIPROC 0x7fffffff
38 #define PT_GNU_EH_FRAME (PT_LOOS + 0x474e550)
39 #define PT_GNU_STACK (PT_LOOS + 0x474e551)
40 #define PT_GNU_RELRO (PT_LOOS + 0x474e552)
41 #define PT_GNU_PROPERTY (PT_LOOS + 0x474e553)
45 #define PT_AARCH64_MEMTAG_MTE (PT_LOPROC + 0x2)
[all …]
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| /linux-6.12.1/arch/mips/include/asm/ |
| D | elf.h | 21 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
22 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
23 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
24 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
25 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
26 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
27 #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
28 #define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
29 #define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
32 #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
[all …]
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| /linux-6.12.1/arch/arm/boot/dts/nxp/imx/ |
| D | imx50-evk.dts | 16 reg = <0x70000000 0x80000000>;
22 pinctrl-0 = <&pinctrl_cspi>;
33 partition@0 {
35 reg = <0x0 0x100000>;
41 reg = <0x100000 0x300000>;
48 pinctrl-0 = <&pinctrl_fec>;
58 MX50_PAD_CSPI_SCLK__CSPI_SCLK 0x00
59 MX50_PAD_CSPI_MISO__CSPI_MISO 0x00
60 MX50_PAD_CSPI_MOSI__CSPI_MOSI 0x00
61 MX50_PAD_CSPI_SS0__GPIO4_11 0xc4
[all …]
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| /linux-6.12.1/arch/arm64/boot/dts/exynos/ |
| D | exynosautov920-sadk.dts | 33 pinctrl-0 = <&key_wakeup &key_back>;
38 gpios = <&gpa0 0 GPIO_ACTIVE_LOW>;
51 reg = <0x0 0x80000000 0x0 0x70000000>,
52 <0x8 0x80000000 0x1 0xfba00000>,
53 <0xa 0x00000000 0x2 0x00000000>;
59 samsung,pins = "gpa0-0";
73 pinctrl-0 = <&pwm_tout0>;
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| /linux-6.12.1/arch/loongarch/boot/dts/ |
| D | loongson-2k2000-ref.dts | 24 reg = <0x0 0x00200000 0x0 0x0ee00000>,
25 <0x0 0x90000000 0x0 0x70000000>;
36 size = <0x0 0x2000000>;
70 #size-cells = <0>;
71 phy0: ethernet-phy@0 {
85 #size-cells = <0>;
100 #size-cells = <0>;
102 reg = <0>;
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| /linux-6.12.1/Documentation/devicetree/bindings/mtd/ |
| D | atmel-nand.txt | 38 device (always 0)
39 3rd entry: the memory region size (always 0x800000)
67 reg = <0x70000000 0x8000000>;
72 reg = <0xffffc070 0x490>,
73 <0xffffc500 0x100>;
81 reg = <0x10000000 0x10000000
82 0x40000000 0x30000000>;
83 ranges = <0x0 0x0 0x10000000 0x10000000
84 0x1 0x0 0x40000000 0x10000000
85 0x2 0x0 0x50000000 0x10000000
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/spi/ |
| D | st,stm32-qspi.yaml | 69 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
72 dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
73 <&mdma1 22 0x10 0x100008 0x0 0x0>;
79 #size-cells = <0>;
81 flash@0 {
83 reg = <0>;
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