Home
last modified time | relevance | path

Searched +full:0 +full:x5b (Results 1 – 25 of 630) sorted by relevance

12345678910>>...26

/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx7d-remarkable2.dts23 reg = <0x80000000 0x40000000>;
54 pinctrl-0 = <&pinctrl_brcm_reg>;
66 pinctrl-0 = <&pinctrl_digitizer_reg>;
79 pinctrl-0 = <&pinctrl_touch_reg>;
87 pinctrl-0 = <&pinctrl_wifi>;
102 assigned-clock-rates = <0>, <32768>;
108 pinctrl-0 = <&pinctrl_i2c1>;
113 reg = <0x09>;
114 hid-descr-addr = <0x01>;
116 pinctrl-0 = <&pinctrl_wacom>;
[all …]
Dimx7d-sdb.dts24 reg = <0x80000000 0x80000000>;
30 pinctrl-0 = <&pinctrl_gpio_keys>;
50 pinctrl-0 = <&pinctrl_spi4>;
56 #size-cells = <0>;
58 extended_io: gpio-expander@0 {
62 reg = <0>;
92 pinctrl-0 = <&pinctrl_usb_otg2_vbus_reg>;
112 pinctrl-0 = <&pinctrl_brcm_reg>;
130 pinctrl-0 = <&pinctrl_flexcan2_reg>;
140 pinctrl-0 = <&pinctrl_enet2_reg>;
[all …]
Dimx7d-pico.dtsi12 pwms = <&pwm4 0 50000 0>;
13 brightness-levels = <0 36 72 108 144 180 216 255>;
20 reg = <0x80000000 0>;
38 pinctrl-0 = <&pinctrl_reg_lcdreg_on>;
49 pinctrl-0 = <&pinctrl_reg_wlreg_on>;
75 pinctrl-0 = <&pinctrl_usbotg1_pwr>;
108 assigned-clock-rates = <0>, <32768>;
122 pinctrl-0 = <&pinctrl_ecspi3>;
128 pinctrl-0 = <&pinctrl_enet1>;
132 assigned-clock-rates = <0>, <100000000>;
[all …]
Dimx7-tqma7.dtsi14 reg = <0x80000000 0x20000000>;
34 pinctrl-0 = <&pinctrl_i2c1>;
43 pinctrl-0 = <&pinctrl_pmic1>;
45 reg = <0x08>;
137 reg = <0x48>;
143 reg = <0x1e>;
150 reg = <0x50>;
158 reg = <0x56>;
166 reg = <0x68>;
173 <MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078>,
[all …]
Dimx7s-warp.dts18 reg = <0x80000000 0x20000000>;
23 pinctrl-0 = <&pinctrl_gpio>;
39 pinctrl-0 = <&pinctrl_brcm_reg>;
49 pinctrl-0 = <&pinctrl_bt_reg>;
94 pinctrl-0 = <&pinctrl_i2c1>;
99 reg = <0x08>;
193 pinctrl-0 = <&pinctrl_i2c2>;
199 pinctrl-0 = <&pinctrl_ov2680>;
200 reg = <0x36>;
211 clock-lanes = <0>;
[all …]
Dimx7-colibri.dtsi15 brightness-levels = <0 45 63 88 119 158 203 255>;
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
22 pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>;
34 pinctrl-0 = <&pinctrl_usbc_det>;
40 pinctrl-0 = <&pinctrl_gpiokeys>;
111 pinctrl-0 = <&pinctrl_usbh_reg>;
151 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
157 assigned-clock-rates = <0>, <100000000>;
170 pinctrl-0 = <&pinctrl_enet1>;
175 #size-cells = <0>;
[all …]
Dimx7-mba7.dtsi27 gpios = <&pca9555 0 GPIO_ACTIVE_HIGH>;
43 button-0 {
86 io-channels = <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
87 <&adc2 0>, <&adc2 1>, <&adc2 2>, <&adc2 3>;
226 pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_ss0>;
227 cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>,
234 pinctrl-0 = <&pinctrl_ecspi2>;
240 pinctrl-0 = <&pinctrl_enet1>;
249 #size-cells = <0>;
251 ethphy1_0: ethernet-phy@0 {
[all …]
/linux-6.12.1/Documentation/admin-guide/
Dbtmrvl.rst14 bit 8:0 -- Gap
18 It could be any valid GPIO pin# (e.g. 0-7) or 0xff (SDIO interface
22 wakeup event, or 0xff for special host sleep setting.
26 # Use SDIO interface to wake up the host and set GAP to 0x80:
27 echo 0xff80 > /debug/btmrvl/config/gpiogap
30 # Use GPIO pin #3 to wake up the host and set GAP to 0xff:
31 echo 0x03ff > /debug/btmrvl/config/gpiogap
40 0 -- Disable auto sleep mode
49 echo 0 > /debug/btmrvl/config/psmode
59 0 -- Wake up firmware
[all …]
/linux-6.12.1/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
215 "\x52\xC3\x5B\x7A\x75\x14\xFD\x32\x38\xB8\x0A\xAD\x52\x98\x62\x8D"
231 "\x30\x82\x02\x5B" /* sequence of 603 bytes */
237 "\x48\x76\xED\x52\x0D\x60\xE1\xEC\x46\x19\x71\x9D\x8A\x5B\x8B\x80"
252 "\xAF\x94\x28\xC2\xB7\xB8\x88\x3F\xE4\x46\x3A\x4B\xC8\x5B\x1C\xB3"
258 "\x2D\x5B\x25\x21\x76\x45\x9D\x1F\x39\x75\x41\xBA\x2A\x58\xFB\x65"
277 "\x00\xB0\x6C\x4F\xDA\xBB\x63\x01\x19\x8D\x26\x5B\xDB\xAE\x94\x23"
315 "\x6A\x5E\xB9\x9A\xC7\xC4\x5B\x63\xDA\xA3\x3F\x5E\x92\x7A\x81\x5E"
331 "\x77\xAF\x51\x27\x5B\x5E\x69\xB8\x81\xE6\x11\xC5\x43\x23\x81\x04"
[all …]
Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
113 return 0; in dh_is_pubkey_valid()
126 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
134 val = mpi_alloc(0); in dh_is_pubkey_valid()
[all …]
/linux-6.12.1/drivers/scsi/aic7xxx/
Daic79xx_seq.h_shipped9 0xff, 0x02, 0x06, 0x78,
10 0x00, 0xea, 0x6e, 0x59,
11 0x01, 0xea, 0x04, 0x30,
12 0xff, 0x04, 0x0c, 0x78,
13 0x19, 0xea, 0x6e, 0x59,
14 0x19, 0xea, 0x04, 0x00,
15 0x33, 0xea, 0x68, 0x59,
16 0x33, 0xea, 0x00, 0x00,
17 0x60, 0x3a, 0x3a, 0x68,
18 0x04, 0x4d, 0x35, 0x78,
[all …]
/linux-6.12.1/drivers/soc/qcom/
Dspm.c29 #define SPM_CTL_INDEX 0x7f
31 #define SPM_CTL_EN BIT(0)
34 #define SPM_VCTL_VLVL GENMASK(7, 0)
35 #define SPM_PMIC_DATA_0_VLVL GENMASK(7, 0)
36 #define SPM_PMIC_DATA_1_MIN_VSEL GENMASK(5, 0)
91 [SPM_REG_AVS_CTL] = 0x904,
92 [SPM_REG_AVS_LIMIT] = 0x908,
97 .avs_ctl = 0x1010031,
98 .avs_limit = 0x4580458,
103 .avs_ctl = 0x101c031,
[all …]
/linux-6.12.1/drivers/hid/
Dhid-uclogic-core-test.c22 .event = { 0xA1, 0xB2, 0xC3, 0xD4 },
26 .event = { 0x1F, 0x2E, 0x3D, 0x4C, 0x5B, 0x6A },
33 .event = { 0xA1, 0xB2, 0xC3, 0xD4 },
38 .event = { 0x1F, 0x2E, 0x3D, 0x4C, 0x5B, 0x6A },
43 .event = { 0xA1, 0xB2, 0xC3 },
48 .event = { 0xA1, 0xB2, 0xC3, 0xD4, 0x00 },
53 .event = { 0x2E, 0x3D, 0x4C, 0x5B, 0x6A, 0x1F },
66 struct uclogic_params p = {0, }; in hid_test_uclogic_exec_event_hook_test()
76 for (n = 0; n < ARRAY_SIZE(hook_events); n++) { in hid_test_uclogic_exec_event_hook_test()
83 memcpy(filter->event, &hook_events[n].event[0], filter->size); in hid_test_uclogic_exec_event_hook_test()
[all …]
/linux-6.12.1/lib/crypto/
Dcurve25519-selftest.c16 .private = { 0x77, 0x07, 0x6d, 0x0a, 0x73, 0x18, 0xa5, 0x7d,
17 0x3c, 0x16, 0xc1, 0x72, 0x51, 0xb2, 0x66, 0x45,
18 0xdf, 0x4c, 0x2f, 0x87, 0xeb, 0xc0, 0x99, 0x2a,
19 0xb1, 0x77, 0xfb, 0xa5, 0x1d, 0xb9, 0x2c, 0x2a },
20 .public = { 0xde, 0x9e, 0xdb, 0x7d, 0x7b, 0x7d, 0xc1, 0xb4,
21 0xd3, 0x5b, 0x61, 0xc2, 0xec, 0xe4, 0x35, 0x37,
22 0x3f, 0x83, 0x43, 0xc8, 0x5b, 0x78, 0x67, 0x4d,
23 0xad, 0xfc, 0x7e, 0x14, 0x6f, 0x88, 0x2b, 0x4f },
24 .result = { 0x4a, 0x5d, 0x9d, 0x5b, 0xa4, 0xce, 0x2d, 0xe1,
25 0x72, 0x8e, 0x3b, 0xf4, 0x80, 0x35, 0x0f, 0x25,
[all …]
Dblake2s-selftest.c28 * for (i = 0; i < len; i++) {
29 * if (i && (i % 12) == 0)
31 * printf("0x%02x, ", vec[i]);
43 * key[0] = key[1] = 1;
47 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i)
52 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i) {
62 * return 0;
66 { 0xa1, },
67 { 0x7c, 0x89, },
68 { 0x74, 0x0e, 0xd4, },
[all …]
Daesgcm.c43 * Returns: 0 on success, or -EINVAL if @keysize or @authsize contain values
60 return 0; in aesgcm_expandkey()
67 while (len > 0) { in aesgcm_ghash()
114 while (len > 0) { in aesgcm_crypt()
261 "\x5b\xc9\x4f\xbc\x32\x21\xa5\xdb"
304 "\x26\x5b\x98\xb5\xd4\x8a\xb9\x19";
375 "\x58\x83\xf0\xc3\x70\x14\xc0\x5b"
378 "\xc6\x6a\x63\x39\x8a\x5b\xde\xcb"
419 "\x23\x27\x5b\x8b\x4b\xa5\x64\x97"
475 "\x3b\x4e\xac\xe8\x5b\xe8\x0f\xb7"
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/power/supply/
Dcw2015_battery.yaml61 #size-cells = <0>;
65 reg = <0x62>;
67 0x17 0x67 0x80 0x73 0x6E 0x6C 0x6B 0x63
68 0x77 0x51 0x5C 0x58 0x50 0x4C 0x48 0x36
69 0x15 0x0C 0x0C 0x19 0x5B 0x7D 0x6F 0x69
70 0x69 0x5B 0x0C 0x29 0x20 0x40 0x52 0x59
71 0x57 0x56 0x54 0x4F 0x3B 0x1F 0x7F 0x17
72 0x06 0x1A 0x30 0x5A 0x85 0x93 0x96 0x2D
73 0x48 0x77 0x9C 0xB3 0x80 0x52 0x94 0xCB
74 0x2F 0x00 0x64 0xA5 0xB5 0x11 0xF0 0x11
/linux-6.12.1/drivers/phy/samsung/
Dphy-exynos7-ufs.c10 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL 0x720
11 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
12 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
14 #define EXYNOS7_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS 0x5e
18 PHY_COMN_REG_CFG(0x00f, 0xfa, PWR_MODE_ANY),
19 PHY_COMN_REG_CFG(0x010, 0x82, PWR_MODE_ANY),
20 PHY_COMN_REG_CFG(0x011, 0x1e, PWR_MODE_ANY),
21 PHY_COMN_REG_CFG(0x017, 0x84, PWR_MODE_ANY),
22 PHY_TRSV_REG_CFG(0x035, 0x58, PWR_MODE_ANY),
23 PHY_TRSV_REG_CFG(0x036, 0x32, PWR_MODE_ANY),
[all …]
/linux-6.12.1/drivers/video/fbdev/sis/
Dinitextlfb.c40 unsigned short ModeIdIndex = 0, ClockIndex = 0; in sisfb_mode_rate_to_dclock()
41 unsigned short RRTI = 0; in sisfb_mode_rate_to_dclock()
46 if(rateindex > 0) rateindex--; in sisfb_mode_rate_to_dclock()
50 case 0x5a: ModeNo = 0x50; break; in sisfb_mode_rate_to_dclock()
51 case 0x5b: ModeNo = 0x56; in sisfb_mode_rate_to_dclock()
85 unsigned short ModeIdIndex = 0, index = 0, RRTI = 0; in sisfb_mode_rate_to_ddata()
88 if(!SiSInitPtr(SiS_Pr)) return 0; in sisfb_mode_rate_to_ddata()
90 if(rateindex > 0) rateindex--; in sisfb_mode_rate_to_ddata()
94 case 0x5a: ModeNo = 0x50; break; in sisfb_mode_rate_to_ddata()
95 case 0x5b: ModeNo = 0x56; in sisfb_mode_rate_to_ddata()
[all …]
/linux-6.12.1/drivers/ata/
Dpata_hpt3x2n.c31 USE_DPLL = (1 << 0)
41 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
50 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
64 { XFER_UDMA_7, 0x1c869c62 },
65 { XFER_UDMA_6, 0x1c869c62 },
66 { XFER_UDMA_5, 0x1c8a9c62 },
67 { XFER_UDMA_4, 0x1c8a9c62 },
68 { XFER_UDMA_3, 0x1c8e9c62 },
69 { XFER_UDMA_2, 0x1c929c62 },
70 { XFER_UDMA_1, 0x1c9a9c62 },
[all …]
Dpata_hpt37x.c41 * 0:3 data_high_time. Inactive time of DIOW_/DIOR_ for PIO and MW DMA.
50 * 21 CLK frequency for UDMA: 0=ATA clock, 1=dual ATA clock.
62 { XFER_UDMA_6, 0x12446231 }, /* 0x12646231 ?? */
63 { XFER_UDMA_5, 0x12446231 },
64 { XFER_UDMA_4, 0x12446231 },
65 { XFER_UDMA_3, 0x126c6231 },
66 { XFER_UDMA_2, 0x12486231 },
67 { XFER_UDMA_1, 0x124c6233 },
68 { XFER_UDMA_0, 0x12506297 },
70 { XFER_MW_DMA_2, 0x22406c31 },
[all …]
/linux-6.12.1/drivers/gpu/drm/panel/
Dpanel-samsung-db7430.c24 #define DB7430_ACCESS_PROT_OFF 0xb0
25 #define DB7430_UNKNOWN_B4 0xb4
26 #define DB7430_USER_SELECT 0xb5
27 #define DB7430_UNKNOWN_B7 0xb7
28 #define DB7430_UNKNOWN_B8 0xb8
29 #define DB7430_PANEL_DRIVING 0xc0
30 #define DB7430_SOURCE_CONTROL 0xc1
31 #define DB7430_GATE_INTERFACE 0xc4
32 #define DB7430_DISPLAY_H_TIMING 0xc5
33 #define DB7430_RGB_SYNC_OPTION 0xc6
[all …]
/linux-6.12.1/include/linux/mfd/
Drohm-bd96801.h7 #define BD96801_REG_SSCG_CTRL 0x09
8 #define BD96801_REG_SHD_INTB 0x20
9 #define BD96801_LDO5_VOL_LVL_REG 0x2c
10 #define BD96801_LDO6_VOL_LVL_REG 0x2d
11 #define BD96801_LDO7_VOL_LVL_REG 0x2e
12 #define BD96801_REG_BUCK_OVP 0x30
13 #define BD96801_REG_BUCK_OVD 0x35
14 #define BD96801_REG_LDO_OVP 0x31
15 #define BD96801_REG_LDO_OVD 0x36
16 #define BD96801_REG_BOOT_OVERTIME 0x3a
[all …]
/linux-6.12.1/fs/xfs/
Dxfs_dahash_test.c20 0x5b, 0x85, 0x21, 0xcb, 0x09, 0x68, 0x7d, 0x30,
21 0xc7, 0x69, 0xd7, 0x30, 0x92, 0xde, 0x59, 0xe4,
22 0xc9, 0x6e, 0x8b, 0xdb, 0x98, 0x6b, 0xaa, 0x60,
23 0xa8, 0xb5, 0xbc, 0x6c, 0xa9, 0xb1, 0x5b, 0x2c,
24 0xea, 0xb4, 0x92, 0x6a, 0x3f, 0x79, 0x91, 0xe4,
25 0xe9, 0x70, 0x51, 0x8c, 0x7f, 0x95, 0x6f, 0x1a,
26 0x56, 0xa1, 0x5c, 0x27, 0x03, 0x67, 0x9f, 0x3a,
27 0xe2, 0x31, 0x11, 0x29, 0x6b, 0x98, 0xfc, 0xc4,
28 0x53, 0x24, 0xc5, 0x8b, 0xce, 0x47, 0xb2, 0xb9,
29 0x32, 0xcb, 0xc1, 0xd0, 0x03, 0x57, 0x4e, 0xd4,
[all …]
/linux-6.12.1/net/wireless/certs/
Dsforshee.hex2 0x30, 0x82, 0x02, 0xa4, 0x30, 0x82, 0x01, 0x8c,
3 0x02, 0x09, 0x00, 0xb2, 0x8d, 0xdf, 0x47, 0xae,
4 0xf9, 0xce, 0xa7, 0x30, 0x0d, 0x06, 0x09, 0x2a,
5 0x86, 0x48, 0x86, 0xf7, 0x0d, 0x01, 0x01, 0x0b,
6 0x05, 0x00, 0x30, 0x13, 0x31, 0x11, 0x30, 0x0f,
7 0x06, 0x03, 0x55, 0x04, 0x03, 0x0c, 0x08, 0x73,
8 0x66, 0x6f, 0x72, 0x73, 0x68, 0x65, 0x65, 0x30,
9 0x20, 0x17, 0x0d, 0x31, 0x37, 0x31, 0x30, 0x30,
10 0x36, 0x31, 0x39, 0x34, 0x30, 0x33, 0x35, 0x5a,
11 0x18, 0x0f, 0x32, 0x31, 0x31, 0x37, 0x30, 0x39,
[all …]

12345678910>>...26