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/linux-6.12.1/drivers/accel/habanalabs/include/gaudi/asic_reg/
Dgaudi_blocks.h16 #define mmNIC0_PHY0_BASE 0x0ull
17 #define NIC0_PHY0_MAX_OFFSET 0x9F13
18 #define mmMME0_ACC_BASE 0x7FFC020000ull
19 #define MME0_ACC_MAX_OFFSET 0x5C00
20 #define MME0_ACC_SECTION 0x20000
21 #define mmMME0_SBAB_BASE 0x7FFC040000ull
22 #define MME0_SBAB_MAX_OFFSET 0x5800
23 #define MME0_SBAB_SECTION 0x1000
24 #define mmMME0_PRTN_BASE 0x7FFC041000ull
25 #define MME0_PRTN_MAX_OFFSET 0x5000
[all …]
/linux-6.12.1/drivers/power/supply/
Dmax17040_battery.c23 #define MAX17040_VCELL 0x02
24 #define MAX17040_SOC 0x04
25 #define MAX17040_MODE 0x06
26 #define MAX17040_VER 0x08
27 #define MAX17040_CONFIG 0x0C
28 #define MAX17040_STATUS 0x1A
29 #define MAX17040_CMD 0xFE
34 #define MAX17040_RCOMP_DEFAULT 0x9700
36 #define MAX17040_ATHD_MASK 0x3f
37 #define MAX17040_ALSC_MASK 0x40
[all …]
/linux-6.12.1/drivers/bus/
Domap_l3_smx.h14 #define L3_COMPONENT 0x000
15 #define L3_CORE 0x018
16 #define L3_AGENT_CONTROL 0x020
17 #define L3_AGENT_STATUS 0x028
18 #define L3_ERROR_LOG 0x058
23 #define L3_ERROR_LOG_ADDR 0x060
26 #define L3_SI_CONTROL 0x020
27 #define L3_SI_FLAG_STATUS_0 0x510
31 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
95 #define L3_SI_FLAG_STATUS_1 0x530
[all …]
/linux-6.12.1/drivers/media/dvb-frontends/
Dlgdt3305.h16 LGDT3305_MPEG_PARALLEL = 0,
21 LGDT3305_TPCLK_RISING_EDGE = 0,
26 LGDT3305_TPCLK_GATED = 0,
31 LGDT3305_TP_VALID_LOW = 0,
36 LGDT3305 = 0,
48 u16 usref_8vsb; /* default: 0x32c4 */
49 u16 usref_qam64; /* default: 0x5400 */
50 u16 usref_qam256; /* default: 0x2a80 */
52 /* disable i2c repeater - 0:repeater enabled 1:repeater disabled */
55 /* spectral inversion - 0:disabled 1:enabled */
[all …]
Dstv6111.c37 { 2572, 0 },
73 { 1548, 0 },
109 { 4870, 0x3000 },
110 { 4850, 0x3C00 },
111 { 4800, 0x4500 },
112 { 4750, 0x4800 },
113 { 4700, 0x4B00 },
114 { 4650, 0x4D00 },
115 { 4600, 0x4F00 },
116 { 4550, 0x5100 },
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/sound/
Damlogic,aiu.yaml95 reg = <0x5400 0x2ac>;
/linux-6.12.1/drivers/media/usb/gspca/
Dw996Xcf.c53 Return 0 on success, -1 otherwise.
61 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_fsb()
69 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0, in w9968cf_write_fsb()
71 value, 0x06, sd->gspca_dev.usb_buf, 6, 500); in w9968cf_write_fsb()
72 if (ret < 0) { in w9968cf_write_fsb()
80 Return 0 on success, a negative number otherwise.
86 if (sd->gspca_dev.usb_err < 0) in w9968cf_write_sb()
95 usb_sndctrlpipe(sd->gspca_dev.dev, 0), in w9968cf_write_sb()
96 0, in w9968cf_write_sb()
98 value, 0x01, NULL, 0, 500); in w9968cf_write_sb()
[all …]
/linux-6.12.1/drivers/regulator/
Dqcom_spmi-regulator.c25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
30 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
33 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
[all …]
/linux-6.12.1/drivers/cpufreq/
Dsun50i-cpufreq-nvmem.c22 #define NVMEM_MASK 0x7
45 return 0; in sun50i_h6_efuse_xlate()
59 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
60 * 0 and 2 seem identical from the OPP tables' point of view.
65 u32 value = 0; in sun50i_h616_efuse_xlate()
67 switch (speedbin & 0xffff) { in sun50i_h616_efuse_xlate()
68 case 0x2000: in sun50i_h616_efuse_xlate()
69 value = 0; in sun50i_h616_efuse_xlate()
71 case 0x2400: in sun50i_h616_efuse_xlate()
72 case 0x7400: in sun50i_h616_efuse_xlate()
[all …]
/linux-6.12.1/arch/arm/boot/dts/amlogic/
Dmeson.dtsi28 reg = <0xc1100000 0x200000>;
31 ranges = <0x0 0xc1100000 0x200000>;
37 reg = <0x4000 0x400>;
44 reg = <0x5400 0x2ac>;
53 reg = <0x7c00 0x200>;
58 reg = <0x8100 0x8>;
63 reg = <0x84c0 0x18>;
71 reg = <0x84dc 0x18>;
78 reg = <0x8500 0x20>;
81 #size-cells = <0>;
[all …]
/linux-6.12.1/arch/mips/include/asm/
Dcpu.h16 register 15, select 0) is defined in this (backwards compatible) way:
24 that bits 16-23 have been 0 for all MIPS processors before the MIPS32/64
28 #define PRID_OPT_MASK 0xff000000
34 #define PRID_COMP_MASK 0xff0000
36 #define PRID_COMP_LEGACY 0x000000
37 #define PRID_COMP_MIPS 0x010000
38 #define PRID_COMP_BROADCOM 0x020000
39 #define PRID_COMP_ALCHEMY 0x030000
40 #define PRID_COMP_SIBYTE 0x040000
41 #define PRID_COMP_SANDCRAFT 0x050000
[all …]
/linux-6.12.1/drivers/net/ethernet/amd/
Dariadne.h17 * Publication #16907, Rev. B, Amendment/0, May 1994
62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */
63 #define CSR1 0x0100 /* - IADR[15:0] */
64 #define CSR2 0x0200 /* - IADR[23:16] */
65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */
66 #define CSR4 0x0400 /* - Test and Features Control */
67 #define CSR6 0x0600 /* RCV/XMT Descriptor Table Length */
68 #define CSR8 0x0800 /* - Logical Address Filter, LADRF[15:0] */
69 #define CSR9 0x0900 /* - Logical Address Filter, LADRF[31:16] */
70 #define CSR10 0x0a00 /* - Logical Address Filter, LADRF[47:32] */
[all …]
/linux-6.12.1/sound/soc/codecs/
Drt1016.c31 {RT1016_VOL_CTRL_3, 0x8900},
32 {RT1016_ANA_CTRL_1, 0xa002},
33 {RT1016_ANA_CTRL_2, 0x0002},
34 {RT1016_CLOCK_4, 0x6700},
35 {RT1016_CLASSD_3, 0xdc55},
36 {RT1016_CLASSD_4, 0x376a},
37 {RT1016_CLASSD_5, 0x009f},
41 {0x00, 0x0000},
42 {0x01, 0x5400},
43 {0x02, 0x5506},
[all …]
/linux-6.12.1/drivers/net/ethernet/marvell/mvpp2/
Dmvpp2.h28 #define MVPP2_XDP_PASS 0
29 #define MVPP2_XDP_DROPPED BIT(0)
34 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port))
35 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port))
36 #define MVPP2_RX_MIN_PKT_SIZE_REG 0x60
37 #define MVPP2_RX_FIFO_INIT_REG 0x64
38 #define MVPP22_TX_FIFO_THRESH_REG(port) (0x8840 + 4 * (port))
39 #define MVPP22_TX_FIFO_SIZE_REG(port) (0x8860 + 4 * (port))
42 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port))
43 #define MVPP2_RX_LOW_LATENCY_PKT_SIZE(s) (((s) & 0xfff) << 16)
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/amdgpu/
Dvid.h26 #define SDMA0_REGISTER_OFFSET 0x0 /* not a register */
27 #define SDMA1_REGISTER_OFFSET 0x200 /* not a register */
30 #define KFD_VI_SDMA_QUEUE_OFFSET 0x80 /* not a register */
33 #define CRTC0_REGISTER_OFFSET (0x1b9c - 0x1b9c)
34 #define CRTC1_REGISTER_OFFSET (0x1d9c - 0x1b9c)
35 #define CRTC2_REGISTER_OFFSET (0x1f9c - 0x1b9c)
36 #define CRTC3_REGISTER_OFFSET (0x419c - 0x1b9c)
37 #define CRTC4_REGISTER_OFFSET (0x439c - 0x1b9c)
38 #define CRTC5_REGISTER_OFFSET (0x459c - 0x1b9c)
39 #define CRTC6_REGISTER_OFFSET (0x479c - 0x1b9c)
[all …]
/linux-6.12.1/drivers/pinctrl/mediatek/
Dpinctrl-mt7629.c12 MTK_PIN(_number, _name, 0, _eint_n, DRV_GRP1)
15 PIN_FIELD(0, 78, 0x300, 0x10, 0, 4),
19 PIN_FIELD(0, 78, 0x0, 0x10, 0, 1),
23 PIN_FIELD(0, 78, 0x200, 0x10, 0, 1),
27 PIN_FIELD(0, 78, 0x100, 0x10, 0, 1),
31 PIN_FIELD(0, 10, 0x1000, 0x10, 0, 1),
32 PIN_FIELD(11, 18, 0x2000, 0x10, 0, 1),
33 PIN_FIELD(19, 32, 0x3000, 0x10, 0, 1),
34 PIN_FIELD(33, 48, 0x4000, 0x10, 0, 1),
35 PIN_FIELD(49, 50, 0x5000, 0x10, 0, 1),
[all …]
/linux-6.12.1/arch/arm64/boot/dts/amlogic/
Dmeson-gx.dtsi35 hwrom_reserved: hwrom@0 {
36 reg = <0x0 0x0 0x0 0x1000000>;
42 reg = <0x0 0x10000000 0x0 0x200000>;
48 reg = <0x0 0x05000000 0x0 0x300000>;
54 reg = <0x0 0x05300000 0x0 0x2000000>;
61 size = <0x0 0x10000000>;
62 alignment = <0x0 0x400000>;
90 #address-cells = <0x2>;
91 #size-cells = <0x0>;
93 cpu0: cpu@0 {
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/ice/
Dice_ptp_consts.h17 0x092000,
18 0x126000,
19 0x1BA000,
20 0x24E000,
21 0x2E2000,
24 0x98,
30 0x093000,
31 0x127000,
32 0x1BB000,
33 0x24F000,
[all …]
/linux-6.12.1/sound/pci/hda/
Dpatch_cs8409-tables.c24 .index = 0,
37 .index = 0,
62 { CS8409_PIN_AFG, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */
63 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */
64 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */
65 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */
66 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */
67 { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */
72 { CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */
73 { CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */
[all …]
/linux-6.12.1/drivers/net/wireless/intersil/p54/
Dp54usb.c45 {USB_DEVICE(0x0411, 0x0050)}, /* Buffalo WLI2-USB2-G54 */
46 {USB_DEVICE(0x045e, 0x00c2)}, /* Microsoft MN-710 */
47 {USB_DEVICE(0x0506, 0x0a11)}, /* 3COM 3CRWE254G72 */
48 {USB_DEVICE(0x0675, 0x0530)}, /* DrayTek Vigor 530 */
49 {USB_DEVICE(0x06b9, 0x0120)}, /* Thomson SpeedTouch 120g */
50 {USB_DEVICE(0x0707, 0xee06)}, /* SMC 2862W-G */
51 {USB_DEVICE(0x07aa, 0x001c)}, /* Corega CG-WLUSB2GT */
52 {USB_DEVICE(0x083a, 0x4501)}, /* Accton 802.11g WN4501 USB */
53 {USB_DEVICE(0x083a, 0x4502)}, /* Siemens Gigaset USB Adapter */
54 {USB_DEVICE(0x083a, 0x5501)}, /* Phillips CPWUA054 */
[all …]
/linux-6.12.1/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_reg.h12 #define RVU_AF_MSIXTR_BASE (0x10)
13 #define RVU_AF_ECO (0x20)
14 #define RVU_AF_BLK_RST (0x30)
15 #define RVU_AF_PF_BAR4_ADDR (0x40)
16 #define RVU_AF_RAS (0x100)
17 #define RVU_AF_RAS_W1S (0x108)
18 #define RVU_AF_RAS_ENA_W1S (0x110)
19 #define RVU_AF_RAS_ENA_W1C (0x118)
20 #define RVU_AF_GEN_INT (0x120)
21 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
/linux-6.12.1/drivers/scsi/
Dsense_codes.h7 SENSE_CODE(0x0000, "No additional sense information")
8 SENSE_CODE(0x0001, "Filemark detected")
9 SENSE_CODE(0x0002, "End-of-partition/medium detected")
10 SENSE_CODE(0x0003, "Setmark detected")
11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected")
12 SENSE_CODE(0x0005, "End-of-data detected")
13 SENSE_CODE(0x0006, "I/O process terminated")
14 SENSE_CODE(0x0007, "Programmable early warning detected")
15 SENSE_CODE(0x0011, "Audio play operation in progress")
16 SENSE_CODE(0x0012, "Audio play operation paused")
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/
Dintel_uncore.c67 uncore->debug->unclaimed_mmio_check = 0; in mmio_debug_suspend()
116 if (id >= 0 && id < FW_DOMAIN_ID_COUNT) in intel_uncore_forcewake_domain_to_str()
138 fw_clear(d, 0xefff); in fw_domain_reset()
140 fw_clear(d, 0xffff); in fw_domain_reset()
168 return __wait_for_ack(d, ack, 0); in wait_ack_clear()
184 if (fw_ack(d) == ~0) { in fw_domain_wait_ack_clear()
186 "%s: MMIO unreliable (forcewake register returns 0xFFFFFFFF)!\n", in fw_domain_wait_ack_clear()
199 ACK_CLEAR = 0,
208 const u32 value = type == ACK_SET ? ack_bit : 0; in fw_domain_wait_ack_with_fallback()
241 "%s had to use fallback to %s ack, 0x%x (passes %u)\n", in fw_domain_wait_ack_with_fallback()
[all …]
/linux-6.12.1/drivers/gpu/drm/tests/
Ddrm_format_helper_test.c21 #define TEST_USE_DEFAULT_PITCH 0
123 .clip = DRM_RECT_INIT(0, 0, 1, 1),
124 .xrgb8888 = { 0x01FF0000 },
127 .expected = { 0x4C },
131 .expected = { 0xE0 },
135 .expected = { 0xF800 },
136 .expected_swab = { 0x00F8 },
140 .expected = { 0x7C00 },
144 .expected = { 0xFC00 },
148 .expected = { 0xF801 },
[all …]
/linux-6.12.1/drivers/pci/switch/
Dswitchtec.c46 MRPC_IDLE = 0,
173 memset(stdev->dma_mrpc->data, 0xFF, SWITCHTEC_MRPC_PAYLOAD_SIZE); in mrpc_cmd_submit()
201 return 0; in mrpc_queue_cmd()
215 stdev->mrpc_busy = 0; in mrpc_cleanup_cmd()
241 stuser->return_code = 0; in mrpc_complete_cmd()
251 if (stuser->return_code != 0) in mrpc_complete_cmd()
356 buf[len + 1] = 0; in io_string_show()
358 for (i = len - 1; i > 0; i--) { in io_string_show()
362 buf[i + 1] = 0; in io_string_show()
483 return 0; in switchtec_dev_open()
[all …]

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