22 #define NVMEM_MASK	0x7
45 		return 0;  in sun50i_h6_efuse_xlate()
59  * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
60  * 0 and 2 seem identical from the OPP tables' point of view.
65 	u32 value = 0;  in sun50i_h616_efuse_xlate()
67 	switch (speedbin & 0xffff) {  in sun50i_h616_efuse_xlate()
68 	case 0x2000:  in sun50i_h616_efuse_xlate()
69 		value = 0;  in sun50i_h616_efuse_xlate()
71 	case 0x2400:  in sun50i_h616_efuse_xlate()
72 	case 0x7400:  in sun50i_h616_efuse_xlate()
73 	case 0x2c00:  in sun50i_h616_efuse_xlate()
74 	case 0x7c00:  in sun50i_h616_efuse_xlate()
83 	case 0x5000:  in sun50i_h616_efuse_xlate()
84 	case 0x5400:  in sun50i_h616_efuse_xlate()
85 	case 0x6000:  in sun50i_h616_efuse_xlate()
88 	case 0x5c00:  in sun50i_h616_efuse_xlate()
91 	case 0x5d00:  in sun50i_h616_efuse_xlate()
92 		value = 0;  in sun50i_h616_efuse_xlate()
94 	case 0x6c00:  in sun50i_h616_efuse_xlate()
98 		pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n",  in sun50i_h616_efuse_xlate()
99 			speedbin & 0xffff);  in sun50i_h616_efuse_xlate()
100 		value = 0;  in sun50i_h616_efuse_xlate()
139 	cpu_dev = get_cpu_device(0);  in dt_has_supported_hw()
173 	cpu_dev = get_cpu_device(0);  in sun50i_cpufreq_get_efuse()
220 	if (speed < 0) {  in sun50i_cpufreq_nvmem_probe()
247 		if (ret < 0)  in sun50i_cpufreq_nvmem_probe()
254 							  NULL, 0);  in sun50i_cpufreq_nvmem_probe()
257 		return 0;  in sun50i_cpufreq_nvmem_probe()
323 	if (unlikely(ret < 0))  in sun50i_cpufreq_init()
328 						-1, NULL, 0);  in sun50i_cpufreq_init()
330 	if (ret == 0)  in sun50i_cpufreq_init()
331 		return 0;  in sun50i_cpufreq_init()