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/linux-6.12.1/drivers/regulator/
Dqcom_spmi-regulator.c25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00
26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01
27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02
28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04
29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08
30 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10
33 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00
34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01
35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02
36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04
[all …]
Dqcom-pm8008-regulator.c22 #define LDO_STEPPER_CTL_REG 0x3b
23 #define STEP_RATE_MASK GENMASK(1, 0)
25 #define LDO_VSET_LB_REG 0x40
27 #define LDO_ENABLE_REG 0x46
45 REGULATOR_LINEAR_RANGE(528000, 0, 122, 8000),
49 REGULATOR_LINEAR_RANGE(1504000, 0, 237, 8000),
53 { "ldo1", "vdd-l1-l2", 0x4000, 225000, nldo_ranges, },
54 { "ldo2", "vdd-l1-l2", 0x4100, 225000, nldo_ranges, },
55 { "ldo3", "vdd-l3-l4", 0x4200, 300000, pldo_ranges, },
56 { "ldo4", "vdd-l3-l4", 0x4300, 300000, pldo_ranges, },
[all …]
/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Ddra72x.dtsi27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
29 reg = <0x5b000 0x4>,
30 <0x5b010 0x4>;
36 clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
40 ranges = <0x0 0x5b000 0x1000>;
42 cal: cal@0 {
44 reg = <0x0000 0x400>,
45 <0x0800 0x40>,
46 <0x0900 0x40>;
51 ti,camerrx-control = <&scm_conf 0xE94>;
[all …]
Ddra74x.dtsi49 reg = <0x41500000 0x100>;
55 reg = <0x41501000 0x4>,
56 <0x41501010 0x4>,
57 <0x41501014 0x4>;
65 clocks = <&dsp2_clkctrl DRA7_DSP2_MMU0_DSP2_CLKCTRL 0>;
69 ranges = <0x0 0x41501000 0x1000>;
73 mmu0_dsp2: mmu@0 {
75 reg = <0x0 0x100>;
77 #iommu-cells = <0>;
78 ti,syscon-mmuconfig = <&dsp2_system 0x0>;
[all …]
/linux-6.12.1/drivers/dma/ti/
Dk3-psil-am654.c54 PSIL_SA2UL(0x4000, 0),
55 PSIL_SA2UL(0x4001, 0),
56 PSIL_SA2UL(0x4002, 0),
57 PSIL_SA2UL(0x4003, 0),
59 PSIL_ETHERNET(0x4100),
60 PSIL_ETHERNET(0x4101),
61 PSIL_ETHERNET(0x4102),
62 PSIL_ETHERNET(0x4103),
64 PSIL_ETHERNET(0x4200),
65 PSIL_ETHERNET(0x4201),
[all …]
Dk3-psil-am62.c73 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
74 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
75 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
76 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
78 PSIL_PDMA_XY_PKT(0x4300),
79 PSIL_PDMA_XY_PKT(0x4301),
80 PSIL_PDMA_XY_PKT(0x4302),
81 PSIL_PDMA_XY_PKT(0x4303),
82 PSIL_PDMA_XY_PKT(0x4304),
83 PSIL_PDMA_XY_PKT(0x4305),
[all …]
Dk3-psil-am62a.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
Dk3-psil-am64.c66 PSIL_SAUL(0x4000, 17, 32, 8, 32, 0),
67 PSIL_SAUL(0x4001, 18, 32, 8, 33, 0),
68 PSIL_SAUL(0x4002, 19, 40, 8, 40, 0),
69 PSIL_SAUL(0x4003, 20, 40, 8, 41, 0),
71 PSIL_ETHERNET(0x4100, 21, 48, 16),
72 PSIL_ETHERNET(0x4101, 22, 64, 16),
73 PSIL_ETHERNET(0x4102, 23, 80, 16),
74 PSIL_ETHERNET(0x4103, 24, 96, 16),
76 PSIL_ETHERNET(0x4200, 25, 112, 16),
77 PSIL_ETHERNET(0x4201, 26, 128, 16),
[all …]
Dk3-psil-am62p.c83 PSIL_SAUL(0x7504, 20, 35, 8, 35, 0),
84 PSIL_SAUL(0x7505, 21, 35, 8, 36, 0),
85 PSIL_SAUL(0x7506, 22, 43, 8, 43, 0),
86 PSIL_SAUL(0x7507, 23, 43, 8, 44, 0),
88 PSIL_PDMA_XY_PKT(0x4300),
89 PSIL_PDMA_XY_PKT(0x4301),
90 PSIL_PDMA_XY_PKT(0x4302),
91 PSIL_PDMA_XY_PKT(0x4303),
92 PSIL_PDMA_XY_PKT(0x4304),
93 PSIL_PDMA_XY_PKT(0x4305),
[all …]
/linux-6.12.1/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-fs4.dtsi37 ranges = <0x0 0x0 0x67000000 0x00800000>;
39 crypto_mbox: crypto_mbox@0 {
41 reg = <0x00000000 0x200000>;
42 msi-parent = <&gic_its 0x4100>;
49 reg = <0x00400000 0x200000>;
51 msi-parent = <&gic_its 0x4300>;
55 raid0: raid@0 {
57 mboxes = <&raid_mbox 0 0x1 0xff00>,
58 <&raid_mbox 1 0x1 0xff00>,
59 <&raid_mbox 2 0x1 0xff00>,
[all …]
/linux-6.12.1/include/uapi/linux/
Dptrace.h11 #define PTRACE_TRACEME 0
27 /* 0x4200-0x4300 are reserved for architecture-independent additions. */
28 #define PTRACE_SETOPTIONS 0x4200
29 #define PTRACE_GETEVENTMSG 0x4201
30 #define PTRACE_GETSIGINFO 0x4202
31 #define PTRACE_SETSIGINFO 0x4203
50 #define PTRACE_GETREGSET 0x4204
51 #define PTRACE_SETREGSET 0x4205
53 #define PTRACE_SEIZE 0x4206
54 #define PTRACE_INTERRUPT 0x4207
[all …]
/linux-6.12.1/arch/powerpc/include/asm/
Ddcr-regs.h29 #define DCRN_CPR0_CONFIG_ADDR 0xc
30 #define DCRN_CPR0_CONFIG_DATA 0xd
33 #define DCRN_SDR0_CONFIG_ADDR 0xe
34 #define DCRN_SDR0_CONFIG_DATA 0xf
36 #define SDR0_PFC0 0x4100
37 #define SDR0_PFC1 0x4101
38 #define SDR0_PFC1_EPS 0x1c00000
40 #define SDR0_PFC1_RMII 0x02000000
41 #define SDR0_MFR 0x4300
42 #define SDR0_MFR_TAH0 0x80000000 /* TAHOE0 Enable */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am654-icssg2.dtso16 ethernet1 = "/icssg2-eth/ethernet-ports/port@0";
24 pinctrl-0 = <&icssg2_rgmii_pins_default>;
47 interrupts = <24 0 2>, <25 1 3>;
50 dmas = <&main_udmap 0xc300>, /* egress slice 0 */
51 <&main_udmap 0xc301>, /* egress slice 0 */
52 <&main_udmap 0xc302>, /* egress slice 0 */
53 <&main_udmap 0xc303>, /* egress slice 0 */
54 <&main_udmap 0xc304>, /* egress slice 1 */
55 <&main_udmap 0xc305>, /* egress slice 1 */
56 <&main_udmap 0xc306>, /* egress slice 1 */
[all …]
/linux-6.12.1/drivers/video/fbdev/
Dbroadsheetfb.c68 .sdcfg = (67 | (0 << 8) | (0 << 9) | (0 << 10) | (0 << 12)),
71 .fsynclen = 0,
80 .sdcfg = (100 | (1 << 8) | (1 << 9) | (0 << 10) | (0 << 12)),
83 .fsynclen = 0,
98 .xpanstep = 0,
99 .ypanstep = 0,
100 .ywrapstep = 0,
112 .red = { 0, 4, 0 },
113 .green = { 0, 4, 0 },
114 .blue = { 0, 4, 0 },
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/reg_srcs/
Drv5151 rv515 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
Dr3001 r300 0x4f60
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
Drs6001 rs600 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
Dr4201 r420 0x4f60
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dti,icssg-prueth.yaml21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0
35 - const: tx0-0
39 - const: tx1-0
92 const: 0
95 ^port@[0-1]$:
104 - enum: [0, 1]
131 - port@0
170 /* Example k3-am654 base board SR2.0, dual-emac */
174 pinctrl-0 = <&icssg2_rgmii_pins_default>;
191 dmas = <&main_udmap 0xc300>, /* egress slice 0 */
[all …]
/linux-6.12.1/drivers/media/i2c/
Dov5645.c35 #define OV5645_SYSTEM_CTRL0 0x3008
36 #define OV5645_SYSTEM_CTRL0_START 0x02
37 #define OV5645_SYSTEM_CTRL0_STOP 0x42
38 #define OV5645_CHIP_ID_HIGH 0x300a
39 #define OV5645_CHIP_ID_HIGH_BYTE 0x56
40 #define OV5645_CHIP_ID_LOW 0x300b
41 #define OV5645_CHIP_ID_LOW_BYTE 0x45
42 #define OV5645_IO_MIPI_CTRL00 0x300e
43 #define OV5645_PAD_OUTPUT00 0x3019
44 #define OV5645_AWB_MANUAL_CONTROL 0x3406
[all …]
Dov7251.c26 #define OV7251_SC_MODE_SELECT 0x0100
27 #define OV7251_SC_MODE_SELECT_SW_STANDBY 0x0
28 #define OV7251_SC_MODE_SELECT_STREAMING 0x1
30 #define OV7251_CHIP_ID_HIGH 0x300a
31 #define OV7251_CHIP_ID_HIGH_BYTE 0x77
32 #define OV7251_CHIP_ID_LOW 0x300b
33 #define OV7251_CHIP_ID_LOW_BYTE 0x50
34 #define OV7251_SC_GP_IO_IN1 0x3029
35 #define OV7251_AEC_EXPO_0 0x3500
36 #define OV7251_AEC_EXPO_1 0x3501
[all …]
/linux-6.12.1/drivers/media/usb/gspca/
Dstk1135.c51 if (gspca_dev->usb_err < 0) in reg_r()
52 return 0; in reg_r()
53 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), in reg_r()
54 0x00, in reg_r()
56 0x00, in reg_r()
61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
63 if (ret < 0) { in reg_r()
64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r()
66 return 0; in reg_r()
[all …]
/linux-6.12.1/drivers/ssb/
Dscan.c101 u16 chipid_fallback = 0; in pcidev_to_chipid()
104 case 0x4301: in pcidev_to_chipid()
105 chipid_fallback = 0x4301; in pcidev_to_chipid()
107 case 0x4305 ... 0x4307: in pcidev_to_chipid()
108 chipid_fallback = 0x4307; in pcidev_to_chipid()
110 case 0x4403: in pcidev_to_chipid()
111 chipid_fallback = 0x4402; in pcidev_to_chipid()
113 case 0x4610 ... 0x4615: in pcidev_to_chipid()
114 chipid_fallback = 0x4610; in pcidev_to_chipid()
116 case 0x4710 ... 0x4715: in pcidev_to_chipid()
[all …]
/linux-6.12.1/drivers/gpu/drm/msm/adreno/
Da4xx_gpu.c30 for (i = 0; i < submit->nr_cmds; i++) { in a4xx_submit()
61 OUT_RING(ring, 0x00000000); in a4xx_submit()
80 for (i = 0; i < 4; i++) in a4xx_enable_hwcg()
81 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL_TP(i), 0x02222202); in a4xx_enable_hwcg()
82 for (i = 0; i < 4; i++) in a4xx_enable_hwcg()
83 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL2_TP(i), 0x00002222); in a4xx_enable_hwcg()
84 for (i = 0; i < 4; i++) in a4xx_enable_hwcg()
85 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_HYST_TP(i), 0x0E739CE7); in a4xx_enable_hwcg()
86 for (i = 0; i < 4; i++) in a4xx_enable_hwcg()
87 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_DELAY_TP(i), 0x00111111); in a4xx_enable_hwcg()
[all …]
/linux-6.12.1/drivers/media/pci/ivtv/
Divtv-cards.c36 .demod = { 0x43, I2C_CLIENT_END },
37 .tv = { 0x61, 0x60, I2C_CLIENT_END },
42 .radio = { 0x60, I2C_CLIENT_END },
43 .demod = { 0x43, I2C_CLIENT_END },
44 .tv = { 0x61, I2C_CLIENT_END },
51 .tv = { 0x4b, I2C_CLIENT_END },
58 must be added under vendor 0x4444 (Conexant) as subsystem IDs.
74 { IVTV_CARD_INPUT_VID_TUNER, 0, IVTV_SAA71XX_COMPOSITE4 },
98 .video_output = 0,
130 { IVTV_CARD_INPUT_VID_TUNER, 0, IVTV_SAA71XX_COMPOSITE4 },
[all …]

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