Lines Matching +full:0 +full:x4300
26 #define OV7251_SC_MODE_SELECT 0x0100
27 #define OV7251_SC_MODE_SELECT_SW_STANDBY 0x0
28 #define OV7251_SC_MODE_SELECT_STREAMING 0x1
30 #define OV7251_CHIP_ID_HIGH 0x300a
31 #define OV7251_CHIP_ID_HIGH_BYTE 0x77
32 #define OV7251_CHIP_ID_LOW 0x300b
33 #define OV7251_CHIP_ID_LOW_BYTE 0x50
34 #define OV7251_SC_GP_IO_IN1 0x3029
35 #define OV7251_AEC_EXPO_0 0x3500
36 #define OV7251_AEC_EXPO_1 0x3501
37 #define OV7251_AEC_EXPO_2 0x3502
38 #define OV7251_AEC_AGC_ADJ_0 0x350a
39 #define OV7251_AEC_AGC_ADJ_1 0x350b
40 #define OV7251_TIMING_FORMAT1 0x3820
42 #define OV7251_TIMING_FORMAT2 0x3821
44 #define OV7251_PRE_ISP_00 0x5e00
46 #define OV7251_PLL1_PRE_DIV_REG 0x30b4
47 #define OV7251_PLL1_MULT_REG 0x30b3
48 #define OV7251_PLL1_DIVIDER_REG 0x30b1
49 #define OV7251_PLL1_PIX_DIV_REG 0x30b0
50 #define OV7251_PLL1_MIPI_DIV_REG 0x30b5
51 #define OV7251_PLL2_PRE_DIV_REG 0x3098
52 #define OV7251_PLL2_MULT_REG 0x3099
53 #define OV7251_PLL2_DIVIDER_REG 0x309d
54 #define OV7251_PLL2_SYS_DIV_REG 0x309a
55 #define OV7251_PLL2_ADC_DIV_REG 0x309b
65 #define OV7251_TIMING_VTS_REG 0x380e
67 #define OV7251_TIMING_MAX_VTS 0xffff
170 .pre_div = 0x03,
171 .mult = 0x4b,
172 .div = 0x01,
173 .pix_div = 0x0a,
174 .mipi_div = 0x05,
178 .pre_div = 0x01,
179 .mult = 0x85,
180 .div = 0x04,
181 .pix_div = 0x0a,
182 .mipi_div = 0x05,
186 .pre_div = 0x03,
187 .mult = 0x64,
188 .div = 0x01,
189 .pix_div = 0x0a,
190 .mipi_div = 0x05,
194 .pre_div = 0x05,
195 .mult = 0x85,
196 .div = 0x02,
197 .pix_div = 0x0a,
198 .mipi_div = 0x05,
202 .pre_div = 0x04,
203 .mult = 0x32,
204 .div = 0x00,
205 .sys_div = 0x05,
206 .adc_div = 0x04,
210 .pre_div = 0x04,
211 .mult = 0x28,
212 .div = 0x00,
213 .sys_div = 0x05,
214 .adc_div = 0x04,
239 { 0x0103, 0x01 },
240 { 0x303b, 0x02 },
244 { 0x3005, 0x00 },
245 { 0x3012, 0xc0 },
246 { 0x3013, 0xd2 },
247 { 0x3014, 0x04 },
248 { 0x3016, 0xf0 },
249 { 0x3017, 0xf0 },
250 { 0x3018, 0xf0 },
251 { 0x301a, 0xf0 },
252 { 0x301b, 0xf0 },
253 { 0x301c, 0xf0 },
254 { 0x3023, 0x05 },
255 { 0x3037, 0xf0 },
256 { 0x3106, 0xda },
257 { 0x3503, 0x07 },
258 { 0x3509, 0x10 },
259 { 0x3600, 0x1c },
260 { 0x3602, 0x62 },
261 { 0x3620, 0xb7 },
262 { 0x3622, 0x04 },
263 { 0x3626, 0x21 },
264 { 0x3627, 0x30 },
265 { 0x3630, 0x44 },
266 { 0x3631, 0x35 },
267 { 0x3634, 0x60 },
268 { 0x3636, 0x00 },
269 { 0x3662, 0x01 },
270 { 0x3663, 0x70 },
271 { 0x3664, 0x50 },
272 { 0x3666, 0x0a },
273 { 0x3669, 0x1a },
274 { 0x366a, 0x00 },
275 { 0x366b, 0x50 },
276 { 0x3673, 0x01 },
277 { 0x3674, 0xff },
278 { 0x3675, 0x03 },
279 { 0x3705, 0xc1 },
280 { 0x3709, 0x40 },
281 { 0x373c, 0x08 },
282 { 0x3742, 0x00 },
283 { 0x3757, 0xb3 },
284 { 0x3788, 0x00 },
285 { 0x37a8, 0x01 },
286 { 0x37a9, 0xc0 },
287 { 0x3800, 0x00 },
288 { 0x3801, 0x04 },
289 { 0x3802, 0x00 },
290 { 0x3803, 0x04 },
291 { 0x3804, 0x02 },
292 { 0x3805, 0x8b },
293 { 0x3806, 0x01 },
294 { 0x3807, 0xeb },
295 { 0x3808, 0x02 }, /* width high */
296 { 0x3809, 0x80 }, /* width low */
297 { 0x380a, 0x01 }, /* height high */
298 { 0x380b, 0xe0 }, /* height low */
299 { 0x380c, 0x03 }, /* total horiz timing high */
300 { 0x380d, 0xa0 }, /* total horiz timing low */
301 { 0x380e, 0x06 }, /* total vertical timing high */
302 { 0x380f, 0xbc }, /* total vertical timing low */
303 { 0x3810, 0x00 },
304 { 0x3811, 0x04 },
305 { 0x3812, 0x00 },
306 { 0x3813, 0x05 },
307 { 0x3814, 0x11 },
308 { 0x3815, 0x11 },
309 { 0x3820, 0x40 },
310 { 0x3821, 0x00 },
311 { 0x382f, 0x0e },
312 { 0x3832, 0x00 },
313 { 0x3833, 0x05 },
314 { 0x3834, 0x00 },
315 { 0x3835, 0x0c },
316 { 0x3837, 0x00 },
317 { 0x3b80, 0x00 },
318 { 0x3b81, 0xa5 },
319 { 0x3b82, 0x10 },
320 { 0x3b83, 0x00 },
321 { 0x3b84, 0x08 },
322 { 0x3b85, 0x00 },
323 { 0x3b86, 0x01 },
324 { 0x3b87, 0x00 },
325 { 0x3b88, 0x00 },
326 { 0x3b89, 0x00 },
327 { 0x3b8a, 0x00 },
328 { 0x3b8b, 0x05 },
329 { 0x3b8c, 0x00 },
330 { 0x3b8d, 0x00 },
331 { 0x3b8e, 0x00 },
332 { 0x3b8f, 0x1a },
333 { 0x3b94, 0x05 },
334 { 0x3b95, 0xf2 },
335 { 0x3b96, 0x40 },
336 { 0x3c00, 0x89 },
337 { 0x3c01, 0x63 },
338 { 0x3c02, 0x01 },
339 { 0x3c03, 0x00 },
340 { 0x3c04, 0x00 },
341 { 0x3c05, 0x03 },
342 { 0x3c06, 0x00 },
343 { 0x3c07, 0x06 },
344 { 0x3c0c, 0x01 },
345 { 0x3c0d, 0xd0 },
346 { 0x3c0e, 0x02 },
347 { 0x3c0f, 0x0a },
348 { 0x4001, 0x42 },
349 { 0x4004, 0x04 },
350 { 0x4005, 0x00 },
351 { 0x404e, 0x01 },
352 { 0x4300, 0xff },
353 { 0x4301, 0x00 },
354 { 0x4315, 0x00 },
355 { 0x4501, 0x48 },
356 { 0x4600, 0x00 },
357 { 0x4601, 0x4e },
358 { 0x4801, 0x0f },
359 { 0x4806, 0x0f },
360 { 0x4819, 0xaa },
361 { 0x4823, 0x3e },
362 { 0x4837, 0x19 },
363 { 0x4a0d, 0x00 },
364 { 0x4a47, 0x7f },
365 { 0x4a49, 0xf0 },
366 { 0x4a4b, 0x30 },
367 { 0x5000, 0x85 },
368 { 0x5001, 0x80 },
372 { 0x3005, 0x00 },
373 { 0x3012, 0xc0 },
374 { 0x3013, 0xd2 },
375 { 0x3014, 0x04 },
376 { 0x3016, 0x10 },
377 { 0x3017, 0x00 },
378 { 0x3018, 0x00 },
379 { 0x301a, 0x00 },
380 { 0x301b, 0x00 },
381 { 0x301c, 0x00 },
382 { 0x3023, 0x05 },
383 { 0x3037, 0xf0 },
384 { 0x3106, 0xda },
385 { 0x3503, 0x07 },
386 { 0x3509, 0x10 },
387 { 0x3600, 0x1c },
388 { 0x3602, 0x62 },
389 { 0x3620, 0xb7 },
390 { 0x3622, 0x04 },
391 { 0x3626, 0x21 },
392 { 0x3627, 0x30 },
393 { 0x3630, 0x44 },
394 { 0x3631, 0x35 },
395 { 0x3634, 0x60 },
396 { 0x3636, 0x00 },
397 { 0x3662, 0x01 },
398 { 0x3663, 0x70 },
399 { 0x3664, 0x50 },
400 { 0x3666, 0x0a },
401 { 0x3669, 0x1a },
402 { 0x366a, 0x00 },
403 { 0x366b, 0x50 },
404 { 0x3673, 0x01 },
405 { 0x3674, 0xff },
406 { 0x3675, 0x03 },
407 { 0x3705, 0xc1 },
408 { 0x3709, 0x40 },
409 { 0x373c, 0x08 },
410 { 0x3742, 0x00 },
411 { 0x3757, 0xb3 },
412 { 0x3788, 0x00 },
413 { 0x37a8, 0x01 },
414 { 0x37a9, 0xc0 },
415 { 0x3800, 0x00 },
416 { 0x3801, 0x04 },
417 { 0x3802, 0x00 },
418 { 0x3803, 0x04 },
419 { 0x3804, 0x02 },
420 { 0x3805, 0x8b },
421 { 0x3806, 0x01 },
422 { 0x3807, 0xeb },
423 { 0x3808, 0x02 }, /* width high */
424 { 0x3809, 0x80 }, /* width low */
425 { 0x380a, 0x01 }, /* height high */
426 { 0x380b, 0xe0 }, /* height low */
427 { 0x380c, 0x03 }, /* total horiz timing high */
428 { 0x380d, 0xa0 }, /* total horiz timing low */
429 { 0x380e, 0x03 }, /* total vertical timing high */
430 { 0x380f, 0x5c }, /* total vertical timing low */
431 { 0x3810, 0x00 },
432 { 0x3811, 0x04 },
433 { 0x3812, 0x00 },
434 { 0x3813, 0x05 },
435 { 0x3814, 0x11 },
436 { 0x3815, 0x11 },
437 { 0x3820, 0x40 },
438 { 0x3821, 0x00 },
439 { 0x382f, 0x0e },
440 { 0x3832, 0x00 },
441 { 0x3833, 0x05 },
442 { 0x3834, 0x00 },
443 { 0x3835, 0x0c },
444 { 0x3837, 0x00 },
445 { 0x3b80, 0x00 },
446 { 0x3b81, 0xa5 },
447 { 0x3b82, 0x10 },
448 { 0x3b83, 0x00 },
449 { 0x3b84, 0x08 },
450 { 0x3b85, 0x00 },
451 { 0x3b86, 0x01 },
452 { 0x3b87, 0x00 },
453 { 0x3b88, 0x00 },
454 { 0x3b89, 0x00 },
455 { 0x3b8a, 0x00 },
456 { 0x3b8b, 0x05 },
457 { 0x3b8c, 0x00 },
458 { 0x3b8d, 0x00 },
459 { 0x3b8e, 0x00 },
460 { 0x3b8f, 0x1a },
461 { 0x3b94, 0x05 },
462 { 0x3b95, 0xf2 },
463 { 0x3b96, 0x40 },
464 { 0x3c00, 0x89 },
465 { 0x3c01, 0x63 },
466 { 0x3c02, 0x01 },
467 { 0x3c03, 0x00 },
468 { 0x3c04, 0x00 },
469 { 0x3c05, 0x03 },
470 { 0x3c06, 0x00 },
471 { 0x3c07, 0x06 },
472 { 0x3c0c, 0x01 },
473 { 0x3c0d, 0xd0 },
474 { 0x3c0e, 0x02 },
475 { 0x3c0f, 0x0a },
476 { 0x4001, 0x42 },
477 { 0x4004, 0x04 },
478 { 0x4005, 0x00 },
479 { 0x404e, 0x01 },
480 { 0x4300, 0xff },
481 { 0x4301, 0x00 },
482 { 0x4315, 0x00 },
483 { 0x4501, 0x48 },
484 { 0x4600, 0x00 },
485 { 0x4601, 0x4e },
486 { 0x4801, 0x0f },
487 { 0x4806, 0x0f },
488 { 0x4819, 0xaa },
489 { 0x4823, 0x3e },
490 { 0x4837, 0x19 },
491 { 0x4a0d, 0x00 },
492 { 0x4a47, 0x7f },
493 { 0x4a49, 0xf0 },
494 { 0x4a4b, 0x30 },
495 { 0x5000, 0x85 },
496 { 0x5001, 0x80 },
500 { 0x3005, 0x00 },
501 { 0x3012, 0xc0 },
502 { 0x3013, 0xd2 },
503 { 0x3014, 0x04 },
504 { 0x3016, 0x10 },
505 { 0x3017, 0x00 },
506 { 0x3018, 0x00 },
507 { 0x301a, 0x00 },
508 { 0x301b, 0x00 },
509 { 0x301c, 0x00 },
510 { 0x3023, 0x05 },
511 { 0x3037, 0xf0 },
512 { 0x3106, 0xda },
513 { 0x3503, 0x07 },
514 { 0x3509, 0x10 },
515 { 0x3600, 0x1c },
516 { 0x3602, 0x62 },
517 { 0x3620, 0xb7 },
518 { 0x3622, 0x04 },
519 { 0x3626, 0x21 },
520 { 0x3627, 0x30 },
521 { 0x3630, 0x44 },
522 { 0x3631, 0x35 },
523 { 0x3634, 0x60 },
524 { 0x3636, 0x00 },
525 { 0x3662, 0x01 },
526 { 0x3663, 0x70 },
527 { 0x3664, 0x50 },
528 { 0x3666, 0x0a },
529 { 0x3669, 0x1a },
530 { 0x366a, 0x00 },
531 { 0x366b, 0x50 },
532 { 0x3673, 0x01 },
533 { 0x3674, 0xff },
534 { 0x3675, 0x03 },
535 { 0x3705, 0xc1 },
536 { 0x3709, 0x40 },
537 { 0x373c, 0x08 },
538 { 0x3742, 0x00 },
539 { 0x3757, 0xb3 },
540 { 0x3788, 0x00 },
541 { 0x37a8, 0x01 },
542 { 0x37a9, 0xc0 },
543 { 0x3800, 0x00 },
544 { 0x3801, 0x04 },
545 { 0x3802, 0x00 },
546 { 0x3803, 0x04 },
547 { 0x3804, 0x02 },
548 { 0x3805, 0x8b },
549 { 0x3806, 0x01 },
550 { 0x3807, 0xeb },
551 { 0x3808, 0x02 }, /* width high */
552 { 0x3809, 0x80 }, /* width low */
553 { 0x380a, 0x01 }, /* height high */
554 { 0x380b, 0xe0 }, /* height low */
555 { 0x380c, 0x03 }, /* total horiz timing high */
556 { 0x380d, 0xa0 }, /* total horiz timing low */
557 { 0x380e, 0x02 }, /* total vertical timing high */
558 { 0x380f, 0x3c }, /* total vertical timing low */
559 { 0x3810, 0x00 },
560 { 0x3811, 0x04 },
561 { 0x3812, 0x00 },
562 { 0x3813, 0x05 },
563 { 0x3814, 0x11 },
564 { 0x3815, 0x11 },
565 { 0x3820, 0x40 },
566 { 0x3821, 0x00 },
567 { 0x382f, 0x0e },
568 { 0x3832, 0x00 },
569 { 0x3833, 0x05 },
570 { 0x3834, 0x00 },
571 { 0x3835, 0x0c },
572 { 0x3837, 0x00 },
573 { 0x3b80, 0x00 },
574 { 0x3b81, 0xa5 },
575 { 0x3b82, 0x10 },
576 { 0x3b83, 0x00 },
577 { 0x3b84, 0x08 },
578 { 0x3b85, 0x00 },
579 { 0x3b86, 0x01 },
580 { 0x3b87, 0x00 },
581 { 0x3b88, 0x00 },
582 { 0x3b89, 0x00 },
583 { 0x3b8a, 0x00 },
584 { 0x3b8b, 0x05 },
585 { 0x3b8c, 0x00 },
586 { 0x3b8d, 0x00 },
587 { 0x3b8e, 0x00 },
588 { 0x3b8f, 0x1a },
589 { 0x3b94, 0x05 },
590 { 0x3b95, 0xf2 },
591 { 0x3b96, 0x40 },
592 { 0x3c00, 0x89 },
593 { 0x3c01, 0x63 },
594 { 0x3c02, 0x01 },
595 { 0x3c03, 0x00 },
596 { 0x3c04, 0x00 },
597 { 0x3c05, 0x03 },
598 { 0x3c06, 0x00 },
599 { 0x3c07, 0x06 },
600 { 0x3c0c, 0x01 },
601 { 0x3c0d, 0xd0 },
602 { 0x3c0e, 0x02 },
603 { 0x3c0f, 0x0a },
604 { 0x4001, 0x42 },
605 { 0x4004, 0x04 },
606 { 0x4005, 0x00 },
607 { 0x404e, 0x01 },
608 { 0x4300, 0xff },
609 { 0x4301, 0x00 },
610 { 0x4315, 0x00 },
611 { 0x4501, 0x48 },
612 { 0x4600, 0x00 },
613 { 0x4601, 0x4e },
614 { 0x4801, 0x0f },
615 { 0x4806, 0x0f },
616 { 0x4819, 0xaa },
617 { 0x4823, 0x3e },
618 { 0x4837, 0x19 },
619 { 0x4a0d, 0x00 },
620 { 0x4a47, 0x7f },
621 { 0x4a49, 0xf0 },
622 { 0x4a4b, 0x30 },
623 { 0x5000, 0x85 },
624 { 0x5001, 0x80 },
693 if (ret < 0) { in ov7251_regulators_enable()
710 return 0; in ov7251_regulators_enable()
726 if (ret < 0) in ov7251_regulators_disable()
730 if (ret < 0) in ov7251_regulators_disable()
734 if (ret < 0) in ov7251_regulators_disable()
743 regbuf[0] = reg >> 8; in ov7251_write_reg()
744 regbuf[1] = reg & 0xff; in ov7251_write_reg()
748 if (ret < 0) { in ov7251_write_reg()
754 return 0; in ov7251_write_reg()
762 int ret = 0; in ov7251_write_seq_regs()
767 regbuf[0] = reg >> 8; in ov7251_write_seq_regs()
768 regbuf[1] = reg & 0xff; in ov7251_write_seq_regs()
773 if (ret < 0) { in ov7251_write_seq_regs()
780 return 0; in ov7251_write_seq_regs()
788 regbuf[0] = reg >> 8; in ov7251_read_reg()
789 regbuf[1] = reg & 0xff; in ov7251_read_reg()
792 if (ret < 0) { in ov7251_read_reg()
799 if (ret < 0) { in ov7251_read_reg()
805 return 0; in ov7251_read_reg()
817 if (ret < 0) in ov7251_pll_configure()
822 if (ret < 0) in ov7251_pll_configure()
826 if (ret < 0) in ov7251_pll_configure()
831 if (ret < 0) in ov7251_pll_configure()
836 if (ret < 0) in ov7251_pll_configure()
841 if (ret < 0) in ov7251_pll_configure()
846 if (ret < 0) in ov7251_pll_configure()
851 if (ret < 0) in ov7251_pll_configure()
856 if (ret < 0) in ov7251_pll_configure()
871 val[0] = (exposure & 0xf000) >> 12; /* goes to OV7251_AEC_EXPO_0 */ in ov7251_set_exposure()
872 val[1] = (exposure & 0x0ff0) >> 4; /* goes to OV7251_AEC_EXPO_1 */ in ov7251_set_exposure()
873 val[2] = (exposure & 0x000f) << 4; /* goes to OV7251_AEC_EXPO_2 */ in ov7251_set_exposure()
884 val[0] = (gain & 0x0300) >> 8; /* goes to OV7251_AEC_AGC_ADJ_0 */ in ov7251_set_gain()
885 val[1] = gain & 0xff; /* goes to OV7251_AEC_AGC_ADJ_1 */ in ov7251_set_gain()
897 for (i = 0; i < num_settings; ++i, ++settings) { in ov7251_set_register_array()
899 if (ret < 0) in ov7251_set_register_array()
903 return 0; in ov7251_set_register_array()
915 if (ret < 0) in ov7251_set_power_on()
919 if (ret < 0) { in ov7251_set_power_on()
935 if (ret < 0) { in ov7251_set_power_on()
937 gpiod_set_value_cansleep(ov7251->enable_gpio, 0); in ov7251_set_power_on()
953 gpiod_set_value_cansleep(ov7251->enable_gpio, 0); in ov7251_set_power_off()
956 return 0; in ov7251_set_power_off()
1019 vts[0] = ((ov7251->current_mode->height + vblank) & 0xff00) >> 8; in ov7251_vts_configure()
1020 vts[1] = ((ov7251->current_mode->height + vblank) & 0x00ff); in ov7251_vts_configure()
1048 return 0; in ov7251_s_ctrl()
1087 if (code->index > 0) in ov7251_enum_mbus_code()
1092 return 0; in ov7251_enum_mbus_code()
1110 return 0; in ov7251_enum_frame_size()
1120 for (i = 0; i < ARRAY_SIZE(ov7251_mode_info_data); i++) { in ov7251_enum_frame_ival()
1125 if (index-- == 0) { in ov7251_enum_frame_ival()
1127 return 0; in ov7251_enum_frame_ival()
1162 return 0; in ov7251_get_format()
1191 unsigned int i, n = 0; in ov7251_find_mode_by_ival()
1193 for (i = 0; i < ARRAY_SIZE(ov7251_mode_info_data); i++) { in ov7251_find_mode_by_ival()
1223 int ret = 0; in ov7251_set_format()
1242 if (ret < 0) in ov7251_set_format()
1247 if (ret < 0) in ov7251_set_format()
1251 if (ret < 0) in ov7251_set_format()
1259 if (ret < 0) in ov7251_set_format()
1299 return 0; in ov7251_init_state()
1317 sel->r.top = 0; in ov7251_get_selection()
1318 sel->r.left = 0; in ov7251_get_selection()
1332 return 0; in ov7251_get_selection()
1358 if (ret < 0) { in ov7251_s_stream()
1365 if (ret < 0) { in ov7251_s_stream()
1405 return 0; in ov7251_get_frame_interval()
1414 int ret = 0; in ov7251_set_frame_interval()
1430 if (ret < 0) in ov7251_set_frame_interval()
1435 if (ret < 0) in ov7251_set_frame_interval()
1439 if (ret < 0) in ov7251_set_frame_interval()
1503 for (i = 0; i < bus_cfg.nr_of_link_frequencies; i++) { in ov7251_check_hwcfg()
1504 for (j = 0; j < ARRAY_SIZE(link_freq); j++) in ov7251_check_hwcfg()
1532 if (ret < 0 || chip_id_high != OV7251_CHIP_ID_HIGH_BYTE) in ov7251_detect_chip()
1537 if (ret < 0 || chip_id_low != OV7251_CHIP_ID_LOW_BYTE) in ov7251_detect_chip()
1542 if (ret < 0) in ov7251_detect_chip()
1548 "OV7251 revision %x (%s) detected at address 0x%02x\n", in ov7251_detect_chip()
1550 chip_rev == 0x4 ? "1A / 1B" : in ov7251_detect_chip()
1551 chip_rev == 0x5 ? "1C / 1D" : in ov7251_detect_chip()
1552 chip_rev == 0x6 ? "1E" : in ov7251_detect_chip()
1553 chip_rev == 0x7 ? "1F" : "unknown", in ov7251_detect_chip()
1556 return 0; in ov7251_detect_chip()
1569 V4L2_CID_HFLIP, 0, 1, 1, 0); in ov7251_init_ctrls()
1571 V4L2_CID_VFLIP, 0, 1, 1, 0); in ov7251_init_ctrls()
1579 0, 0, ov7251_test_pattern_menu); in ov7251_init_ctrls()
1619 return 0; in ov7251_init_ctrls()
1626 unsigned int rate = 0, clk_rate = 0; in ov7251_probe()
1660 if (ov7251->xclk_freq == 0) in ov7251_probe()
1670 for (i = 0; i < ARRAY_SIZE(supported_xclk_rates); i++) in ov7251_probe()
1707 ov7251->current_mode = &ov7251_mode_info_data[0]; in ov7251_probe()
1722 if (ret < 0) { in ov7251_probe()
1741 if (ret < 0) { in ov7251_probe()
1749 if (ret < 0) { in ov7251_probe()
1757 if (ret < 0) { in ov7251_probe()
1768 if (ret < 0) { in ov7251_probe()
1775 return 0; in ov7251_probe()