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/linux-6.12.1/arch/s390/kernel/
Debcdic.c22 0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F,
25 0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
27 0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26,
30 0x18, 0x19, 0x3F, 0x27, 0x22, 0x1D, 0x1E, 0x1F,
32 0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D,
34 0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61,
35 /*30 0 1 2 3 4 5 6 7 */
36 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
38 0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F,
40 0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7,
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt76x0/
Dinitvals_phy.h12 { MT_RF(0, 1), 0x01 },
13 { MT_RF(0, 2), 0x11 },
15 { MT_RF(0, 3), 0x73 }, /* VCO Freq Cal */
16 { MT_RF(0, 4), 0x30 }, /* R4 b<7>=1, VCO cal */
17 { MT_RF(0, 5), 0x00 },
18 { MT_RF(0, 6), 0x41 },
19 { MT_RF(0, 7), 0x00 },
20 { MT_RF(0, 8), 0x00 },
21 { MT_RF(0, 9), 0x00 },
22 { MT_RF(0, 10), 0x0C },
[all …]
/linux-6.12.1/drivers/gpu/drm/panel/
Dpanel-raydium-rm68200.c22 #define MCS_CMD_MODE_SW 0xFE /* CMD Mode Switch */
23 #define MCS_CMD1_UCS 0x00 /* User Command Set (UCS = CMD1) */
24 #define MCS_CMD2_P0 0x01 /* Manufacture Command Set Page0 (CMD2 P0) */
25 #define MCS_CMD2_P1 0x02 /* Manufacture Command Set Page1 (CMD2 P1) */
26 #define MCS_CMD2_P2 0x03 /* Manufacture Command Set Page2 (CMD2 P2) */
27 #define MCS_CMD2_P3 0x04 /* Manufacture Command Set Page3 (CMD2 P3) */
30 #define MCS_STBCTR 0x12 /* TE1 Output Setting Zig-Zag Connection */
31 #define MCS_SGOPCTR 0x16 /* Source Bias Current */
32 #define MCS_SDCTR 0x1A /* Source Output Delay Time */
33 #define MCS_INVCTR 0x1B /* Inversion Type */
[all …]
/linux-6.12.1/drivers/staging/fbtft/
Dfb_s6d1121.c24 #define DEFAULT_GAMMA "26 09 24 2C 1F 23 24 25 22 26 25 23 0D 00\n" \
25 "1C 1A 13 1D 0B 11 12 10 13 15 36 19 00 0D"
33 write_reg(par, 0x0011, 0x2004); in init_display()
34 write_reg(par, 0x0013, 0xCC00); in init_display()
35 write_reg(par, 0x0015, 0x2600); in init_display()
36 write_reg(par, 0x0014, 0x252A); in init_display()
37 write_reg(par, 0x0012, 0x0033); in init_display()
38 write_reg(par, 0x0013, 0xCC04); in init_display()
39 write_reg(par, 0x0013, 0xCC06); in init_display()
40 write_reg(par, 0x0013, 0xCC4F); in init_display()
[all …]
Dfb_s6d02a1.c19 -1, 0xf0, 0x5a, 0x5a,
21 -1, 0xfc, 0x5a, 0x5a,
23 -1, 0xfa, 0x02, 0x1f, 0x00, 0x10, 0x22, 0x30, 0x38,
24 0x3A, 0x3A, 0x3A, 0x3A, 0x3A, 0x3d, 0x02, 0x01,
26 -1, 0xfb, 0x21, 0x00, 0x02, 0x04, 0x07, 0x0a, 0x0b,
27 0x0c, 0x0c, 0x16, 0x1e, 0x30, 0x3f, 0x01, 0x02,
30 -1, 0xfd, 0x00, 0x00, 0x00, 0x17, 0x10, 0x00, 0x01,
31 0x01, 0x00, 0x1f, 0x1f,
33 -1, 0xf4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x3f,
34 0x07, 0x00, 0x3C, 0x36, 0x00, 0x3C, 0x36, 0x00,
[all …]
Dfb_ili9163.c28 #define DEFAULT_GAMMA "36 29 12 22 1C 15 42 B7 2F 13 12 0A 11 0B 06\n"
32 #define CMD_FRMCTR1 0xB1 /* Frame Rate Control */
34 #define CMD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle mode/8-colors) */
35 #define CMD_FRMCTR3 0xB3 /* Frame Rate Control */
37 #define CMD_DINVCTR 0xB4 /* Display Inversion Control */
38 #define CMD_RGBBLK 0xB5 /* RGB Interface Blanking Porch setting */
39 #define CMD_DFUNCTR 0xB6 /* Display Function set 5 */
40 #define CMD_SDRVDIR 0xB7 /* Source Driver Direction Control */
41 #define CMD_GDRVDIR 0xB8 /* Gate Driver Direction Control */
43 #define CMD_PWCTR1 0xC0 /* Power_Control1 */
[all …]
/linux-6.12.1/sound/soc/codecs/
Dcs42l73.c47 { 6, 0xF1 }, /* r06 - Power Ctl 1 */
48 { 7, 0xDF }, /* r07 - Power Ctl 2 */
49 { 8, 0x3F }, /* r08 - Power Ctl 3 */
50 { 9, 0x50 }, /* r09 - Charge Pump Freq */
51 { 10, 0x53 }, /* r0A - Output Load MicBias Short Detect */
52 { 11, 0x00 }, /* r0B - DMIC Master Clock Ctl */
53 { 12, 0x00 }, /* r0C - Aux PCM Ctl */
54 { 13, 0x15 }, /* r0D - Aux PCM Master Clock Ctl */
55 { 14, 0x00 }, /* r0E - Audio PCM Ctl */
56 { 15, 0x15 }, /* r0F - Audio PCM Master Clock Ctl */
[all …]
/linux-6.12.1/drivers/video/fbdev/via/
Dhw.c13 {19, 19, 4, 0},
14 {26, 102, 5, 0},
15 {53, 112, 6, 0},
16 {41, 100, 7, 0},
17 {83, 108, 8, 0},
18 {87, 118, 9, 0},
19 {95, 115, 12, 0},
20 {108, 108, 13, 0},
21 {83, 83, 17, 0},
22 {67, 98, 20, 0},
[all …]
/linux-6.12.1/drivers/accel/habanalabs/include/goya/asic_reg/
Dmme1_rtr_masks.h23 #define MME1_RTR_HBW_RD_RQ_E_ARB_W_SHIFT 0
24 #define MME1_RTR_HBW_RD_RQ_E_ARB_W_MASK 0x7
26 #define MME1_RTR_HBW_RD_RQ_E_ARB_S_MASK 0x700
28 #define MME1_RTR_HBW_RD_RQ_E_ARB_N_MASK 0x70000
30 #define MME1_RTR_HBW_RD_RQ_E_ARB_L_MASK 0x7000000
33 #define MME1_RTR_HBW_RD_RQ_W_ARB_E_SHIFT 0
34 #define MME1_RTR_HBW_RD_RQ_W_ARB_E_MASK 0x7
36 #define MME1_RTR_HBW_RD_RQ_W_ARB_S_MASK 0x700
38 #define MME1_RTR_HBW_RD_RQ_W_ARB_N_MASK 0x70000
40 #define MME1_RTR_HBW_RD_RQ_W_ARB_L_MASK 0x7000000
[all …]
Dtpc0_nrtr_masks.h23 #define TPC0_NRTR_HBW_MAX_CRED_WR_RQ_SHIFT 0
24 #define TPC0_NRTR_HBW_MAX_CRED_WR_RQ_MASK 0x3F
26 #define TPC0_NRTR_HBW_MAX_CRED_WR_RS_MASK 0x3F00
28 #define TPC0_NRTR_HBW_MAX_CRED_RD_RQ_MASK 0x3F0000
30 #define TPC0_NRTR_HBW_MAX_CRED_RD_RS_MASK 0x3F000000
33 #define TPC0_NRTR_LBW_MAX_CRED_WR_RQ_SHIFT 0
34 #define TPC0_NRTR_LBW_MAX_CRED_WR_RQ_MASK 0x3F
36 #define TPC0_NRTR_LBW_MAX_CRED_WR_RS_MASK 0x3F00
38 #define TPC0_NRTR_LBW_MAX_CRED_RD_RQ_MASK 0x3F0000
40 #define TPC0_NRTR_LBW_MAX_CRED_RD_RS_MASK 0x3F000000
[all …]
Dpci_nrtr_masks.h23 #define PCI_NRTR_HBW_MAX_CRED_WR_RQ_SHIFT 0
24 #define PCI_NRTR_HBW_MAX_CRED_WR_RQ_MASK 0x3F
26 #define PCI_NRTR_HBW_MAX_CRED_WR_RS_MASK 0x3F00
28 #define PCI_NRTR_HBW_MAX_CRED_RD_RQ_MASK 0x3F0000
30 #define PCI_NRTR_HBW_MAX_CRED_RD_RS_MASK 0x3F000000
33 #define PCI_NRTR_LBW_MAX_CRED_WR_RQ_SHIFT 0
34 #define PCI_NRTR_LBW_MAX_CRED_WR_RQ_MASK 0x3F
36 #define PCI_NRTR_LBW_MAX_CRED_WR_RS_MASK 0x3F00
38 #define PCI_NRTR_LBW_MAX_CRED_RD_RQ_MASK 0x3F0000
40 #define PCI_NRTR_LBW_MAX_CRED_RD_RS_MASK 0x3F000000
[all …]
Ddma_nrtr_masks.h23 #define DMA_NRTR_HBW_MAX_CRED_WR_RQ_SHIFT 0
24 #define DMA_NRTR_HBW_MAX_CRED_WR_RQ_MASK 0x3F
26 #define DMA_NRTR_HBW_MAX_CRED_WR_RS_MASK 0x3F00
28 #define DMA_NRTR_HBW_MAX_CRED_RD_RQ_MASK 0x3F0000
30 #define DMA_NRTR_HBW_MAX_CRED_RD_RS_MASK 0x3F000000
33 #define DMA_NRTR_LBW_MAX_CRED_WR_RQ_SHIFT 0
34 #define DMA_NRTR_LBW_MAX_CRED_WR_RQ_MASK 0x3F
36 #define DMA_NRTR_LBW_MAX_CRED_WR_RS_MASK 0x3F00
38 #define DMA_NRTR_LBW_MAX_CRED_RD_RQ_MASK 0x3F0000
40 #define DMA_NRTR_LBW_MAX_CRED_RD_RS_MASK 0x3F000000
[all …]
/linux-6.12.1/drivers/gpu/drm/radeon/
Dnid.h33 #define CAYMAN_MAX_BACKENDS_MASK 0xFF
34 #define CAYMAN_MAX_BACKENDS_PER_SE_MASK 0xF
36 #define CAYMAN_MAX_SIMDS_MASK 0xFFFF
37 #define CAYMAN_MAX_SIMDS_PER_SE_MASK 0xFFF
39 #define CAYMAN_MAX_PIPES_MASK 0xFF
40 #define CAYMAN_MAX_LDS_NUM 0xFFFF
42 #define CAYMAN_MAX_TCC_MASK 0xFF
44 #define CAYMAN_GB_ADDR_CONFIG_GOLDEN 0x02011003
45 #define ARUBA_GB_ADDR_CONFIG_GOLDEN 0x12010001
47 #define DMIF_ADDR_CONFIG 0xBD4
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/b43/
Dradio_2059.c17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 },
18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 },
19 { 0x188, 0x05 },
61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
63 0x00, 0x00, 0x00, 0xd0, 0x00),
64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
70 0x00, 0x00, 0x00, 0xd0, 0x00),
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_ddi_buf_trans.c19 { .hsw = { 0x00FFFFFF, 0x0006000E, 0x0 } },
20 { .hsw = { 0x00D75FFF, 0x0005000A, 0x0 } },
21 { .hsw = { 0x00C30FFF, 0x00040006, 0x0 } },
22 { .hsw = { 0x80AAAFFF, 0x000B0000, 0x0 } },
23 { .hsw = { 0x00FFFFFF, 0x0005000A, 0x0 } },
24 { .hsw = { 0x00D75FFF, 0x000C0004, 0x0 } },
25 { .hsw = { 0x80C30FFF, 0x000B0000, 0x0 } },
26 { .hsw = { 0x00FFFFFF, 0x00040006, 0x0 } },
27 { .hsw = { 0x80D75FFF, 0x000B0000, 0x0 } },
36 { .hsw = { 0x00FFFFFF, 0x0007000E, 0x0 } },
[all …]
/linux-6.12.1/include/linux/mfd/da9052/
Dreg.h14 #define DA9052_PAGE0_CON_REG 0
176 #define DA9052_PAGE_CONF 0X80
179 #define DA9052_STATUSA_VDATDET 0X80
180 #define DA9052_STATUSA_VBUSSEL 0X40
181 #define DA9052_STATUSA_DCINSEL 0X20
182 #define DA9052_STATUSA_VBUSDET 0X10
183 #define DA9052_STATUSA_DCINDET 0X08
184 #define DA9052_STATUSA_IDGND 0X04
185 #define DA9052_STATUSA_IDFLOAT 0X02
186 #define DA9052_STATUSA_NONKEY 0X01
[all …]
/linux-6.12.1/drivers/infiniband/hw/qib/
Dqib_7322_regs.h35 #define QIB_7322_Revision_OFFS 0x0
36 #define QIB_7322_Revision_DEF 0x0000000002010601
37 #define QIB_7322_Revision_R_Simulator_LSB 0x3F
38 #define QIB_7322_Revision_R_Simulator_MSB 0x3F
39 #define QIB_7322_Revision_R_Simulator_RMASK 0x1
40 #define QIB_7322_Revision_R_Emulation_LSB 0x3E
41 #define QIB_7322_Revision_R_Emulation_MSB 0x3E
42 #define QIB_7322_Revision_R_Emulation_RMASK 0x1
43 #define QIB_7322_Revision_R_Emulation_Revcode_LSB 0x28
44 #define QIB_7322_Revision_R_Emulation_Revcode_MSB 0x3D
[all …]
/linux-6.12.1/drivers/video/fbdev/sis/
Dinit.h70 static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f};
71 static const unsigned short ModeIndex_320x240[] = {0x50, 0x56, 0x00, 0x53};
72 static const unsigned short ModeIndex_320x240_FSTN[] = {0x5a, 0x5b, 0x00, 0x00}; /* FSTN */
73 static const unsigned short ModeIndex_400x300[] = {0x51, 0x57, 0x00, 0x54};
74 static const unsigned short ModeIndex_512x384[] = {0x52, 0x58, 0x00, 0x5c};
75 static const unsigned short ModeIndex_640x400[] = {0x2f, 0x5d, 0x00, 0x5e};
76 static const unsigned short ModeIndex_640x480[] = {0x2e, 0x44, 0x00, 0x62};
77 static const unsigned short ModeIndex_720x480[] = {0x31, 0x33, 0x00, 0x35};
78 static const unsigned short ModeIndex_720x576[] = {0x32, 0x34, 0x00, 0x36};
79 static const unsigned short ModeIndex_768x576[] = {0x5f, 0x60, 0x00, 0x61};
[all …]
/linux-6.12.1/include/linux/mfd/
Dtps6507x.h22 #define TPS6507X_REG_PPATH1 0X01
28 #define TPS6507X_CHG_USB_CURRENT BIT(0)
30 #define TPS6507X_REG_INT 0X02
37 #define TPS6507X_REG_AC_USB_REMOVED BIT(0)
39 #define TPS6507X_REG_CHGCONFIG0 0X03
41 #define TPS6507X_REG_CHGCONFIG1 0X04
46 #define TPS6507X_CON_CTRL1_LDO2_ENABLE BIT(0)
48 #define TPS6507X_REG_CHGCONFIG2 0X05
50 #define TPS6507X_REG_CHGCONFIG3 0X06
52 #define TPS6507X_REG_ADCONFIG 0X07
[all …]
/linux-6.12.1/drivers/staging/sm750fb/
Dddk750_reg.h6 #define DE_STATE1 0x100054
7 #define DE_STATE1_DE_ABORT BIT(0)
9 #define DE_STATE2 0x100058
14 #define SYSTEM_CTRL 0x000000
15 #define SYSTEM_CTRL_DPMS_MASK (0x3 << 30)
16 #define SYSTEM_CTRL_DPMS_VPHP (0x0 << 30)
17 #define SYSTEM_CTRL_DPMS_VPHN (0x1 << 30)
18 #define SYSTEM_CTRL_DPMS_VNHP (0x2 << 30)
19 #define SYSTEM_CTRL_DPMS_VNHN (0x3 << 30)
35 #define SYSTEM_CTRL_PCI_SLAVE_BURST_READ_SIZE_MASK (0x3 << 4)
[all …]
/linux-6.12.1/drivers/media/tuners/
De4000_priv.h48 { 72400000, 0x0f, 48 }, /* .......... 3475200000 */
49 { 81200000, 0x0e, 40 }, /* 2896000000 3248000000 */
50 { 108300000, 0x0d, 32 }, /* 2598400000 3465600000 */
51 { 162500000, 0x0c, 24 }, /* 2599200000 3900000000 */
52 { 216600000, 0x0b, 16 }, /* 2600000000 3465600000 */
53 { 325000000, 0x0a, 12 }, /* 2599200000 3900000000 */
54 { 350000000, 0x09, 8 }, /* 2600000000 2800000000 */
55 { 432000000, 0x03, 8 }, /* 2800000000 3456000000 */
56 { 667000000, 0x02, 6 }, /* 2592000000 4002000000 */
57 { 1200000000, 0x01, 4 }, /* 2668000000 4800000000 */
[all …]
/linux-6.12.1/arch/arm/mach-imx/
Dcrmregs-imx3.h17 #define MXC_CCM_CCMR 0x00
18 #define MXC_CCM_PDR0 0x04
19 #define MXC_CCM_PDR1 0x08
20 #define MX35_CCM_PDR2 0x0C
21 #define MXC_CCM_RCSR 0x0C
22 #define MX35_CCM_PDR3 0x10
23 #define MXC_CCM_MPCTL 0x10
24 #define MX35_CCM_PDR4 0x14
25 #define MXC_CCM_UPCTL 0x14
26 #define MX35_CCM_RCSR 0x18
[all …]
/linux-6.12.1/lib/fonts/
Dfont_ter16x32.c8 { 0, 0, FONTDATAMAX, 0 }, {
9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
10 0x00, 0x00, 0x00, 0x00, 0x7f, 0xfc, 0x7f, 0xfc,
11 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
12 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
13 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
14 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c, 0x70, 0x1c,
15 0x7f, 0xfc, 0x7f, 0xfc, 0x00, 0x00, 0x00, 0x00,
16 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0 */
17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
/linux-6.12.1/drivers/media/platform/verisilicon/
Dhantro_g2_regs.h22 #define G2_REG_VERSION G2_SWREG(0)
28 #define G2_REG_INTERRUPT_DEC_E BIT(0)
30 #define HEVC_DEC_MODE 0xc
31 #define VP9_DEC_MODE 0xd
33 #define BUS_WIDTH_32 0
38 #define g2_strm_swap G2_DEC_REG(2, 28, 0xf)
39 #define g2_strm_swap_old G2_DEC_REG(2, 27, 0x1f)
40 #define g2_pic_swap G2_DEC_REG(2, 22, 0x1f)
41 #define g2_dirmv_swap G2_DEC_REG(2, 20, 0xf)
42 #define g2_dirmv_swap_old G2_DEC_REG(2, 17, 0x1f)
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/
Dsolomon,ssd1307fb.yaml49 default: 0
70 default: 0
96 minimum: 0
223 #size-cells = <0>;
227 reg = <0x3c>;
234 reg = <0x3d>;
240 solomon,lookup-table = /bits/ 8 <0x3f 0x3f 0x3f 0x3f>;
246 #size-cells = <0>;
248 ssd1307_spi: oled@0 {
250 reg = <0x0>;
[all …]

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