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/linux-6.12.1/tools/testing/selftests/wireguard/qemu/
Dinit.c35 fprintf(stderr, "\x1b[37m\x1b[41m\x1b[1mFailed to power off!!!\x1b[0m\n"); in poweroff()
41 … "\n\n\x1b[37m\x1b[41m\x1b[1mSOMETHING WENT HORRIBLY WRONG\x1b[0m\n\n \x1b[31m\x1b[1m%s: %s\x1b… in panic()
45 #define pretty_message(msg) puts("\x1b[32m\x1b[1m" msg "\x1b[0m")
52 if (uname(&utsname) < 0) in print_banner()
56 …ntf("\x1b[45m\x1b[33m\x1b[1m%*.s\x1b[0m\n\x1b[45m\x1b[33m\x1b[1m WireGuard Test Suite on %s %s … in print_banner()
63 if (!getrandom(NULL, 0, GRND_NONBLOCK)) in seed_rng()
67 if (fd < 0) in seed_rng()
69 if (ioctl(fd, RNDADDTOENTCNT, &bits) < 0) in seed_rng()
79 if (stime(&(time_t){1433512680}) < 0) in set_time()
92 if (mount("none", "/dev", "devtmpfs", 0, NULL)) in mount_filesystems()
[all …]
/linux-6.12.1/drivers/media/dvb-frontends/
Dstv0900_init.h24 { 0, 11101 }, /*C/N=-0dB*/
83 { -5, 0xCAA1 }, /*-5dBm*/
84 { -10, 0xC229 }, /*-10dBm*/
85 { -15, 0xBB08 }, /*-15dBm*/
86 { -20, 0xB4BC }, /*-20dBm*/
87 { -25, 0xAD5A }, /*-25dBm*/
88 { -30, 0xA298 }, /*-30dBm*/
89 { -35, 0x98A8 }, /*-35dBm*/
90 { -40, 0x8389 }, /*-40dBm*/
91 { -45, 0x59BE }, /*-45dBm*/
[all …]
/linux-6.12.1/drivers/media/usb/gspca/
Dsn9c2028.c37 unsigned char to_read; /* length to read. 0 means no reply requested */
46 .priv = 0},
55 .priv = 0},
64 command[0], command[1], command[2], in sn9c2028_command()
69 usb_sndctrlpipe(gspca_dev->dev, 0), in sn9c2028_command()
72 2, 0, gspca_dev->usb_buf, 6, 500); in sn9c2028_command()
73 if (rc < 0) { in sn9c2028_command()
75 gspca_dev->usb_buf[0], rc); in sn9c2028_command()
79 return 0; in sn9c2028_command()
87 usb_rcvctrlpipe(gspca_dev->dev, 0), in sn9c2028_read1()
[all …]
/linux-6.12.1/lib/fonts/
Dfont_10x18.c12 { 0, 0, FONTDATAMAX, 0 }, {
13 /* 0 0x00 '^@' */
14 0x00, 0x00, /* 0000000000 */
15 0x00, 0x00, /* 0000000000 */
16 0x00, 0x00, /* 0000000000 */
17 0x00, 0x00, /* 0000000000 */
18 0x00, 0x00, /* 0000000000 */
19 0x00, 0x00, /* 0000000000 */
20 0x00, 0x00, /* 0000000000 */
21 0x00, 0x00, /* 0000000000 */
[all …]
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drk3288-veyron-jerry.dts25 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
45 #size-cells = <0>;
52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
[all …]
/linux-6.12.1/sound/soc/codecs/
Des8326.c58 crosstalk_h &= 0x20; in es8326_crosstalk1_get()
59 crosstalk_l &= 0xf0; in es8326_crosstalk1_get()
61 ucontrol->value.integer.value[0] = crosstalk; in es8326_crosstalk1_get()
63 return 0; in es8326_crosstalk1_get()
74 crosstalk = ucontrol->value.integer.value[0]; in es8326_crosstalk1_set()
76 crosstalk_h = (crosstalk & 0x10) << 1; in es8326_crosstalk1_set()
77 crosstalk_l &= 0x0f; in es8326_crosstalk1_set()
78 crosstalk_l |= (crosstalk & 0x0f) << 4; in es8326_crosstalk1_set()
80 0x20, crosstalk_h); in es8326_crosstalk1_set()
83 return 0; in es8326_crosstalk1_set()
[all …]
/linux-6.12.1/drivers/clk/mmp/
Dclk-of-pxa1928.c23 #define MPMU_UART_PLL 0x14
37 {0, "clk32", NULL, 0, 32768},
38 {0, "vctcxo", NULL, 0, 26000000},
39 {0, "pll1_624", NULL, 0, 624000000},
40 {0, "pll5p", NULL, 0, 832000000},
41 {0, "pll5", NULL, 0, 1248000000},
42 {0, "usb_pll", NULL, 0, 480000000},
46 {0, "pll1_d2", "pll1_624", 1, 2, 0},
47 {0, "pll1_d9", "pll1_624", 1, 9, 0},
48 {0, "pll1_d12", "pll1_624", 1, 12, 0},
[all …]
Dclk-of-mmp2.c25 #define APBC_RTC 0x0
26 #define APBC_TWSI0 0x4
27 #define APBC_TWSI1 0x8
28 #define APBC_TWSI2 0xc
29 #define APBC_TWSI3 0x10
30 #define APBC_TWSI4 0x7c
31 #define APBC_TWSI5 0x80
32 #define APBC_KPC 0x18
33 #define APBC_TIMER 0x24
34 #define APBC_UART0 0x2c
[all …]
Dclk-of-pxa910.c22 #define APBC_RTC 0x28
23 #define APBC_TWSI0 0x2c
24 #define APBC_KPC 0x18
25 #define APBC_UART0 0x0
26 #define APBC_UART1 0x4
27 #define APBC_GPIO 0x8
28 #define APBC_PWM0 0xc
29 #define APBC_PWM1 0x10
30 #define APBC_PWM2 0x14
31 #define APBC_PWM3 0x18
[all …]
/linux-6.12.1/drivers/auxdisplay/
Dcharlcd.c109 lcd->addr.x = 0; in charlcd_home()
110 lcd->addr.y = 0; in charlcd_home()
133 lcd->addr.x = 0; in charlcd_clear_display()
134 lcd->addr.y = 0; in charlcd_clear_display()
139 * any number of subcommands of the form "(x|y)[0-9]+".
203 int processed = 0; in handle_lcd_special_code()
299 if (lcd->addr.x > 0) { in handle_lcd_special_code()
339 priv->flags = ((lcd->height > 1) ? LCD_FLAG_N : 0) | LCD_FLAG_D | in handle_lcd_special_code()
372 if ((c != '\n') && priv->esc_seq.len >= 0) { in charlcd_write_char()
375 priv->esc_seq.buf[priv->esc_seq.len] = '\0'; in charlcd_write_char()
[all …]
/linux-6.12.1/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
275 "\x1B\x99\xA4\x95\x84\x98\x07\xFE\x39\xF9\x24\x5A\x98\x36\xDA\x3D"
285 "\x74\x1b\x55\xac\x47\xb5\x08\x0a\x6e\x2b\x2d\xf7\x94\xb8\x8a\x95"
306 "\x47\xF0\x1B\xD7\x2B\x24\xEC\xCB\x9B\x1B\x10\x8D\x81\xA0\xBE\xB1"
309 "\x59\x9F\x45\xE8\x5D\x1A\x45\x76\x04\x56\x05\xA1\xD0\x1B\x8C\x77"
352 "\x3E\x45\x18\x99\x1B\x41\x64\x43\xEE\x97\x5D\x77\x13\x5B\x74\x69"
360 "\xEC\x73\xFD\x15\x1B\xA2\xA0\x7A\x0F\x0D\x6E\xB4\x53\x07\x90\x92"
369 "\x76\x10\x93\x77\x41\x04\xAB\x4C\xED\x6A\xCC\x14\x1B\x99\x8D\x0C"
374 "\x00\x8D\x1B\x05\xCA\x24\x1F\x0C\x53\x19\x52\x74\x63\x21\xFA\x78"
[all …]
Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
113 return 0; in dh_is_pubkey_valid()
126 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
134 val = mpi_alloc(0); in dh_is_pubkey_valid()
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/b43/
Dradio_2057.c17 { 0x0E, 0x20 }, { 0x31, 0x00 }, { 0x32, 0x00 }, { 0x33, 0x00 },
18 { 0x35, 0x26 }, { 0x3C, 0xff }, { 0x3D, 0xff }, { 0x3E, 0xff },
19 { 0x3F, 0xff }, { 0x62, 0x33 }, { 0x8A, 0xf0 }, { 0x8B, 0x10 },
20 { 0x8C, 0xf0 }, { 0x91, 0x3f }, { 0x92, 0x36 }, { 0xA4, 0x8c },
21 { 0xA8, 0x55 }, { 0xAF, 0x01 }, { 0x10F, 0xf0 }, { 0x110, 0x10 },
22 { 0x111, 0xf0 }, { 0x116, 0x3f }, { 0x117, 0x36 }, { 0x129, 0x8c },
23 { 0x12D, 0x55 }, { 0x134, 0x01 }, { 0x15E, 0x00 }, { 0x15F, 0x00 },
24 { 0x160, 0x00 }, { 0x161, 0x00 }, { 0x162, 0x00 }, { 0x163, 0x00 },
25 { 0x169, 0x02 }, { 0x16A, 0x00 }, { 0x16B, 0x00 }, { 0x16C, 0x00 },
26 { 0x1A4, 0x00 }, { 0x1A5, 0x00 }, { 0x1A6, 0x00 }, { 0x1AA, 0x00 },
[all …]
Dradio_2059.c17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 },
18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 },
19 { 0x188, 0x05 },
61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
63 0x00, 0x00, 0x00, 0xd0, 0x00),
64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
70 0x00, 0x00, 0x00, 0xd0, 0x00),
[all …]
Dtables_nphy.h74 #define B43_NTAB_TYPEMASK 0xF0000000
75 #define B43_NTAB_8BIT 0x10000000
76 #define B43_NTAB_16BIT 0x20000000
77 #define B43_NTAB_32BIT 0x30000000
83 #define B43_NTAB_FRAMESTRUCT B43_NTAB32(0x0A, 0x000) /* Frame Struct Table */
85 #define B43_NTAB_FRAMELT B43_NTAB8 (0x18, 0x000) /* Frame Lookup Table */
87 #define B43_NTAB_TMAP B43_NTAB32(0x0C, 0x000) /* T Map Table */
89 #define B43_NTAB_TDTRN B43_NTAB32(0x0E, 0x000) /* TDTRN Table */
91 #define B43_NTAB_INTLEVEL B43_NTAB32(0x0D, 0x000) /* Int Level Table */
93 #define B43_NTAB_PILOT B43_NTAB16(0x0B, 0x000) /* Pilot Table */
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
Dgfx_7_2_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE_MASK 0x8
36 #define CB_COLOR_CONTROL__DEGAMMA_ENABLE__SHIFT 0x3
[all …]
Dgfx_8_1_sh_mask.h27 #define CB_BLEND_RED__BLEND_RED_MASK 0xffffffff
28 #define CB_BLEND_RED__BLEND_RED__SHIFT 0x0
29 #define CB_BLEND_GREEN__BLEND_GREEN_MASK 0xffffffff
30 #define CB_BLEND_GREEN__BLEND_GREEN__SHIFT 0x0
31 #define CB_BLEND_BLUE__BLEND_BLUE_MASK 0xffffffff
32 #define CB_BLEND_BLUE__BLEND_BLUE__SHIFT 0x0
33 #define CB_BLEND_ALPHA__BLEND_ALPHA_MASK 0xffffffff
34 #define CB_BLEND_ALPHA__BLEND_ALPHA__SHIFT 0x0
35 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE_MASK 0x1
36 #define CB_DCC_CONTROL__OVERWRITE_COMBINER_DISABLE__SHIFT 0x0
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/dispnv04/
Dtvmodesnv17.c53 0x2a, 0x9, 0x8a, 0xcb, 0x0, 0x0, 0xb, 0x18,
54 0x7e, 0x40, 0x8a, 0x35, 0x27, 0x0, 0x34, 0x3,
55 0x3e, 0x3, 0x17, 0x21, 0x1b, 0x1b, 0x24, 0x9c,
56 0x1, 0x0, 0xf, 0xf, 0x60, 0x5, 0xd3, 0x3,
57 0xd3, 0x4, 0xd4, 0x1, 0x2, 0x0, 0xa, 0x5,
58 0x0, 0x1a, 0xff, 0x3, 0x18, 0xf, 0x78, 0x0,
59 0x0, 0xb4, 0x0, 0x15, 0x49, 0x10, 0x0, 0x9b,
60 0xbd, 0x15, 0x5, 0x15, 0x3e, 0x3, 0x0, 0x0
65 0x21, 0xe6, 0xef, 0xe3, 0x0, 0x0, 0xb, 0x18,
66 0x7e, 0x44, 0x76, 0x32, 0x25, 0x0, 0x3c, 0x0,
[all …]
/linux-6.12.1/drivers/net/dsa/mv88e6xxx/
Dglobal2.h16 /* Offset 0x00: Interrupt Source Register */
17 #define MV88E6XXX_G2_INT_SRC 0x00
18 #define MV88E6XXX_G2_INT_SRC_WDOG 0x8000
19 #define MV88E6XXX_G2_INT_SRC_JAM_LIMIT 0x4000
20 #define MV88E6XXX_G2_INT_SRC_DUPLEX_MISMATCH 0x2000
21 #define MV88E6XXX_G2_INT_SRC_WAKE_EVENT 0x1000
22 #define MV88E6352_G2_INT_SRC_SERDES 0x0800
23 #define MV88E6352_G2_INT_SRC_PHY 0x001f
24 #define MV88E6390_G2_INT_SRC_PHY 0x07fe
28 /* Offset 0x01: Interrupt Mask Register */
[all …]
/linux-6.12.1/drivers/phy/starfive/
Dphy-jh7110-dphy-tx.c26 #define STF_DPHY_AON_POWER_READY_N_ACTIVE 0
27 #define STF_DPHY_AON_POWER_READY_N BIT(0)
43 #define STF_DPHY_RG_CDTX_L4N_HSTX_RES GENMASK(4, 0)
45 #define STF_DPHY_RG_CDTX_PLL_FBK_FRA GENMASK(23, 0)
47 #define STF_DPHY_RG_CDTX_PLL_FBK_INT GENMASK(8, 0)
54 #define STF_DPHY_RG_CLANE_HS_CLK_POST_TIME GENMASK(7, 0)
59 #define STF_DPHY_RG_CLANE_HS_ZERO_TIME GENMASK(7, 0)
64 #define STF_DPHY_RG_EXTD_CYCLE_SEL GENMASK(2, 0)
65 #define STF_DPHY_SCFG_C_HS_PRE_ZERO_TIME GENMASK(31, 0)
100 {160000000, 0x6a, 0xaa, 0x3, 0xa, 0x17, 0x11, 0x5, 0x2b, 0xd, 0x7, 0x3d},
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h25 …DC_CNT__DRAMRD_CMDMEM_SEC_COUNT__SHIFT 0x0
26 …DC_CNT__DRAMRD_CMDMEM_DED_COUNT__SHIFT 0x2
27 …DC_CNT__DRAMWR_CMDMEM_SEC_COUNT__SHIFT 0x4
28 …DC_CNT__DRAMWR_CMDMEM_DED_COUNT__SHIFT 0x6
29 …DC_CNT__DRAMWR_DATAMEM_SEC_COUNT__SHIFT 0x8
30 …DC_CNT__DRAMWR_DATAMEM_DED_COUNT__SHIFT 0xa
31 …DC_CNT__RRET_TAGMEM_SEC_COUNT__SHIFT 0xc
32 …DC_CNT__RRET_TAGMEM_DED_COUNT__SHIFT 0xe
33 …C_CNT__WRET_TAGMEM_SEC_COUNT__SHIFT 0x10
34 …C_CNT__WRET_TAGMEM_DED_COUNT__SHIFT 0x12
[all …]
Dgc_9_4_3_sh_mask.h29 …NTL__READ_TIMEOUT__SHIFT 0x0
30 …TL__REPORT_LAST_RDERR__SHIFT 0x1f
31 …D_TIMEOUT_MASK 0x000000FFL
32 …ORT_LAST_RDERR_MASK 0x80000000L
34 …KEW_CNTL__SKEW_TOP_THRESHOLD__SHIFT 0x0
35 …KEW_CNTL__SKEW_COUNT__SHIFT 0x6
36 …__SKEW_TOP_THRESHOLD_MASK 0x0000003FL
37 …__SKEW_COUNT_MASK 0x00000FC0L
39 …TATUS2__ME0PIPE1_CMDFIFO_AVAIL__SHIFT 0x0
40 …TATUS2__ME0PIPE1_CF_RQ_PENDING__SHIFT 0x4
[all …]
/linux-6.12.1/sound/pci/hda/
Dca0132_regs.h12 #define DSP_CHIP_OFFSET 0x100000
13 #define DSP_DBGCNTL_MODULE_OFFSET 0xE30
17 #define DSP_DBGCNTL_EXEC_LOBIT 0x0
18 #define DSP_DBGCNTL_EXEC_HIBIT 0x3
19 #define DSP_DBGCNTL_EXEC_MASK 0xF
21 #define DSP_DBGCNTL_SS_LOBIT 0x4
22 #define DSP_DBGCNTL_SS_HIBIT 0x7
23 #define DSP_DBGCNTL_SS_MASK 0xF0
25 #define DSP_DBGCNTL_STATE_LOBIT 0xA
26 #define DSP_DBGCNTL_STATE_HIBIT 0xD
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/include/asic_reg/pcie/
Dpcie_6_1_0_sh_mask.h29 …WDID__Hardware_Revision__SHIFT 0x0
30 …WDID__Hardware_Minor_Version_Number__SHIFT 0x6
31 …WDID__Hardware_Major_Version_Number__SHIFT 0xd
32 …rdware_Revision_MASK 0x0000003FL
33 …rdware_Minor_Version_Number_MASK 0x00001FC0L
34 …rdware_Major_Version_Number_MASK 0x000FE000L
36 …INKAGE_LANEGRP__Lane_Group_Indirect_Accesses__SHIFT 0x0
37 …INKAGE_LANEGRP__Lane_Group_Aperture_Size__SHIFT 0x2
38 …INKAGE_LANEGRP__Index_Offset__SHIFT 0x6
39 …NKAGE_LANEGRP__Presence__SHIFT 0x14
[all …]

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