/linux-6.12.1/drivers/video/fbdev/ |
D | ffb.c | 64 #define FFB_SFB8R_VOFF 0x00000000 65 #define FFB_SFB8G_VOFF 0x00400000 66 #define FFB_SFB8B_VOFF 0x00800000 67 #define FFB_SFB8X_VOFF 0x00c00000 68 #define FFB_SFB32_VOFF 0x01000000 69 #define FFB_SFB64_VOFF 0x02000000 70 #define FFB_FBC_REGS_VOFF 0x04000000 71 #define FFB_BM_FBC_REGS_VOFF 0x04002000 72 #define FFB_DFB8R_VOFF 0x04004000 73 #define FFB_DFB8G_VOFF 0x04404000 [all …]
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/linux-6.12.1/drivers/of/unittest-data/ |
D | tests-address.dtsi | 17 ranges = <0x70000000 0x70000000 0x50000000>, 18 <0x00000000 0xd0000000 0x20000000>; 19 dma-ranges = <0x0 0x20000000 0x40000000>; 22 reg = <0x70000000 0x1000>; 28 ranges = <0x0 0x0 0x80000000 0x0 0x100000>; 29 dma-ranges = <0x1 0x0 0x0 0x20 0x0>; 32 reg = <0x0 0x1000 0x0 0x1000>; 40 reg = <0x90000000 0x1000>; 41 ranges = <0x42000000 0x0 0x40000000 0x40000000 0x0 0x10000000>; 42 dma-ranges = <0x42000000 0x0 0x80000000 0x00000000 0x0 0x10000000>, [all …]
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/linux-6.12.1/tools/perf/pmu-events/arch/riscv/sifive/u74/ |
D | instructions.json | 4 "EventCode": "0x0000100", 9 "EventCode": "0x0000200", 14 "EventCode": "0x0000400", 19 "EventCode": "0x0000800", 24 "EventCode": "0x0001000", 29 "EventCode": "0x0002000", 34 "EventCode": "0x0004000", 39 "EventCode": "0x0008000", 44 "EventCode": "0x0010000", 49 "EventCode": "0x0020000", [all …]
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/linux-6.12.1/include/uapi/linux/ |
D | personality.h | 12 UNAME26 = 0x0020000, 13 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */ 14 FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to descriptors 17 MMAP_PAGE_ZERO = 0x0100000, 18 ADDR_COMPAT_LAYOUT = 0x0200000, 19 READ_IMPLIES_EXEC = 0x0400000, 20 ADDR_LIMIT_32BIT = 0x0800000, 21 SHORT_INODE = 0x1000000, 22 WHOLE_SECONDS = 0x2000000, 23 STICKY_TIMEOUTS = 0x4000000, [all …]
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/linux-6.12.1/arch/arm/boot/dts/qcom/ |
D | qcom-ipq8064-rb3011.dts | 25 pinctrl-0 = <&buttons_pins>; 39 pinctrl-0 = <&leds_pins>; 42 led-0 { 51 reg = <0x42000000 0x3e000000>; 55 mdio0: mdio-0 { 59 <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>; 61 #size-cells = <0>; 63 pinctrl-0 = <&mdio0_pins>; 69 dsa,member = <0 0>; 71 pinctrl-0 = <&sw0_reset_pin>; [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/watchdog/ |
D | snps,dw-wdt.yaml | 70 default: [0x0001000 0x0002000 0x0004000 0x0008000 71 0x0010000 0x0020000 0x0040000 0x0080000 72 0x0100000 0x0200000 0x0400000 0x0800000 73 0x1000000 0x2000000 0x4000000 0x8000000] 88 reg = <0xffd02000 0x1000>; 89 interrupts = <0 171 4>; 97 reg = <0xffd02000 0x1000>; 98 interrupts = <0 171 4>; 101 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF 102 0x000007FF 0x0000FFFF 0x0001FFFF [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | microchip,lan966x-switch.yaml | 20 pattern: "^switch@[0-9a-f]+$" 68 const: 0 73 "^port@[0-9a-f]+$": 83 const: 0 143 reg = <0xe0000000 0x0100000>, 144 <0xe2000000 0x0800000>; 148 resets = <&switch_reset 0>; 152 #size-cells = <0>; 154 port0: port@0 { 155 reg = <0>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/nxp/lpc/ |
D | lpc4337-ciaa.dts | 35 reg = <0x28000000 0x0800000>; /* 8 MB */ 173 pinctrl-0 = <&i2c0_pins>; 178 reg = <0x50>; 183 reg = <0x51>; 188 reg = <0x54>; 196 pinctrl-0 = <&enet_rmii_pins>; 206 pinctrl-0 = <&ssp_pins>; 214 pinctrl-0 = <&uart2_pins>; 220 pinctrl-0 = <&uart3_pins>;
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/linux-6.12.1/arch/arm/boot/dts/marvell/ |
D | kirkwood-topkick.dts | 13 reg = <0x00000000 0x10000000>; 34 pinctrl-0 = <&pmx_sw_left &pmx_sw_right 103 pinctrl-0 = <&pmx_sdio>; 125 pinctrl-0 = <&pmx_led_disk_yellow &pmx_led_sys_red 156 #size-cells = <0>; 157 pinctrl-0 = <&pmx_sata0_pwr_enable>; 169 gpio = <&gpio1 4 0>; 177 partition@0 { 179 reg = <0x0000000 0x180000>; 184 reg = <0x0180000 0x20000>; [all …]
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D | kirkwood-netgear_readynas_duo_v2.dts | 19 reg = <0x00000000 0x10000000>; 78 #clock-cells = <0>; 88 reg = <0x32>; 93 reg = <0x3e>; 95 fan_gear_mode = <0>; 97 pwm_polarity = <0>; 113 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_activity 147 pinctrl-0 = <&pmx_button_power &pmx_button_backup 172 pinctrl-0 = <&pmx_poweroff>; 180 #size-cells = <0>; [all …]
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D | kirkwood-netgear_readynas_nv+_v2.dts | 19 reg = <0x00000000 0x10000000>; 83 #clock-cells = <0>; 93 reg = <0x32>; 98 reg = <0x3e>; 100 fan_gear_mode = <0>; 102 pwm_polarity = <0>; 132 pinctrl-0 = < &pmx_led_blue_power &pmx_led_blue_backup 171 pinctrl-0 = <&pmx_button_power &pmx_button_backup 196 pinctrl-0 = <&pmx_poweroff>; 204 #size-cells = <0>; [all …]
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D | armada-370-netgear-rn102.dts | 22 memory@0 { 24 reg = <0x00000000 0x20000000>; /* 512 MB */ 28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; 50 pinctrl-0 = <&ge1_rgmii_pins>; 64 pinctrl-0 = <&i2c0_pins>; 71 reg = <0x68>; 77 reg = <0x3e>; 79 fan_gear_mode = <0>; [all …]
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D | armada-370-netgear-rn104.dts | 22 memory@0 { 24 reg = <0x00000000 0x20000000>; /* 512 MB */ 28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 29 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000 30 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>; 44 pinctrl-0 = <&ge0_rgmii_pins>; 52 pinctrl-0 = <&ge1_rgmii_pins>; 66 pinctrl-0 = <&i2c0_pins>; 73 reg = <0x68>; 79 reg = <0x3e>; [all …]
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D | armada-xp-netgear-rn2120.dts | 22 memory@0 { 24 reg = <0 0x00000000 0 0x80000000>; /* 2GB */ 28 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000 29 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000 30 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000 31 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>; 48 reg = <0x3e>; 50 fan_gear_mode = <0>; 52 pwm_polarity = <0>; 58 reg = <0x48>; [all …]
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/linux-6.12.1/drivers/video/fbdev/matrox/ |
D | matroxfb_base.c | 138 0,0, /* virtual -> visible no offset */ 140 0, /* greyscale ? */ 141 {0,0,0}, /* R */ 142 {0,0,0}, /* G */ 143 {0,0,0}, /* B */ 144 {0,0,0}, /* transparency */ 145 0, /* standard pixel format */ 150 96L,2L,~0, /* No sync info */ 171 mga_outl(0x3C2C, pos); in update_crtc2() 172 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8); in update_crtc2() [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/omap/ |
D | dra7-evm-common.dtsi | 90 #size-cells = <0>; 123 <&dra7_pmx_core 0x3e0>; 138 flash@0 { 141 reg = <0>; 152 partition@0 { 154 reg = <0x00000000 0x00010000>; 158 reg = <0x00010000 0x00010000>; 162 reg = <0x00020000 0x00010000>; 166 reg = <0x00030000 0x00010000>; 170 reg = <0x00040000 0x00100000>; [all …]
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D | am437x-idk-evm.dts | 104 pinctrl-0 = <&gpio_keys_pins_default>; 106 switch-0 { 115 #clock-cells = <0>; 125 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>; 176 AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7) /* cam0_field.gpio4_2 */ 182 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 183 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 189 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7) 190 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7) 196 AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ [all …]
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D | am57xx-idk-common.dtsi | 64 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>; 111 hdmi0: connector@0 { 124 tpd12s015: encoder@0 { 127 gpios = <0>, /* optional CT_CP_HPD */ 128 <0>, /* optional LS_OE */ 133 #size-cells = <0>; 135 port@0 { 136 reg = <0>; 138 tpd12s015_in: endpoint@0 { 146 tpd12s015_out: endpoint@0 { [all …]
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D | dra72-evm-common.dtsi | 129 #size-cells = <0>; 131 port@0 { 132 reg = <0>; 194 #clock-cells = <0>; 202 DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ 203 DRA7XX_CORE_IOPAD(0x3818, PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */ 209 DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ 210 DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */ 221 reg = <0x20>; 230 reg = <0x21>; [all …]
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/linux-6.12.1/arch/arm/mach-versatile/ |
D | integrator-hardware.h | 14 #define IO_BASE 0xF0000000 // VA of IO 15 #define IO_SIZE 0x0B000000 // How much? 19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE) 25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000 26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000 40 #define INTEGRATOR_SSRAM_BASE 0x00000000 41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000 44 #define INTEGRATOR_FLASH_BASE 0x24000000 47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000 53 #define INTEGRATOR_SDRAM_BASE 0x00040000 [all …]
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/linux-6.12.1/arch/mips/include/asm/sn/sn0/ |
D | kldir.h | 28 * 0x2000000 (32M) +-----------------------------------------+ 30 * 0x1F80000 (31.5M) +-----------------------------------------+ 32 * 0x1C00000 (30M) +-----------------------------------------+ 34 * 0x0800000 (28M) +-----------------------------------------+ 36 * 0x1B00000 (27M) +-----------------------------------------+ 38 * 0x1A00000 (26M) +-----------------------------------------+ 40 * 0x1800000 (24M) +-----------------------------------------+ 42 * 0x1600000 (22M) +-----------------------------------------+ 48 * 0x190000 (2M--) +-----------------------------------------+ 51 * 0x34000 (208K) +-----------------------------------------+ [all …]
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/linux-6.12.1/arch/powerpc/boot/dts/ |
D | mpc836x_rdk.dts | 32 #size-cells = <0>; 34 PowerPC,8360@0 { 36 reg = <0>; 42 timebase-frequency = <0>; 43 bus-frequency = <0>; 44 clock-frequency = <0>; 51 reg = <0 0>; 60 ranges = <0 0xe0000000 0x200000>; 61 reg = <0xe0000000 0x200>; 63 bus-frequency = <0>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/keystone/ |
D | keystone-k2g-ice.dts | 18 reg = <0x00000008 0x00000000 0x00000000 0x20000000>; 28 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 128 <&pca9536 0 GPIO_ACTIVE_HIGH>; 129 linux,axis = <0>; /* ABS_X */ 136 pinctrl-0 = <&user_leds>; 223 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 224 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 230 K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */ 231 K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */ 232 K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */ [all …]
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/linux-6.12.1/arch/microblaze/kernel/ |
D | head.S | 57 #if CONFIG_KERNEL_BASE_ADDR == 0 59 .org 0x100 66 addi r8, r0, 0xFFFFFFFF 72 * r8 == 0 - msr instructions are implemented 73 * r8 != 0 - msr instructions are not implemented 76 msrclr r8, 0 /* clear nothing - just read msr for test */ 86 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */ 99 ori r3, r0, (0x10000 - 4) 126 addik r5, r4, 0 /* add new space for command line */ 180 or r9, r0, r0 /* TLB0 = 0 */ [all …]
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/linux-6.12.1/arch/arm/boot/dts/microchip/ |
D | lan966x.dtsi | 27 #size-cells = <0>; 29 cpu@0 { 33 reg = <0x0>; 40 #clock-cells = <0>; 46 #clock-cells = <0>; 52 #clock-cells = <0>; 58 #clock-cells = <0>; 68 reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>; 90 reg = <0x00200000 0x80000>, 91 <0xe0808000 0x400>; [all …]
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