ti/omap/am437x-idk-evm.dts

104 		pinctrl-0 = <&gpio_keys_pins_default>;
106 		switch-0 {
115 		#clock-cells = <0>;
125 			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
176 			AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7)	/* cam0_field.gpio4_2 */
182 			AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
183 			AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
189 			AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
190 			AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
196 			AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
197 			AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
203 			AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
204 			AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
210 			AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
211 			AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
212 			AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
213 			AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
214 			AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
215 			AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
216 			AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
222 			AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
223 			AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
224 			AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
225 			AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
226 			AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
227 			AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
228 			AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
234 			AM4372_IOPAD(0x908, PIN_INPUT | MUX_MODE2)	/* mii1_col.spi1_sclk */
235 			AM4372_IOPAD(0x910, PIN_INPUT | MUX_MODE2)	/* mii1_rx_er.spi1_d1 */
236 			AM4372_IOPAD(0x944, PIN_OUTPUT | MUX_MODE2)	/* rmii1_ref_clk.spi1_cs0 */
237 			AM4372_IOPAD(0x90c, PIN_OUTPUT | MUX_MODE7)	/* mii1_crs.gpio3_1 */
243 			AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
244 			AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
245 			AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
246 			AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
252 			AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
258 			AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
259 			AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
260 			AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
261 			AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
262 			AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
263 			AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
264 			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
265 			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
266 			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
267 			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
268 			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
269 			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */
275 			AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
276 			AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
277 			AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
278 			AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
279 			AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
280 			AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
281 			AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
282 			AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
283 			AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
284 			AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
285 			AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
286 			AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
293 			AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
294 			AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
301 			AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
302 			AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
308 			AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
309 			AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)		/* gpmc_csn3.qspi_clk */
310 			AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
311 			AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
312 			AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
313 			AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
319 			AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
320 			AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
321 			AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
322 			AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
323 			AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
324 			AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
332 	pinctrl-0 = <&i2c0_pins_default>;
339 		reg = <0x50>;
344 		reg = <0x60>;
359 	pinctrl-0 = <&i2c2_pins_default>;
365 		reg = <0x60>;
374 	pinctrl-0 = <&spi1_pins_default>;
378 	sn65hvs882: sn65hvs882@0 {
385 		reg = <0>;
398 	pinctrl-0 = <&ecap0_pins_default>;
424 	pinctrl-0 = <&mmc1_pins_default>;
434 	pinctrl-0 = <&qspi_pins_default>;
438 	flash@0 {
441 		reg = <0>;
453 		partition@0 {
455 			reg = <0x00000000 0x00080000>;
459 			reg = <0x00080000 0x00080000>;
463 			reg = <0x00100000 0x00010000>;
467 			reg = <0x00110000 0x00010000>;
471 			reg = <0x00120000 0x00010000>;
475 			reg = <0x00130000 0x0800000>;
479 			reg = <0x00930000 0x36D0000>;
486 	pinctrl-0 = <&cpsw_default>;
493 	pinctrl-0 = <&davinci_mdio_default>;
496 	ethphy0: ethernet-phy@0 {
497 		reg = <0>;