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/linux-6.12.1/drivers/video/fbdev/
Dffb.c64 #define FFB_SFB8R_VOFF 0x00000000
65 #define FFB_SFB8G_VOFF 0x00400000
66 #define FFB_SFB8B_VOFF 0x00800000
67 #define FFB_SFB8X_VOFF 0x00c00000
68 #define FFB_SFB32_VOFF 0x01000000
69 #define FFB_SFB64_VOFF 0x02000000
70 #define FFB_FBC_REGS_VOFF 0x04000000
71 #define FFB_BM_FBC_REGS_VOFF 0x04002000
72 #define FFB_DFB8R_VOFF 0x04004000
73 #define FFB_DFB8G_VOFF 0x04404000
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mtd/
Dorion-nand.txt9 - cle : Address line number connected to CLE. Default is 0
23 cle = <0>;
28 reg = <0xf4000000 0x400>;
30 partition@0 {
32 reg = <0x0000000 0x100000>;
38 reg = <0x0100000 0x200000>;
43 reg = <0x0300000 0x100000>;
48 reg = <0x0400000 0x7d00000>;
/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm47094-phicomm-k3.dts16 memory@0 {
18 reg = <0x00000000 0x08000000>,
19 <0x88000000 0x18000000>;
47 partition@0 {
49 reg = <0x0000000 0x0080000>;
55 reg = <0x0080000 0x0100000>;
60 reg = <0x0180000 0x0280000>;
66 reg = <0x0400000 0x7C00000>;
/linux-6.12.1/tools/perf/pmu-events/arch/riscv/sifive/u74/
Dinstructions.json4 "EventCode": "0x0000100",
9 "EventCode": "0x0000200",
14 "EventCode": "0x0000400",
19 "EventCode": "0x0000800",
24 "EventCode": "0x0001000",
29 "EventCode": "0x0002000",
34 "EventCode": "0x0004000",
39 "EventCode": "0x0008000",
44 "EventCode": "0x0010000",
49 "EventCode": "0x0020000",
[all …]
/linux-6.12.1/arch/microblaze/kernel/
Dhead.S57 #if CONFIG_KERNEL_BASE_ADDR == 0
59 .org 0x100
66 addi r8, r0, 0xFFFFFFFF
72 * r8 == 0 - msr instructions are implemented
73 * r8 != 0 - msr instructions are not implemented
76 msrclr r8, 0 /* clear nothing - just read msr for test */
86 /* Save 1 as word and load byte - 0 - BIG, 1 - LITTLE */
99 ori r3, r0, (0x10000 - 4)
126 addik r5, r4, 0 /* add new space for command line */
180 or r9, r0, r0 /* TLB0 = 0 */
[all …]
/linux-6.12.1/include/uapi/linux/
Dpersonality.h12 UNAME26 = 0x0020000,
13 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
14 FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to descriptors
17 MMAP_PAGE_ZERO = 0x0100000,
18 ADDR_COMPAT_LAYOUT = 0x0200000,
19 READ_IMPLIES_EXEC = 0x0400000,
20 ADDR_LIMIT_32BIT = 0x0800000,
21 SHORT_INODE = 0x1000000,
22 WHOLE_SECONDS = 0x2000000,
23 STICKY_TIMEOUTS = 0x4000000,
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/watchdog/
Dsnps,dw-wdt.yaml70 default: [0x0001000 0x0002000 0x0004000 0x0008000
71 0x0010000 0x0020000 0x0040000 0x0080000
72 0x0100000 0x0200000 0x0400000 0x0800000
73 0x1000000 0x2000000 0x4000000 0x8000000]
88 reg = <0xffd02000 0x1000>;
89 interrupts = <0 171 4>;
97 reg = <0xffd02000 0x1000>;
98 interrupts = <0 171 4>;
101 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
102 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/linux-6.12.1/arch/arm/boot/dts/marvell/
Dkirkwood-c200-v1.dts22 memory@0 {
24 reg = <0x00000000 0x20000000>;
29 pinctrl-0 = <&pmx_buttons>;
59 pinctrl-0 = <&pmx_poweroff>;
66 pinctrl-0 = <&pmx_leds>;
69 led-0 {
174 reg = <0x30>;
179 reg = <0x4c>;
195 partition@0 {
197 reg = <0x0000000 0x200000>;
[all …]
Darmada-370-c200-v2.dts27 reg = <0x00000000 0x40000000>; /* 1024 MB */
31 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
32 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
33 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
61 pinctrl-0 = <&pmx_beeper>;
68 pinctrl-0 = <&pmx_poweroff>;
75 pinctrl-0 = <&pmx_buttons>;
93 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
105 pinctrl-0 = <&pmx_leds1 &pmx_leds2>;
108 led-0 {
[all …]
/linux-6.12.1/sound/soc/sh/rcar/
Dsrc.c51 for ((i) = 0; \
69 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_activation()
76 rsnd_mod_write(mod, SRC_SWRSR, 0); in rsnd_src_halt()
98 return 0; in rsnd_src_convert_rate()
120 unsigned int rate = 0; in rsnd_src_get_rate()
148 0x01800000, /* 6 - 1/6 */
149 0x01000000, /* 6 - 1/4 */
150 0x00c00000, /* 6 - 1/3 */
151 0x00800000, /* 6 - 1/2 */
152 0x00600000, /* 6 - 2/3 */
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dnv50.c35 return nvkm_rd32(gr->engine.subdev.device, 0x1540); in nv50_gr_units()
48 if (ret == 0) { in nv50_gr_object_bind()
50 nvkm_wo32(*pgpuobj, 0x00, object->oclass); in nv50_gr_object_bind()
51 nvkm_wo32(*pgpuobj, 0x04, 0x00000000); in nv50_gr_object_bind()
52 nvkm_wo32(*pgpuobj, 0x08, 0x00000000); in nv50_gr_object_bind()
53 nvkm_wo32(*pgpuobj, 0x0c, 0x00000000); in nv50_gr_object_bind()
75 if (ret == 0) { in nv50_gr_chan_bind()
100 return 0; in nv50_gr_chan_new()
108 { 0x01, "STACK_UNDERFLOW" },
109 { 0x02, "STACK_MISMATCH" },
[all …]
/linux-6.12.1/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_hw.c15 #define OCM_WIN_P3P(addr) (addr & 0xffc0000)
19 #define CRB_BLK(off) ((off >> 20) & 0x3f)
20 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
21 #define CRB_WINDOW_2M (0x130060)
22 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
23 #define CRB_INDIRECT_2M (0x1e0000UL)
52 {{{0, 0, 0, 0} } }, /* 0: PCI */
53 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
54 {1, 0x0110000, 0x0120000, 0x130000},
55 {1, 0x0120000, 0x0122000, 0x124000},
[all …]
/linux-6.12.1/arch/powerpc/include/asm/
Dreg.h49 #define MSR_FE0_LG 11 /* Floating Exception mode 0 */
54 #define MSR_IP_LG 6 /* Exception prefix 0x000/0xFFF */
61 #define MSR_LE_LG 0 /* Little Endian */
75 #define MSR_SF 0
76 #define MSR_HV 0
77 #define MSR_S 0
85 #define MSR_SPE 0
99 #define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */
104 #define MSR_IP __MASK(MSR_IP_LG) /* Exception prefix 0x000/0xFFF */
116 #define MSR_TS_N 0 /* Non-transactional */
[all …]
/linux-6.12.1/drivers/net/ethernet/qlogic/netxen/
Dnetxen_nic_hw.c16 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
18 #define MS_WIN(addr) (addr & 0x0ffc0000)
22 #define CRB_BLK(off) ((off >> 20) & 0x3f)
23 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
24 #define CRB_WINDOW_2M (0x130060)
25 #define CRB_HI(off) ((crb_hub_agt[CRB_BLK(off)] << 20) | ((off) & 0xf0000))
26 #define CRB_INDIRECT_2M (0x1e0000UL)
57 {{{0, 0, 0, 0} } }, /* 0: PCI */
58 {{{1, 0x0100000, 0x0102000, 0x120000}, /* 1: PCIE */
[all …]
/linux-6.12.1/sound/pci/rme9652/
Dhdspm.c39 * :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
44 * : . : . : . : x. : HDSPM_ClockModeMaster - 1: Master, 0: Slave
46 * : . : . : . : . : 0:64, 1:128, 2:256, 3:512,
49 … . : . : . :10 . : HDSPM_Frequency1|HDSPM_Frequency0: 1=32K,2=44.1K,3=48K,0=??
57 * : . : . 10: . : . : <MADI> sync ref: 0:WC, 1:Madi, 2:TCO, 3:SyncIn
58 * : . 3 : . 10: 2 . : . : <AES32> 0:WC, 1:AES1 ... 8:AES8, 9: TCO, 10:SyncIn?
60 * : . : . : x . : . : <MADI> HDSPM_InputSelect0 : 0=optical,1=coax
86 * :1098.7654:3210.9876:5432.1098:7654.3210: 0..31
98 * :7654.3210:7654.3210:7654.3210:7654.3210: 0..31
101 * : . : . : . : . x: HDSPM_c0Master 1: Master, 0: Slave
[all …]
/linux-6.12.1/drivers/scsi/qla2xxx/
Dqla_nx.c15 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | \
16 ((addr >> 25) & 0x3ff))
17 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | \
18 ((addr >> 25) & 0x3ff))
19 #define MS_WIN(addr) (addr & 0x0ffc0000)
20 #define QLA82XX_PCI_MN_2M (0)
21 #define QLA82XX_PCI_MS_2M (0x80000)
22 #define QLA82XX_PCI_OCM0_2M (0xc0000)
23 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
25 #define BLOCK_PROTECT_BITS 0x0F
[all …]
/linux-6.12.1/drivers/scsi/qla4xxx/
Dql4_nx.c18 #define MN_WIN(addr) (((addr & 0x1fc0000) >> 1) | ((addr >> 25) & 0x3ff))
19 #define OCM_WIN(addr) (((addr & 0x1ff0000) >> 1) | ((addr >> 25) & 0x3ff))
20 #define MS_WIN(addr) (addr & 0x0ffc0000)
21 #define QLA82XX_PCI_MN_2M (0)
22 #define QLA82XX_PCI_MS_2M (0x80000)
23 #define QLA82XX_PCI_OCM0_2M (0xc0000)
24 #define VALID_OCM_ADDR(addr) (((addr) & 0x3f800) != 0x3f800)
28 #define CRB_BLK(off) ((off >> 20) & 0x3f)
29 #define CRB_SUBBLK(off) ((off >> 16) & 0xf)
30 #define CRB_WINDOW_2M (0x130060)
[all …]
/linux-6.12.1/drivers/net/ethernet/nvidia/
Dforcedeth.c66 #define DEV_NEED_TIMERIRQ 0x0000001 /* set the timer irq flag in the irq mask */
67 #define DEV_NEED_LINKTIMER 0x0000002 /* poll link settings. Relies on the timer irq */
68 #define DEV_HAS_LARGEDESC 0x0000004 /* device supports jumbo frames and needs packet form…
69 #define DEV_HAS_HIGH_DMA 0x0000008 /* device supports 64bit dma */
70 #define DEV_HAS_CHECKSUM 0x0000010 /* device supports tx and rx checksum offloads */
71 #define DEV_HAS_VLAN 0x0000020 /* device supports vlan tagging and striping */
72 #define DEV_HAS_MSI 0x0000040 /* device supports MSI */
73 #define DEV_HAS_MSI_X 0x0000080 /* device supports MSI-X */
74 #define DEV_HAS_POWER_CNTRL 0x0000100 /* device supports power savings */
75 #define DEV_HAS_STATISTICS_V1 0x0000200 /* device supports hw statistics version 1 */
[all …]