Searched +full:0 +full:x03400000 (Results 1 – 25 of 43) sorted by relevance
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/linux-6.12.1/arch/loongarch/include/asm/ |
D | alternative-asm.h | 33 .fill - (((144f-143f)-(141b-140b)) > 0) * ((144f-143f)-(141b-140b)) / 4, 4, 0x03400000 62 .fill - ((alt_max_short(new_len1, new_len2) - (old_len)) > 0) * \ 63 (alt_max_short(new_len1, new_len2) - (old_len)) / 4, 4, 0x03400000
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D | alternative.h | 40 ".fill -(((" alt_rlen(num) ")-(" alt_slen ")) > 0) * " \ 41 "((" alt_rlen(num) ")-(" alt_slen ")) / 4, 4, 0x03400000\n" 55 ".fill -((" alt_max_short(alt_rlen(num1), alt_rlen(num2)) " - (" alt_slen ")) > 0) * " \ 57 "4, 0x03400000\n" \
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D | inst.h | 13 #define INSN_NOP 0x03400000 14 #define INSN_BREAK 0x002a0000 15 #define INSN_HVCL 0x002b8000 17 #define ADDR_IMMMASK_LU52ID 0xFFF0000000000000 18 #define ADDR_IMMMASK_LU32ID 0x000FFFFF00000000 19 #define ADDR_IMMMASK_LU12IW 0x00000000FFFFF000 20 #define ADDR_IMMMASK_ORI 0x0000000000000FFF 21 #define ADDR_IMMMASK_ADDU16ID 0x00000000FFFF0000 29 #define ADDR_IMMSHIFT_ORI 0 38 break_op = 0x54, [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | layerscape-pcie-gen4.txt | 30 reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ 31 0x80 0x00000000 0x0 0x00001000>; /* configuration space */ 43 bus-range = <0x0 0xff>; 45 ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; 47 interrupt-map-mask = <0 0 0 7>; 48 interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 49 <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 50 <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 51 <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
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D | fsl,layerscape-pcie-ep.yaml | 43 physical PCIe controller index starting from '0'. This is used to get 92 reg = <0x00 0x03400000 0x0 0x00100000 93 0x80 0x00000000 0x8 0x00000000>;
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D | fsl,layerscape-pcie.yaml | 50 physical PCIe controller index starting from '0'. This is used to get 55 - description: PCIe controller index starting from '0' 160 reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ 161 <0x20 0x00000000 0x0 0x00002000>; /* configuration space */ 163 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ 169 bus-range = <0x0 0xff>; 170 ranges = <0x81000000 0x0 0x00000000 0x20 0x00010000 0x0 0x00010000 /* downstream I/O */ 171 … 0x82000000 0x0 0x40000000 0x20 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ 174 interrupt-map-mask = <0 0 0 7>; 175 interrupt-map = <0000 0 0 1 &gic 0 0 0 109 IRQ_TYPE_LEVEL_HIGH>, [all …]
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/linux-6.12.1/tools/arch/loongarch/include/asm/ |
D | inst.h | 10 #define LOONGARCH_INSN_NOP 0x03400000 13 break_op = 0x54, 17 b_op = 0x14, 18 bl_op = 0x15, 22 beqz_op = 0x10, 23 bnez_op = 0x11, 24 bceqz_op = 0x12, /* bits[9:8] = 0x00 */ 25 bcnez_op = 0x12, /* bits[9:8] = 0x01 */ 29 ertn_op = 0x1920e, 33 addid_op = 0x0b, [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | qcom,sdm670-tlmm.yaml | 57 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$" 99 reg = <0x03400000 0x300000>; 105 gpio-ranges = <&tlmm 0 0 151>;
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D | qcom,sdm845-pinctrl.yaml | 45 "-hog(-[0-9]+)?$": 66 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$" 115 reg = <0x03400000 0xc00000>; 121 gpio-ranges = <&tlmm 0 0 151>;
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D | qcom,msm8998-pinctrl.yaml | 58 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$" 122 reg = <0x03400000 0xc00000>; 124 gpio-ranges = <&tlmm 0 0 150>; 129 gpio-reserved-ranges = <0 4>, <81 4>;
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | fsl-ls2088a.dtsi | 23 cpu0: cpu@0 { 26 reg = <0x0>; 27 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 36 reg = <0x1>; 37 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 46 reg = <0x100>; 56 reg = <0x101>; 66 reg = <0x200>; 76 reg = <0x201>; 86 reg = <0x300>; [all …]
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D | fsl-ls2080a.dtsi | 23 cpu0: cpu@0 { 26 reg = <0x0>; 27 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 36 reg = <0x1>; 37 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 46 reg = <0x100>; 56 reg = <0x101>; 66 reg = <0x200>; 76 reg = <0x201>; 86 reg = <0x300>; [all …]
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D | fsl-ls1088a.dtsi | 27 #size-cells = <0>; 30 cpu0: cpu@0 { 33 reg = <0x0>; 34 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 42 reg = <0x1>; 43 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 51 reg = <0x2>; 52 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 60 reg = <0x3>; 61 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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D | fsl-ls1046a.dtsi | 38 #size-cells = <0>; 40 cpu0: cpu@0 { 43 reg = <0x0>; 44 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 53 reg = <0x1>; 54 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 63 reg = <0x2>; 64 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 73 reg = <0x3>; 74 clocks = <&clockgen QORIQ_CLK_CMUX 0>; [all …]
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D | fsl-ls1012a.dtsi | 32 #size-cells = <0>; 34 cpu0: cpu@0 { 37 reg = <0x0>; 38 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 54 arm,psci-suspend-param = <0x0>; 63 #clock-cells = <0>; 70 #clock-cells = <0>; 92 reg = <0x0 0x1401000 0 0x1000>, /* GICD */ 93 <0x0 0x1402000 0 0x2000>, /* GICC */ 94 <0x0 0x1404000 0 0x2000>, /* GICH */ [all …]
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/linux-6.12.1/arch/arm/mach-rpc/ |
D | riscpc.c | 56 #if 0 in parse_tag_acorn() 58 desc->video_start = 0x02000000; in parse_tag_acorn() 59 desc->video_end = 0x02000000 + vram_size; in parse_tag_acorn() 62 return 0; in parse_tag_acorn() 93 writeb(0xc, PCIO_BASE + (0x3f2 << 2)); in rpc_map_io() 103 DEFINE_RES_MEM(0x03400000, 0x00200000), 111 .coherent_dma_mask = 0xffffffff, 118 DEFINE_RES_MEM(0x03200000, 0x10000), 145 .mapbase = 0x03010fe0, 168 DEFINE_RES_MEM(0x030107c0, 0x20), [all …]
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | msm8992-lg-h815.dts | 26 qcom,msm-id = <0xfb 0x0>; 27 qcom,pmic-id = <0x10009 0x1000a 0x0 0x0>; 28 qcom,board-id = <0xb64 0x0>; 39 reg = <0x0 0x06000000 0x0 0x00001000>; 45 reg = <0x0 0x0ff00000 0x0 0x00100000>; 46 console-size = <0x20000>; 47 pmsg-size = <0x20000>; 48 record-size = <0x10000>; 49 ecc-size = <0x10>; 53 reg = <0x0 0x03400000 0x0 0x00c00000>; [all …]
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D | msm8992-lg-bullhead.dtsi | 26 qcom,msm-id = <251 0>, <252 0>; 27 qcom,pmic-id = <0x10009 0x1000A 0x0 0x0>; 47 reg = <0x0 0x1ff00000 0x0 0x40000>; 48 console-size = <0x10000>; 49 record-size = <0x10000>; 50 ftrace-size = <0x10000>; 51 pmsg-size = <0x20000>; 55 reg = <0 0x03400000 0 0xc00000>; 60 reg = <0x0 0x05000000 0x0 0x1a00000>; 71 pm8994_regulators: regulators-0 {
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/linux-6.12.1/Documentation/devicetree/bindings/arm/tegra/ |
D | nvidia,tegra186-pmc.yaml | 182 reg = <0x0c360000 0x10000>, 183 <0x0c370000 0x10000>, 184 <0x0c380000 0x10000>, 185 <0x0c390000 0x10000>; 202 reg = <0x03400000 0x10000>; 214 pinctrl-0 = <&sdmmc1_3v3>;
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/linux-6.12.1/arch/powerpc/boot/dts/ |
D | ac14xx.dts | 25 PowerPC,5121@0 { 33 reg = <0x00000000 0x10000000>; /* 256MB at 0 */ 41 ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */ 42 0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */ 43 0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */ 44 0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */ 45 0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */ 46 0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */ 48 flash@0,0 { 50 reg = <0 0x00000000 0x04000000>; [all …]
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/linux-6.12.1/sound/soc/codecs/ |
D | cs35l45.h | 20 #define CS35L45_DEVID 0x00000000 21 #define CS35L45_REVID 0x00000004 22 #define CS35L45_RELID 0x0000000C 23 #define CS35L45_OTPID 0x00000010 24 #define CS35L45_SFT_RESET 0x00000020 25 #define CS35L45_GLOBAL_ENABLES 0x00002014 26 #define CS35L45_BLOCK_ENABLES 0x00002018 27 #define CS35L45_BLOCK_ENABLES2 0x0000201C 28 #define CS35L45_ERROR_RELEASE 0x00002034 29 #define CS35L45_SYNC_GPIO1 0x00002430 [all …]
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/linux-6.12.1/drivers/video/fbdev/ |
D | au1200fb.c | 55 #define DEBUG 0 64 #define print_dbg(f, arg...) do {} while (0) 68 #define AU1200_LCD_FB_IOCTL 0x46FF 96 #define WIN_POSITION (1<< 0) 186 static int nohwcursor = 0; 213 { /* Index 0 */ 214 "0-FS gfx, 1-video, 2-ovly gfx, 3-ovly gfx", 215 /* mode_backcolor */ 0x006600ff, 216 /* mode_colorkey,msk*/ 0, 0, 219 /* xres, yres, xpos, ypos */ 0, 0, 0, 0, [all …]
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D | cg14.c | 51 #define CG14_MCR_INTENABLE_MASK 0x80 53 #define CG14_MCR_VIDENABLE_MASK 0x40 55 #define CG14_MCR_PIXMODE_MASK 0x30 57 #define CG14_MCR_TMR_MASK 0x0c 59 #define CG14_MCR_TMENABLE_MASK 0x02 60 #define CG14_MCR_RESET_SHIFT 0 61 #define CG14_MCR_RESET_MASK 0x01 63 #define CG14_REV_REVISION_MASK 0xf0 64 #define CG14_REV_IMPL_SHIFT 0 65 #define CG14_REV_IMPL_MASK 0x0f [all …]
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/linux-6.12.1/arch/arm/net/ |
D | bpf_jit_32.h | 12 #define ARM_R0 0 29 #define ARM_COND_EQ 0x0 /* == */ 30 #define ARM_COND_NE 0x1 /* != */ 31 #define ARM_COND_CS 0x2 /* unsigned >= */ 33 #define ARM_COND_CC 0x3 /* unsigned < */ 35 #define ARM_COND_MI 0x4 /* < 0 */ 36 #define ARM_COND_PL 0x5 /* >= 0 */ 37 #define ARM_COND_VS 0x6 /* Signed Overflow */ 38 #define ARM_COND_VC 0x7 /* No Signed Overflow */ 39 #define ARM_COND_HI 0x8 /* unsigned > */ [all …]
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/linux-6.12.1/include/sound/ |
D | cs35l41.h | 16 #define CS35L41_FIRSTREG 0x00000000 17 #define CS35L41_LASTREG 0x03804FE8 18 #define CS35L41_DEVID 0x00000000 19 #define CS35L41_REVID 0x00000004 20 #define CS35L41_FABID 0x00000008 21 #define CS35L41_RELID 0x0000000C 22 #define CS35L41_OTPID 0x00000010 23 #define CS35L41_SFT_RESET 0x00000020 24 #define CS35L41_TEST_KEY_CTL 0x00000040 25 #define CS35L41_USER_KEY_CTL 0x00000044 [all …]
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