Searched +full:0 +full:x00a34000 (Results 1 – 4 of 4) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | qcom,msm8996-camss.yaml | 96 port@0:
115 0, 1, 2, 3
323 iommus = <&vfe_smmu 0>,
331 reg = <0x00a34000 0x1000>,
332 <0x00a00030 0x4>,
333 <0x00a35000 0x1000>,
334 <0x00a00038 0x4>,
335 <0x00a36000 0x1000>,
336 <0x00a00040 0x4>,
337 <0x00a30000 0x100>,
[all …]
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| /linux-6.12.1/drivers/net/wireless/ath/ath11k/ |
| D | hal.h | 43 #define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
44 #define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000
45 #define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000
54 #define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000
56 #define HAL_CE_WFSS_CE_REG_BASE 0x01b80000
57 #define HAL_WLAON_REG_BASE 0x01f80000
60 #define HAL_TCL1_RING_CMN_CTRL_REG 0x00000014
61 #define HAL_TCL1_RING_DSCP_TID_MAP 0x0000002c
105 #define HAL_TCL1_RING_HP 0x00002000
106 #define HAL_TCL1_RING_TP 0x00002004
[all …]
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| /linux-6.12.1/drivers/net/wireless/ath/ath12k/ |
| D | hal.h | 36 #define HAL_SHADOW_BASE_ADDR 0x000008fc
44 #define HAL_SEQ_WCSS_UMAC_OFFSET 0x00a00000
45 #define HAL_SEQ_WCSS_UMAC_REO_REG 0x00a38000
46 #define HAL_SEQ_WCSS_UMAC_TCL_REG 0x00a44000
47 #define HAL_SEQ_WCSS_UMAC_CE0_SRC_REG 0x01b80000
48 #define HAL_SEQ_WCSS_UMAC_CE0_DST_REG 0x01b81000
49 #define HAL_SEQ_WCSS_UMAC_CE1_SRC_REG 0x01b82000
50 #define HAL_SEQ_WCSS_UMAC_CE1_DST_REG 0x01b83000
51 #define HAL_SEQ_WCSS_UMAC_WBM_REG 0x00a34000
53 #define HAL_CE_WFSS_CE_REG_BASE 0x01b80000
[all …]
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| /linux-6.12.1/arch/arm64/boot/dts/qcom/ |
| D | msm8996.dtsi | 29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
53 clocks = <&kryocc 0>;
68 reg = <0x0 0x1>;
72 clocks = <&kryocc 0>;
82 reg = <0x0 0x100>;
101 reg = <0x0 0x101>;
[all …]
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