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/linux-6.12.1/drivers/pinctrl/tegra/
Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
22 #define TEGRA_PIN_PEX_L0_RST_N_PA0 _GPIO(0)
27 #define TEGRA_PIN_SATA_LED_ACTIVE_PA5 _GPIO(5)
177 /* All non-GPIO pins follow */
181 /* Non-GPIO pins */
182 #define TEGRA_PIN_CORE_PWR_REQ _PIN(0)
187 #define TEGRA_PIN_BATT_BCL _PIN(5)
1266 #define DRV_PINGROUP_REG_A 0x8d4 /* bank 0 */
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
[all …]
/linux-6.12.1/Documentation/i2c/
Di2c_bus.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
3 <!-- Updated to inclusive terminology by Wolfram Sang -->
8 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
11 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
14 inkscape:version="0.92.3 (2405546, 2018-03-11)"
17 viewBox="0 0 813.34215 261.01596"
25 refY="0"
26 refX="0"
31 inkscape:connector-curvature="0"
[all …]
/linux-6.12.1/arch/m68k/lib/
Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
18 * A: At some points, the sum (%0) was used as
19 * length-counter instead of the length counter
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
53 "addw %2@+,%0\n\t" /* add first word to sum */ in csum_partial()
55 "addxl %3,%0\n" /* add X bit */ in csum_partial()
59 "lsrl #5,%1\n\t" /* len/32 */ in csum_partial()
64 "addxl %4,%0\n\t" in csum_partial()
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt7601u/
Dinitvals_phy.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * (c) Copyright 2002-2010, Ralink Technology, Inc.
14 /* Bank 0 - for central blocks: BG, PLL, XTAL, LO, ADC/DAC */
15 RF_REG_PAIR(0, 0, 0x02),
16 RF_REG_PAIR(0, 1, 0x01),
17 RF_REG_PAIR(0, 2, 0x11),
18 RF_REG_PAIR(0, 3, 0xff),
19 RF_REG_PAIR(0, 4, 0x0a),
20 RF_REG_PAIR(0, 5, 0x20),
21 RF_REG_PAIR(0, 6, 0x00),
[all …]
/linux-6.12.1/arch/mips/include/uapi/asm/
Dinst.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
69 clz_op = 0x20, clo_op,
70 dclz_op = 0x24, dclo_op,
71 sdbpp_op = 0x3f
80 yield_op = 0x09, lx_op = 0x0a,
81 lwle_op = 0x19, lwre_op = 0x1a,
82 cachee_op = 0x1b, sbe_op = 0x1c,
83 she_op = 0x1d, sce_op = 0x1e,
84 swe_op = 0x1f, bshfl_op = 0x20,
85 swle_op = 0x21, swre_op = 0x22,
[all …]
/linux-6.12.1/arch/powerpc/lib/
Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
114 3: or 5,5,5
120 ALT_FTR_SECTION_END(0, 1)
128 3: or 5,5,5
139 or 5,5,5
140 2: PPC_LCMPI r3,0
152 ALT_FTR_SECTION_END(0, 1)
[all …]
/linux-6.12.1/drivers/net/wireless/ath/ath9k/
Dar9003_aic.c18 #include "hw-ops.h"
25 0, 3, 9, 15, 21, 27
37 5, 5, 4, 4, 3
42 struct ath9k_hw_mci *mci_hw = &ah->btcoex_hw.mci; in ar9003_hw_is_aic_enabled()
46 * HW code and the driver-layer support ready. in ar9003_hw_is_aic_enabled()
50 if (mci_hw->config & ATH_MCI_CONFIG_DISABLE_AIC) in ar9003_hw_is_aic_enabled()
67 for (i = index - 1; i >= 0; i--) { in ar9003_aic_find_valid()
73 if ((i >= ATH_AIC_MAX_BT_CHANNEL) || (i < 0)) in ar9003_aic_find_valid()
74 i = -1; in ar9003_aic_find_valid()
80 * type 0: aic_lin_table, 1: com_att_db_table
[all …]
/linux-6.12.1/arch/powerpc/crypto/
Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
16 # clamp r &= 0x0FFFFFFC0FFFFFFC 0x0FFFFFFC0FFFFFFF
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
35 # vs5 = [r1*5,...]
36 # vs6 = [r2*5,...]
[all …]
/linux-6.12.1/drivers/misc/cardreader/
Drts5261.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
14 #define rts5261_vendor_setting_valid(reg) ((reg) & 0x010000)
16 (((~(reg) >> 28) & 0x02) | (((reg) >> 28) & 0x01))
17 #define rts5261_reg_check_reverse_socket(reg) ((reg) & 0x04)
18 #define rts5261_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 22) & 0x03)
19 #define rts5261_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 16) & 0x03)
20 #define rts5261_reg_to_rtd3(reg) ((reg) & 0x08)
21 #define rts5261_reg_check_mmc_support(reg) ((reg) & 0x10)
[all …]
Drts5264.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Driver for Realtek PCI-Express card reader
4 * Copyright(c) 2018-2019 Realtek Semiconductor Corp. All rights reserved.
13 #define rts5264_vendor_setting_valid(reg) ((reg) & 0x010000)
15 (((~(reg) >> 28) & 0x02) | (((reg) >> 28) & 0x01))
16 #define rts5264_reg_check_reverse_socket(reg) ((reg) & 0x04)
17 #define rts5264_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 22) & 0x03)
18 #define rts5264_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 16) & 0x03)
19 #define rts5264_reg_to_rtd3(reg) ((reg) & 0x08)
21 #define RTS5264_AUTOLOAD_CFG0 0xFF7B
[all …]
/linux-6.12.1/include/dt-bindings/pinctrl/
Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
10 #define IMX8DXL_PCIE_CTRL0_PERST_B 0
15 #define IMX8DXL_USB_SS3_TC1 5
148 … IMX8DXL_PCIE_CTRL0_PERST_B_HSIO_PCIE0_PERST_B IMX8DXL_PCIE_CTRL0_PERST_B 0
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
151 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_HSIO_PCIE0_CLKREQ_B IMX8DXL_PCIE_CTRL0_CLKREQ_B 0
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
154 … IMX8DXL_PCIE_CTRL0_WAKE_B_HSIO_PCIE0_WAKE_B IMX8DXL_PCIE_CTRL0_WAKE_B 0
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
157 … IMX8DXL_USB_SS3_TC0_ADMA_I2C1_SCL IMX8DXL_USB_SS3_TC0 0
[all …]
/linux-6.12.1/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
58 4 allows tracking up to 5 fingers.
69 (TouchPadOff=0) will also disable the buttons associated with the touchpad.
99 By echoing "0" to this file all debugging will be turned OFF.
113 By echoing "0" to this file parity checking will be turned OFF. Any
114 non-zero value will turn it ON. For hardware version 1 the default is ON.
128 Sets crc_enabled to 0/1. The name "crc_enabled" is the official name of
138 "0" or "1" to this file will set the state to "0" or "1".
[all …]
/linux-6.12.1/Documentation/userspace-api/media/v4l/
Dconstraints.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later -->
3 …-rule="evenodd" stroke-linejoin="round" stroke-width="28.222" preserveAspectRatio="xMidYMid" versi…
4 …-.4 0 0 -.4 -4 0)" d="m0 0 5-5-17.5 5 17.5 5-5-5z" fill="#f00" fill-rule="evenodd" stroke="#f00" s…
5 …-.4 0 0 -.4 -4 0)" d="m0 0 5-5-17.5 5 17.5 5-5-5z" fill="#000080" fill-rule="evenodd" stroke="#000…
6 …-12400v-14200h24800v14200h-12400z" fill="#fff"/><path id="path211" d="m13800 17500h-12400v-14200h2…
7 …-9e3v-1e4h18000v1e4h-9e3z" fill="#fff"/><path id="path230" d="m12050 12250h-9e3v-1e4h18000v1e4h-9e…
8 …-1350,-3250)"><g id="id8"><rect id="rect245" class="BoundingBox" x="7050" y="7950" width="7901" he…
9 …-7e3" fill="none" marker-end="url(#Arrow2Mend)" stroke="#000080" stroke-linejoin="round" stroke-wi…
10 …-end="url(#marker5469)" stroke="#000080" stroke-linejoin="round" stroke-width="100"/><rect id="rec…
[all …]
/linux-6.12.1/arch/alpha/lib/
Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
43 .frame $30,0,$26,0
44 .prologue 0
[all …]
/linux-6.12.1/drivers/net/ipa/
Dipa_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2024 Linaro Ltd.
18 * IPA registers are located within the "ipa-reg" address space defined by
35 * (for parameterized registers) a non-zero stride value. Not all versions
48 * reg_decode(). In addition, for single-bit fields, reg_bit()
53 /* enum ipa_reg_id - IPA register IDs */
62 FILT_ROUT_HASH_FLUSH, /* Not IPA v4.2 nor IPA v5.0+ */
63 FILT_ROUT_CACHE_FLUSH, /* IPA v5.0+ */
65 IPA_BCR, /* Not IPA v4.5+ */
[all …]
/linux-6.12.1/arch/arm/mach-rpc/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
12 #define STAT 0x00
13 #define REQ 0x04
14 #define CLR 0x04
15 #define MASK 0x08
18 0, 8, 9, 8,10,10,10,10,11,11,11,11,10,10,10,10,
37 0,16,17,16,18,16,17,16,19,16,17,16,18,16,17,16,
56 0, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
57 4, 0, 1, 0, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3,
58 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
[all …]
/linux-6.12.1/drivers/edac/
Dpnd2_edac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
17 #define b_cr_touud_lo_pci_port 0x4c
18 #define b_cr_touud_lo_pci_offset 0xa8
19 #define b_cr_touud_lo_pci_r_opcode 0x04
26 #define b_cr_touud_hi_pci_port 0x4c
27 #define b_cr_touud_hi_pci_offset 0xac
28 #define b_cr_touud_hi_pci_r_opcode 0x04
36 #define b_cr_tolud_pci_port 0x4c
37 #define b_cr_tolud_pci_offset 0xbc
38 #define b_cr_tolud_pci_r_opcode 0x04
[all …]
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
39 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
40 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
41 { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
42 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
44 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
46 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
47 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/alderlake/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
7 "EventCode": "0xb0",
10 "UMask": "0x9",
15 "Counter": "0,1,2,3,4,5,6,7",
17 "EventCode": "0xb0",
19 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
21 "UMask": "0x9",
26 "Counter": "0,1,2,3,4,5,6,7",
29 "EventCode": "0xb0",
32 "UMask": "0x1",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/meteorlake/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
6 "EventCode": "0xcd",
9 "UMask": "0x3",
14 "Counter": "0,1,2,3,4,5,6,7",
16 "EventCode": "0xb0",
18 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
20 "UMask": "0x9",
25 "Counter": "0,1,2,3,4,5,6,7",
27 "EventCode": "0xb0",
30 "UMask": "0x8",
[all …]
/linux-6.12.1/sound/soc/codecs/
Dwm8741.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm8741.h -- WM8423 ASoC driver
18 #define WM8741_DACLLSB_ATTENUATION 0x00
19 #define WM8741_DACLMSB_ATTENUATION 0x01
20 #define WM8741_DACRLSB_ATTENUATION 0x02
21 #define WM8741_DACRMSB_ATTENUATION 0x03
22 #define WM8741_VOLUME_CONTROL 0x04
23 #define WM8741_FORMAT_CONTROL 0x05
24 #define WM8741_FILTER_CONTROL 0x06
25 #define WM8741_MODE_CONTROL_1 0x07
[all …]
Dab8500-codec.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) ST-Ericsson SA 2012
8 * for ST-Ericsson.
13 * for ST-Ericsson.
24 #define AB8500_AD_DATA0_OFFSET 0
29 /* AB8500 audio bank (0x0d) register definitions */
31 #define AB8500_POWERUP 0x00
32 #define AB8500_AUDSWRESET 0x01
33 #define AB8500_ADPATHENA 0x02
34 #define AB8500_DAPATHENA 0x03
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/graniterapids/
Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
6 "EventCode": "0xb0",
8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
10 "UMask": "0x9"
14 "Counter": "0,1,2,3,4,5,6,7",
16 "EventCode": "0xb0",
19 "UMask": "0x8"
23 "Counter": "0,1,2,3,4,5,6,7",
24 "EventCode": "0xc1",
28 "UMask": "0x1b"
[all …]

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