Lines Matching +full:0 +full:- +full:5
1 /* SPDX-License-Identifier: GPL-2.0 */
3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2024 Linaro Ltd.
18 * IPA registers are located within the "ipa-reg" address space defined by
35 * (for parameterized registers) a non-zero stride value. Not all versions
48 * reg_decode(). In addition, for single-bit fields, reg_bit()
53 /* enum ipa_reg_id - IPA register IDs */
62 FILT_ROUT_HASH_FLUSH, /* Not IPA v4.2 nor IPA v5.0+ */
63 FILT_ROUT_CACHE_FLUSH, /* IPA v5.0+ */
65 IPA_BCR, /* Not IPA v4.5+ */
68 COUNTER_CFG, /* Not IPA v4.5+ */
69 IPA_TX_CFG, /* IPA v3.5+ */
70 FLAVOR_0, /* IPA v3.5+ */
71 IDLE_INDICATION_CFG, /* IPA v3.5+ */
72 QTIME_TIMESTAMP_CFG, /* IPA v4.5+ */
73 TIMERS_XO_CLK_DIV_CFG, /* IPA v4.5+ */
74 TIMERS_PULSE_GRAN_CFG, /* IPA v4.5+ */
77 SRC_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
78 SRC_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+; IPA v5.0 */
81 DST_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+; IPA v4.5, IPA v5.0 */
82 DST_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+; IPA v5.0 */
83 ENDP_INIT_CTRL, /* Not IPA v4.2+ for TX, not IPA v4.0+ for RX */
98 ENDP_FILTER_CACHE_CFG, /* IPA v5.0+ */
99 ENDP_ROUTER_CACHE_CFG, /* IPA v5.0+ */
113 COMP_CFG_ENABLE, /* Not IPA v4.0+ */
118 IPA_DCMP_FAST_CLK_EN, /* Not IPA v4.5+ */
119 IPA_QMB_SELECT_CONS_EN, /* IPA v4.0+ */
120 IPA_QMB_SELECT_PROD_EN, /* IPA v4.0+ */
121 GSI_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
122 GSI_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
123 GEN_QMB_0_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
124 GEN_QMB_1_MULTI_INORDER_RD_DIS, /* IPA v4.0+ */
125 GEN_QMB_0_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
126 GEN_QMB_1_MULTI_INORDER_WR_DIS, /* IPA v4.0+ */
127 GEN_QMB_0_SNOC_CNOC_LOOP_PROT_DIS, /* IPA v4.0+ */
128 GSI_SNOC_CNOC_LOOP_PROT_DISABLE, /* IPA v4.0+ */
129 GSI_MULTI_AXI_MASTERS_DIS, /* IPA v4.0+ */
130 IPA_QMB_SELECT_GLOBAL_EN, /* IPA v4.0+ */
136 ATOMIC_FETCHER_ARB_LOCK_DIS, /* IPA v4.0+ */
137 FULL_FLUSH_WAIT_RS_CLOSURE_EN, /* IPA v4.5+ */
159 CLKON_DCMP, /* IPA v4.5+ */
160 NTF_TX_CMDQS, /* IPA v3.5+ */
161 CLKON_TX_0, /* IPA v3.5+ */
162 CLKON_TX_1, /* IPA v3.5+ */
164 QSB2AXI_CMDQ_L, /* IPA v4.0+ */
165 AGGR_WRAPPER, /* IPA v4.0+ */
166 RAM_SLAVEWAY, /* IPA v4.0+ */
167 CLKON_QMB, /* IPA v4.0+ */
168 WEIGHT_ARB, /* IPA v4.0+ */
169 GSI_IF, /* IPA v4.0+ */
170 CLKON_GLOBAL, /* IPA v4.0+ */
171 GLOBAL_2X_CLK, /* IPA v4.0+ */
172 DPL_FIFO, /* IPA v4.5+ */
202 GEN_QMB_0_MAX_READS_BEATS, /* IPA v4.0+ */
203 GEN_QMB_1_MAX_READS_BEATS, /* IPA v4.0+ */
222 BCR_CMDQ_L_LACK_ONE_ENTRY = 0x0, /* Not IPA v4.2+ */
223 BCR_TX_NOT_USING_BRESP = 0x1, /* Not IPA v4.2+ */
224 BCR_TX_SUSPEND_IRQ_ASSERT_ONCE = 0x2, /* Not IPA v4.0+ */
225 BCR_SUSPEND_L2_IRQ = 0x3, /* Not IPA v4.2+ */
226 BCR_HOLB_DROP_L2_IRQ = 0x4, /* Not IPA v4.2+ */
227 BCR_DUAL_TX = 0x5, /* IPA v3.5+ */
228 BCR_ENABLE_FILTER_DATA_CACHE = 0x6, /* IPA v3.5+ */
229 BCR_NOTIF_PRIORITY_OVER_ZLT = 0x7, /* IPA v3.5+ */
230 BCR_FILTER_PREFETCH_EN = 0x8, /* IPA v3.5+ */
231 BCR_ROUTER_PREFETCH_EN = 0x9, /* IPA v3.5+ */
241 EOT_COAL_GRANULARITY, /* Not IPA v3.5+ */
247 TX0_PREFETCH_DISABLE, /* Not IPA v4.0+ */
248 TX1_PREFETCH_DISABLE, /* Not IPA v4.0+ */
249 PREFETCH_ALMOST_EMPTY_SIZE, /* Not IPA v4.0+ */
250 PREFETCH_ALMOST_EMPTY_SIZE_TX0, /* IPA v4.0+ */
251 DMAW_SCND_OUTSD_PRED_THRESHOLD, /* IPA v4.0+ */
252 DMAW_SCND_OUTSD_PRED_EN, /* IPA v4.0+ */
253 DMAW_MAX_BEATS_256_DIS, /* IPA v4.0+ */
254 PA_MASK_EN, /* IPA v4.0+ */
255 PREFETCH_ALMOST_EMPTY_SIZE_TX1, /* IPA v4.0+ */
256 DUAL_TX_ENABLE, /* IPA v4.5+ */
257 SSPND_PA_NO_START_STATE, /* IPA v4,2+, not IPA v4.5 */
259 HOLB_STICKY_DROP_EN, /* IPA v5.0+ */
278 DPL_TIMESTAMP_LSB, /* Not IPA v5.5+ */
279 DPL_TIMESTAMP_SEL, /* Not IPA v5.5+ */
300 IPA_GRAN_10_US = 0x0,
301 IPA_GRAN_20_US = 0x1,
302 IPA_GRAN_50_US = 0x2,
303 IPA_GRAN_100_US = 0x3,
304 IPA_GRAN_1_MS = 0x4,
305 IPA_GRAN_10_MS = 0x5,
306 IPA_GRAN_100_MS = 0x6,
307 IPA_GRAN_655350_US = 0x7,
320 ENDP_SUSPEND, /* Not IPA v4.0+ */
330 PIPE_REPLICATE_EN, /* IPA v5.5+ */
333 /** enum ipa_cs_offload_en - ENDP_INIT_CFG register CS_OFFLOAD_EN field value */
335 IPA_CS_OFFLOAD_NONE = 0x0,
336 IPA_CS_OFFLOAD_UL /* TX */ = 0x1, /* Not IPA v4.5+ */
337 IPA_CS_OFFLOAD_DL /* RX */ = 0x2, /* Not IPA v4.5+ */
338 IPA_CS_OFFLOAD_INLINE /* TX and RX */ = 0x1, /* IPA v4.5+ */
346 /** enum ipa_nat_type - ENDP_INIT_NAT register NAT_EN field value */
348 IPA_NAT_TYPE_BYPASS = 0,
363 HDR_METADATA_REG_VALID, /* Not IPA v4.5+ */
364 HDR_LEN_MSB, /* IPA v4.5+ */
365 HDR_OFST_METADATA_MSB, /* IPA v4.5+ */
376 HDR_TOTAL_LEN_OR_PAD_OFFSET_MSB, /* IPA v4.5+ */
377 HDR_OFST_PKT_SIZE_MSB, /* IPA v4.5+ */
378 HDR_ADDITIONAL_CONST_LEN_MSB, /* IPA v4.5+ */
379 HDR_BYTES_TO_REMOVE_VALID, /* IPA v5.0+ */
380 HDR_BYTES_TO_REMOVE, /* IPA v5.0+ */
386 DCPH_ENABLE, /* IPA v4.5+ */
389 PIPE_REPLICATION_EN, /* Not IPA v5.5+ */
391 HDR_FTCH_DISABLE, /* IPA v4.5+ */
395 /** enum ipa_mode - ENDP_INIT_MODE register MODE field value */
397 IPA_BASIC = 0x0,
398 IPA_ENABLE_FRAMING_HDLC = 0x1,
399 IPA_ENABLE_DEFRAMING_HDLC = 0x2,
400 IPA_DMA = 0x3,
414 AGGR_COAL_L2, /* IPA v5.5+ */
417 /** enum ipa_aggr_en - ENDP_INIT_AGGR register AGGR_EN field value */
419 IPA_BYPASS_AGGR /* TX and RX */ = 0x0,
420 IPA_ENABLE_AGGR /* RX */ = 0x1,
421 IPA_ENABLE_DEAGGR /* TX */ = 0x2,
424 /** enum ipa_aggr_type - ENDP_INIT_AGGR register AGGR_TYPE field value */
426 IPA_MBIM_16 = 0x0,
427 IPA_HDLC = 0x1,
428 IPA_TLP = 0x2,
429 IPA_RNDIS = 0x3,
430 IPA_GENERIC = 0x4,
431 IPA_COALESCE = 0x5,
432 IPA_QCMAP = 0x6,
442 TIMER_BASE_VALUE, /* Not IPA v4.5+ */
444 TIMER_LIMIT, /* IPA v4.5+ */
445 TIMER_GRAN_SEL, /* IPA v4.5+ */
466 SEQ_REP_TYPE, /* Not IPA v4.5+ */
470 * enum ipa_seq_type - HPS and DPS sequencer type
479 * The low-order byte of the sequencer type register defines the number of
488 IPA_SEQ_DMA = 0x00,
489 IPA_SEQ_1_PASS = 0x02,
490 IPA_SEQ_2_PASS_SKIP_LAST_UC = 0x04,
491 IPA_SEQ_1_PASS_SKIP_LAST_UC = 0x06,
492 IPA_SEQ_2_PASS = 0x0a,
493 IPA_SEQ_3_PASS_SKIP_LAST_UC = 0x0c,
495 IPA_SEQ_DECIPHER = 0x11,
499 * enum ipa_seq_rep_type - replicated packet sequencer type
508 IPA_SEQ_REP_DMA_PARSER = 0x08,
515 STATUS_LOCATION, /* Not IPA v4.5+ */
516 STATUS_PKT_SUPPRESS, /* IPA v4.0+ */
553 * enum ipa_irq_id - Bit positions representing type of IPA IRQ
592 IPA_IRQ_BAD_SNOC_ACCESS = 0x0, /* Not IPA v5.5+ */
593 IPA_IRQ_EOT_COAL = 0x1, /* Not IPA v3.5+ */
594 IPA_IRQ_UC_0 = 0x2,
595 IPA_IRQ_UC_1 = 0x3,
596 IPA_IRQ_UC_2 = 0x4,
597 IPA_IRQ_UC_3 = 0x5,
598 IPA_IRQ_UC_IN_Q_NOT_EMPTY = 0x6,
599 IPA_IRQ_UC_RX_CMD_Q_NOT_FULL = 0x7,
600 IPA_IRQ_PROC_UC_ACK_Q_NOT_EMPTY = 0x8,
601 IPA_IRQ_RX_ERR = 0x9, /* Not IPA v5.5+ */
602 IPA_IRQ_DEAGGR_ERR = 0xa, /* Not IPA v5.5+ */
603 IPA_IRQ_TX_ERR = 0xb, /* Not IPA v5.5+ */
604 IPA_IRQ_STEP_MODE = 0xc, /* Not IPA v5.5+ */
605 IPA_IRQ_PROC_ERR = 0xd, /* Not IPA v5.5+ */
606 IPA_IRQ_TX_SUSPEND = 0xe,
607 IPA_IRQ_TX_HOLB_DROP = 0xf,
608 IPA_IRQ_BAM_GSI_IDLE = 0x10,
609 IPA_IRQ_PIPE_YELLOW_BELOW = 0x11,
610 IPA_IRQ_PIPE_RED_BELOW = 0x12,
611 IPA_IRQ_PIPE_YELLOW_ABOVE = 0x13,
612 IPA_IRQ_PIPE_RED_ABOVE = 0x14,
613 IPA_IRQ_UCP = 0x15,
614 IPA_IRQ_DCMP = 0x16, /* Not IPA v4.5+ */
615 IPA_IRQ_GSI_EE = 0x17,
616 IPA_IRQ_GSI_IPA_IF_TLV_RCVD = 0x18,
617 IPA_IRQ_GSI_UC = 0x19,
618 IPA_IRQ_TLV_LEN_MIN_DSM = 0x1a, /* IPA v4.5-v5.2 */
619 IPA_IRQ_DRBIP_PKT_EXCEED_MAX_SIZE_EN = 0x1b, /* IPA v4.9-v5.2 */
620 IPA_IRQ_DRBIP_DATA_SCTR_CFG_ERROR_EN = 0x1c, /* IPA v4.9-v5.2 */
621 IPA_IRQ_DRBIP_IMM_CMD_NO_FLSH_HZRD_EN = 0x1d, /* IPA v4.9-v5.2 */
622 IPA_IRQ_ERROR_NON_FATAL = 0x1e, /* IPA v5.5+ */
623 IPA_IRQ_ERROR_FATAL = 0x1f, /* IPA v5.5+ */