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/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhip06.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip06-d03";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
Dhip07.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 compatible = "hisilicon,hip07-d05";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <1>;
23 #size-cells = <0>;
25 cpu-map {
[all …]
/linux-6.12.1/drivers/staging/media/atomisp/pci/
Dsh_css_params.c1 // SPDX-License-Identifier: GPL-2.0
59 #include "anr/anr_1.0/ia_css_anr.host.h"
60 #include "cnr/cnr_1.0/ia_css_cnr.host.h"
61 #include "csc/csc_1.0/ia_css_csc.host.h"
62 #include "de/de_1.0/ia_css_de.host.h"
63 #include "dp/dp_1.0/ia_css_dp.host.h"
64 #include "bnr/bnr_1.0/ia_css_bnr.host.h"
65 #include "dvs/dvs_1.0/ia_css_dvs.host.h"
66 #include "fpn/fpn_1.0/ia_css_fpn.host.h"
67 #include "gc/gc_1.0/ia_css_gc.host.h"
[all …]
/linux-6.12.1/drivers/media/usb/gspca/
Dsn9c2028.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 unsigned char to_read; /* length to read. 0 means no reply requested */
44 .sizeimage = 640 * 480 * 3 / 4,
46 .priv = 0},
53 .sizeimage = 352 * 288 * 3 / 4,
55 .priv = 0},
58 /* the bytes to write are in gspca_dev->usb_buf */
64 command[0], command[1], command[2], in sn9c2028_command()
65 command[3], command[4], command[5]); in sn9c2028_command()
67 memcpy(gspca_dev->usb_buf, command, 6); in sn9c2028_command()
[all …]
/linux-6.12.1/include/sound/
Dump_msg.h1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /* MIDI 1.0 / 2.0 Status Code (4bit) */
10 UMP_MSG_STATUS_PER_NOTE_RCC = 0x0,
11 UMP_MSG_STATUS_PER_NOTE_ACC = 0x1,
12 UMP_MSG_STATUS_RPN = 0x2,
13 UMP_MSG_STATUS_NRPN = 0x3,
14 UMP_MSG_STATUS_RELATIVE_RPN = 0x4,
15 UMP_MSG_STATUS_RELATIVE_NRPN = 0x5,
16 UMP_MSG_STATUS_PER_NOTE_PITCH_BEND = 0x6,
17 UMP_MSG_STATUS_NOTE_OFF = 0x8,
[all …]
/linux-6.12.1/drivers/ata/pata_parport/
Dkbic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * (c) 1997-1998 Grant R. Guenther <grant@torque.net>
5 * This is a low-level driver for the KBIC-951A and KBIC-971A
23 #define r12w() (delay_p, inw(pi->port + 1) & 0xffff)
25 #define j44(a, b) ((((a >> 4) & 0x0f) | (b & 0xf0)) ^ 0x88)
26 #define j53(w) (((w >> 3) & 0x1f) | ((w >> 4) & 0xe0))
30 * cont = 0 - access the IDE register file
31 * cont = 1 - access the IDE command set
33 static int cont_map[2] = { 0x80, 0x40 };
41 switch (pi->mode) { in kbic_read_regr()
[all …]
/linux-6.12.1/arch/arc/include/asm/
Duaccess.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 * -__clear_user( ) called multiple times during elf load was byte loop
10 * -Hand crafted constant propagation for "constant" copy sizes
11 * -stock kernel shrunk by 33K at -O3
14 * -Added option to (UN)inline copy_(to|from)_user to reduce code sz
15 * -kernel shrunk by 200K even at -O3 (gcc 4.2.1)
16 * -Enabled when doing -Os
30 long __ret = 0; /* success by default */ \
34 case 4: __arc_get_user_one(*(k), u, "ld", __ret); break; \
[all …]
/linux-6.12.1/arch/arm64/boot/dts/altera/
Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
[all …]
/linux-6.12.1/arch/arm64/crypto/
Dchacha-neon-core.S4 * Copyright (C) 2016-2018 Linaro, Ltd. <ard.biesheuvel@linaro.org>
11 * ChaCha20 256-bit cipher algorithm, RFC7539, x64 SSSE3 functions
29 * chacha_permute - permute one block
31 * Permute one 64-byte block where the state matrix is stored in the four NEON
32 * registers v0-v3. It performs matrix operations on four words in parallel,
42 ld1 {v12.4s}, [x10]
46 add v0.4s, v0.4s, v1.4s
51 add v2.4s, v2.4s, v3.4s
53 shl v1.4s, v4.4s, #12
54 sri v1.4s, v4.4s, #20
[all …]
Dsha2-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sha2-ce-core.S - core SHA-224/SHA-256 transform using v8 Crypto Extensions
12 .arch armv8-a+crypto
32 add t1.4s, v\s0\().4s, \rc\().4s
33 sha256h dg0q, dg1q, t0.4s
34 sha256h2 dg1q, dg2q, t0.4s
37 add t0.4s, v\s0\().4s, \rc\().4s
39 sha256h dg0q, dg1q, t1.4s
40 sha256h2 dg1q, dg2q, t1.4s
45 sha256su0 v\s0\().4s, v\s1\().4s
[all …]
/linux-6.12.1/sound/soc/codecs/
Drt1318.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt1318.h -- Platform data for RT1318
36 #define RT1318_PLL_N_MAX 0x1ff
37 #define RT1318_PLL_K_MAX 0x1f
38 #define RT1318_PLL_M_MAX 0x1f
47 #define RT1318_CLK1 0xc001
48 #define RT1318_CLK2 0xc003
49 #define RT1318_CLK3 0xc004
50 #define RT1318_CLK4 0xc005
51 #define RT1318_CLK5 0xc006
[all …]
Dpcm512x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #define PCM512x_VIRT_BASE 0x100
16 #define PCM512x_PAGE_LEN 0x100
19 #define PCM512x_PAGE 0
21 #define PCM512x_RESET (PCM512x_PAGE_BASE(0) + 1)
22 #define PCM512x_POWER (PCM512x_PAGE_BASE(0) + 2)
23 #define PCM512x_MUTE (PCM512x_PAGE_BASE(0) + 3)
24 #define PCM512x_PLL_EN (PCM512x_PAGE_BASE(0) + 4)
25 #define PCM512x_SPI_MISO_FUNCTION (PCM512x_PAGE_BASE(0) + 6)
26 #define PCM512x_DSP (PCM512x_PAGE_BASE(0) + 7)
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-j721e-evm-gesi-exp-board.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
8 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/net/ti-dp83867.h>
17 #include "k3-pinctrl.h"
21 ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
22 ethernet2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2";
23 ethernet3 = "/bus@100000/ethernet@c000000/ethernet-ports/port@3";
24 ethernet4 = "/bus@100000/ethernet@c000000/ethernet-ports/port@4";
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/
Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
19 #define MC_FW_STATE_BOOTING (4)
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
36 #define MC_SMEM_P0_DOORBELL_OFST 0x000
37 #define MC_SMEM_P1_DOORBELL_OFST 0x004
38 /* The rest of these are firmware-defined */
39 #define MC_SMEM_P0_PDU_OFST 0x008
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/
Dsamsung-sxgbe.txt4 - compatible: Should be "samsung,sxgbe-v2.0a"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the SXGBE interrupts
9 index 0 - this is fixed common interrupt of SXGBE and it is always
11 index 1 to 25 - 8 variable transmit interrupts, variable 16 receive interrupts
13 - phy-mode: String, operation mode of the PHY interface.
15 - samsung,pbl: Integer, Programmable Burst Length.
16 Supported values are 1, 2, 4, 8, 16, or 32.
17 - samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
19 Allowable range is 0x01-0x3F. When this field is set fixed burst is enabled.
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/arm64/freescale/imx95/sys/
Dmetrics.json5 …ask\\=0x000\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x0…
13 "MetricExpr": "( imx9_ddr0@eddrtq_pm_rd_beat_filt0\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
14 "ScaleUnit": "9.765625e-4KB",
21 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x000\\,axi_id\\=0x000@ ) * 32",
22 "ScaleUnit": "9.765625e-4KB",
29 …_pm_rd_beat_filt0\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ + imx9_ddr0@eddrtq_pm_rd_beat_filt1\\,axi_m…
30 "ScaleUnit": "9.765625e-4KB",
37 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fc\\,axi_id\\=0x000@ ) * 32",
38 "ScaleUnit": "9.765625e-4KB",
45 "MetricExpr": "( imx9_ddr0@eddrtq_pm_wr_beat_filt\\,axi_mask\\=0x3fe\\,axi_id\\=0x004@ ) * 32",
[all …]
/linux-6.12.1/drivers/net/ethernet/sfc/siena/
Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
19 #define MC_FW_STATE_BOOTING (4)
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
36 #define MC_SMEM_P0_DOORBELL_OFST 0x000
37 #define MC_SMEM_P1_DOORBELL_OFST 0x004
38 /* The rest of these are firmware-defined */
39 #define MC_SMEM_P0_PDU_OFST 0x008
[all …]
/linux-6.12.1/drivers/video/fbdev/riva/
Driva_tbl.h3 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
7 |* hereby granted a nonexclusive, royalty-free copyright license to *|
10 |* Any use of this source code must include, in the user documenta- *|
14 |* Copyright 1993-1999 NVIDIA, Corporation. All rights reserved. *|
18 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
20 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
22 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
23 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
32 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
34 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
[all …]
/linux-6.12.1/drivers/video/fbdev/nvidia/
Dnv_hw.c3 |* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
7 |* hereby granted a nonexclusive, royalty-free copyright license to *|
10 |* Any use of this source code must include, in the user documenta- *|
14 |* Copyright 1993-2003 NVIDIA, Corporation. All rights reserved. *|
18 |* WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NVIDIA, CORPOR- *|
20 |* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGE- *|
22 |* NVIDIA, CORPORATION BE LIABLE FOR ANY SPECIAL, INDIRECT, INCI- *|
23 |* DENTAL, OR CONSEQUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RE- *|
32 |* 48 C.F.R. 12.212 (SEPT 1995) and is provided to the U.S. Govern- *|
34 |* 12.212 and 48 C.F.R. 227.7202-1 through 227.7202-4 (JUNE 1995), *|
[all …]
/linux-6.12.1/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
29 #define Op0_mask 0x3
31 #define Op1_mask 0x7
[all …]
/linux-6.12.1/arch/x86/lib/
Dmemmove_32.S1 /* SPDX-License-Identifier: GPL-2.0 */
9 * -mregparm=3 passes these in registers:
31 * Save all callee-saved registers, because this function is going to clobber
46 cmpl $0x10, n
62 andl $0xff, tmp0
65 subl $0x10, n
69 subl $0x10, n
70 movl 0*4(src), tmp0
71 movl 1*4(src), tmp1
72 movl tmp0, 0*4(dest)
[all …]
/linux-6.12.1/arch/arm64/boot/dts/apple/
Dt8112-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 reg = <0x100 4>;
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8112-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 reg = <0x108 4>;
[all …]
Dt8103-pmgr.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 ps_sbr: power-controller@100 {
11 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
12 reg = <0x100 4>;
13 #power-domain-cells = <0>;
14 #reset-cells = <0>;
16 apple,always-on; /* Core device */
19 ps_aic: power-controller@108 {
20 compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
21 reg = <0x108 4>;
[all …]
/linux-6.12.1/arch/arm64/kernel/vdso/
Dvgetrandom-chacha.S1 // SPDX-License-Identifier: GPL-2.0
27 * number of blocks of output with nonce 0, taking an input key and 8-bytes
30 * This implementation avoids d8-d15 because they are callee-save in user
39 * x1: 32-byte key input
40 * x2: 8-byte counter input/output
41 * x3: number of 64-byte block to write to output
45 /* copy0 = "expand 32-byte k" */
46 mov_q x8, 0x3320646e61707865
47 mov_q x9, 0x6b20657479622d32
48 mov copy0.d[0], x8
[all …]
/linux-6.12.1/Documentation/input/devices/
Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
18 4. Hardware version 1
20 4.2 Native relative mode 4 byte packet format
21 4.3 Native absolute mode 4 byte packet format
25 5.2.1 Parity checking and packet re-synchronization
33 7. Hardware version 4
39 8. Trackpoint (for Hardware version 3 and 4)
51 and version 4. Version 1 is found in "older" laptops and uses 4 bytes per
56 of up to 3 fingers. Hardware version 4 uses 6 bytes per packet, and can
58 4 allows tracking up to 5 fingers.
[all …]

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