hal/wifi3.0/hal_internal.h

1057 struct hal_hw_txrx_ops {  struct
1059 	void (*hal_srng_dst_hw_init)(struct hal_soc *hal,
1062 	void (*hal_srng_src_hw_init)(struct hal_soc *hal,
1066 	void (*hal_srng_hw_disable)(struct hal_soc *hal,
1068 	void (*hal_get_hw_hptp)(struct hal_soc *hal,
1072 	void (*hal_reo_setup)(struct hal_soc *hal_soc, void *reoparams,
1074 	void (*hal_setup_link_idle_list)(
1082 	qdf_iomem_t (*hal_get_window_address)(struct hal_soc *hal_soc,
1084 	void (*hal_reo_set_err_dst_remap)(void *hal_soc);
1085 	uint8_t (*hal_reo_enable_pn_in_dest)(void *hal_soc);
1086 	void (*hal_reo_qdesc_setup)(hal_soc_handle_t hal_soc_hdl, int tid,
1091 	uint32_t (*hal_gen_reo_remap_val)(enum hal_reo_remap_reg,
1095 	void (*hal_tx_desc_set_dscp_tid_table_id)(void *desc, uint8_t id);
1096 	void (*hal_tx_set_dscp_tid_map)(struct hal_soc *hal_soc, uint8_t *map,
1098 	void (*hal_tx_update_dscp_tid)(struct hal_soc *hal_soc, uint8_t tid,
1101 	void (*hal_tx_desc_set_lmac_id)(void *desc, uint8_t lmac_id);
1102 	void (*hal_tx_desc_set_buf_addr)(void *desc, dma_addr_t paddr,
1105 	void (*hal_tx_desc_set_search_type)(void *desc, uint8_t search_type);
1106 	void (*hal_tx_desc_set_search_index)(void *desc, uint32_t search_index);
1107 	void (*hal_tx_desc_set_cache_set_num)(void *desc, uint8_t search_index);
1108 	void (*hal_tx_comp_get_status)(void *desc, void *ts,
1110 	uint8_t (*hal_tx_comp_get_release_reason)(void *hal_desc);
1111 	uint8_t (*hal_get_wbm_internal_error)(void *hal_desc);
1112 	void (*hal_tx_desc_set_mesh_en)(void *desc, uint8_t en);
1113 	void (*hal_tx_init_cmd_credit_ring)(hal_soc_handle_t hal_soc_hdl,
1115 	uint32_t (*hal_tx_comp_get_buffer_source)(void *hal_desc);
1116 	uint32_t (*hal_tx_get_num_ppe_vp_tbl_entries)(
1119 	void (*hal_reo_config_reo2ppe_dest_info)(hal_soc_handle_t hal_soc_hdl);
1121 	void (*hal_tx_set_ppe_cmn_cfg)(hal_soc_handle_t hal_soc_hdl,
1123 	void (*hal_tx_set_ppe_vp_entry)(hal_soc_handle_t hal_soc_hdl,
1126 	void (*hal_ppeds_cfg_ast_override_map_reg)(hal_soc_handle_t hal_soc_hdl,
1128 	void (*hal_tx_set_ppe_pri2tid)(hal_soc_handle_t hal_soc_hdl,
1131 	void (*hal_tx_update_ppe_pri2tid)(hal_soc_handle_t hal_soc_hdl,
1134 	void (*hal_tx_dump_ppe_vp_entry)(hal_soc_handle_t hal_soc_hdl);
1135 	void (*hal_tx_enable_pri2tid_map)(hal_soc_handle_t hal_soc_hdl,
1137 	void (*hal_tx_config_rbm_mapping_be)(hal_soc_handle_t hal_soc_hdl,
1142 	uint32_t (*hal_rx_msdu_start_nss_get)(uint8_t *);
1143 	void (*hal_rx_mon_hw_desc_get_mpdu_status)(void *hw_desc_addr,
1145 	uint8_t (*hal_rx_get_tlv)(void *rx_tlv);
1146 	int8_t (*hal_rx_phy_legacy_get_rssi)(uint8_t *rx_tlv);
1148 	void (*hal_rx_proc_phyrx_other_receive_info_tlv)(void *rx_tlv_hdr,
1150 	void (*hal_rx_dump_msdu_end_tlv)(void *pkt_tlvs, uint8_t dbg_level);
1151 	void (*hal_rx_dump_rx_attention_tlv)(void *pkt_tlvs, uint8_t dbg_level);
1152 	void (*hal_rx_dump_msdu_start_tlv)(void *pkt_tlvs, uint8_t dbg_level);
1153 	void (*hal_rx_dump_mpdu_start_tlv)(void *pkt_tlvs, uint8_t dbg_level);
1154 	void (*hal_rx_dump_mpdu_end_tlv)(void *pkt_tlvs, uint8_t dbg_level);
1155 	void (*hal_rx_dump_pkt_hdr_tlv)(void *pkt_tlvs, uint8_t dbg_level);
1156 	uint32_t (*hal_get_link_desc_size)(void);
1157 	uint32_t (*hal_rx_mpdu_start_tid_get)(uint8_t *buf);
1158 	uint32_t (*hal_rx_msdu_start_reception_type_get)(uint8_t *buf);
1159 	uint16_t (*hal_rx_msdu_end_da_idx_get)(uint8_t *buf);
1160 	void* (*hal_rx_msdu_desc_info_get_ptr)(void *msdu_details_ptr);
1161 	void* (*hal_rx_link_desc_msdu0_ptr)(void *msdu_link_ptr);
1162 	void (*hal_reo_status_get_header)(hal_ring_desc_t ring_desc, int b,
1164 	uint32_t (*hal_rx_status_get_tlv_info)(void *rx_tlv_hdr,
1169 	void (*hal_rx_wbm_rel_buf_paddr_get)(hal_ring_desc_t rx_desc,
1172 	void (*hal_rx_wbm_err_info_get)(void *wbm_desc,
1175 	void (*hal_tx_set_pcp_tid_map)(struct hal_soc *hal_soc, uint8_t *map);
1176 	void (*hal_tx_update_pcp_tid_map)(struct hal_soc *hal_soc, uint8_t pcp,
1178 	void (*hal_tx_set_tidmap_prty)(struct hal_soc *hal_soc, uint8_t prio);
1181 	uint8_t (*hal_rx_get_rx_fragment_number)(uint8_t *buf);
1182 	uint8_t (*hal_rx_msdu_end_da_is_mcbc_get)(uint8_t *buf);
1183 	uint8_t (*hal_rx_msdu_end_is_tkip_mic_err)(uint8_t *buf);
1184 	uint8_t (*hal_rx_msdu_end_sa_is_valid_get)(uint8_t *buf);
1185 	uint16_t (*hal_rx_msdu_end_sa_idx_get)(uint8_t *buf);
1186 	uint32_t (*hal_rx_desc_is_first_msdu)(void *hw_desc_addr);
1187 	uint32_t (*hal_rx_msdu_end_l3_hdr_padding_get)(uint8_t *buf);
1188 	uint32_t (*hal_rx_encryption_info_valid)(uint8_t *buf);
1189 	void (*hal_rx_print_pn)(uint8_t *buf);
1190 	uint8_t (*hal_rx_msdu_end_first_msdu_get)(uint8_t *buf);
1191 	uint8_t (*hal_rx_msdu_end_da_is_valid_get)(uint8_t *buf);
1192 	uint8_t (*hal_rx_msdu_end_last_msdu_get)(uint8_t *buf);
1193 	bool (*hal_rx_get_mpdu_mac_ad4_valid)(uint8_t *buf);
1194 	uint32_t (*hal_rx_mpdu_start_sw_peer_id_get)(uint8_t *buf);
1195 	uint32_t (*hal_rx_tlv_peer_meta_data_get)(uint8_t *buf);
1196 	uint32_t (*hal_rx_mpdu_get_to_ds)(uint8_t *buf);
1197 	uint32_t (*hal_rx_mpdu_get_fr_ds)(uint8_t *buf);
1198 	uint8_t (*hal_rx_get_mpdu_frame_control_valid)(uint8_t *buf);
1200 		(*hal_rx_mpdu_get_addr1)(uint8_t *buf, uint8_t *mac_addr);
1202 		(*hal_rx_mpdu_get_addr2)(uint8_t *buf, uint8_t *mac_addr);
1204 		(*hal_rx_mpdu_get_addr3)(uint8_t *buf, uint8_t *mac_addr);
1206 		(*hal_rx_mpdu_get_addr4)(uint8_t *buf, uint8_t *mac_addr);
1207 	uint8_t (*hal_rx_get_mpdu_sequence_control_valid)(uint8_t *buf);
1208 	bool (*hal_rx_is_unicast)(uint8_t *buf);
1209 	uint32_t (*hal_rx_tid_get)(hal_soc_handle_t hal_soc_hdl, uint8_t *buf);
1210 	uint32_t (*hal_rx_hw_desc_get_ppduid_get)(void *rx_tlv_hdr,
1212 	uint32_t (*hal_rx_mpdu_start_mpdu_qos_control_valid_get)(uint8_t *buf);
1213 	uint32_t (*hal_rx_msdu_end_sa_sw_peer_id_get)(uint8_t *buf);
1214 	void * (*hal_rx_msdu0_buffer_addr_lsb)(void *link_desc_addr);
1215 	void * (*hal_rx_msdu_desc_info_ptr_get)(void *msdu0);
1216 	void * (*hal_ent_mpdu_desc_info)(void *hw_addr);
1217 	void * (*hal_dst_mpdu_desc_info)(void *hw_addr);
1218 	uint8_t (*hal_rx_get_fc_valid)(uint8_t *buf);
1219 	uint8_t (*hal_rx_get_to_ds_flag)(uint8_t *buf);
1220 	uint8_t (*hal_rx_get_mac_addr2_valid)(uint8_t *buf);
1221 	uint8_t (*hal_rx_get_filter_category)(uint8_t *buf);
1222 	uint32_t (*hal_rx_get_ppdu_id)(uint8_t *buf);
1223 	void (*hal_reo_config)(struct hal_soc *soc,
1226 	uint32_t (*hal_rx_msdu_flow_idx_get)(uint8_t *buf);
1227 	bool (*hal_rx_msdu_flow_idx_invalid)(uint8_t *buf);
1228 	bool (*hal_rx_msdu_flow_idx_timeout)(uint8_t *buf);
1229 	uint32_t (*hal_rx_msdu_fse_metadata_get)(uint8_t *buf);
1230 	bool (*hal_rx_msdu_cce_match_get)(uint8_t *buf);
1231 	uint16_t (*hal_rx_msdu_cce_metadata_get)(uint8_t *buf);
1233 	    (*hal_rx_msdu_get_flow_params)(
1238 	uint16_t (*hal_rx_tlv_get_tcp_chksum)(uint8_t *buf);
1239 	uint16_t (*hal_rx_get_rx_sequence)(uint8_t *buf);
1240 	void (*hal_rx_get_bb_info)(void *rx_tlv, void *ppdu_info_handle);
1241 	void (*hal_rx_get_rtt_info)(void *rx_tlv, void *ppdu_info_handle);
1242 	void (*hal_rx_msdu_packet_metadata_get)(uint8_t *buf,
1244 	uint16_t (*hal_rx_get_fisa_cumulative_l4_checksum)(uint8_t *buf);
1245 	uint16_t (*hal_rx_get_fisa_cumulative_ip_length)(uint8_t *buf);
1246 	bool (*hal_rx_get_udp_proto)(uint8_t *buf);
1247 	bool (*hal_rx_get_fisa_flow_agg_continuation)(uint8_t *buf);
1248 	uint8_t (*hal_rx_get_fisa_flow_agg_count)(uint8_t *buf);
1249 	bool (*hal_rx_get_fisa_timeout)(uint8_t *buf);
1250 	uint8_t (*hal_rx_mpdu_start_tlv_tag_valid)(void *rx_tlv_hdr);
1251 	void (*hal_rx_sw_mon_desc_info_get)(hal_ring_desc_t rxdma_dst_ring_desc,
1253 	uint8_t (*hal_rx_wbm_err_msdu_continuation_get)(void *ring_desc);
1254 	uint32_t (*hal_rx_msdu_end_offset_get)(void);
1255 	uint32_t (*hal_rx_attn_offset_get)(void);
1256 	uint32_t (*hal_rx_msdu_start_offset_get)(void);
1257 	uint32_t (*hal_rx_mpdu_start_offset_get)(void);
1258 	uint32_t (*hal_rx_mpdu_end_offset_get)(void);
1259 	uint32_t (*hal_rx_pkt_tlv_offset_get)(void);
1260 	uint32_t (*hal_rx_msdu_end_wmask_get)(void);
1261 	uint32_t (*hal_rx_mpdu_start_wmask_get)(void);
1262 	void * (*hal_rx_flow_setup_fse)(uint8_t *rx_fst,
1265 	void * (*hal_rx_flow_get_tuple_info)(uint8_t *rx_fst,
1268 	QDF_STATUS (*hal_rx_flow_delete_entry)(uint8_t *fst,
1270 	uint32_t (*hal_rx_fst_get_fse_size)(void);
1271 	void (*hal_compute_reo_remap_ix2_ix3)(uint32_t *ring,
1275 	void (*hal_compute_reo_remap_ix0)(uint32_t *remap0);
1276 	uint32_t (*hal_rx_flow_setup_cmem_fse)(
1279 	uint32_t (*hal_rx_flow_get_cmem_fse_ts)(struct hal_soc *soc,
1281 	void (*hal_rx_flow_get_cmem_fse)(struct hal_soc *soc,
1285 	void (*hal_cmem_write)(hal_soc_handle_t hal_soc_hdl, uint32_t offset,
1288 	void (*hal_rx_msdu_get_reo_destination_indication)(uint8_t *buf,
1290 	uint8_t (*hal_tx_get_num_tcl_banks)(void);
1291 	uint32_t (*hal_get_reo_qdesc_size)(uint32_t ba_window_size, int tid);
1292 	uint16_t (*hal_get_rx_max_ba_window)(int tid);
1294 	void (*hal_set_link_desc_addr)(void *desc, uint32_t cookie,
1297 	void (*hal_tx_init_data_ring)(hal_soc_handle_t hal_soc_hdl,
1299 	void* (*hal_rx_msdu_ext_desc_info_get_ptr)(void *msdu_details_ptr);
1300 	void (*hal_get_ba_aging_timeout)(hal_soc_handle_t hal_soc_hdl,
1302 	void (*hal_set_ba_aging_timeout)(hal_soc_handle_t hal_soc_hdl,
1304 	uint32_t (*hal_get_reo_reg_base_offset)(void);
1305 	void (*hal_rx_get_tlv_size)(uint16_t *rx_pkt_tlv_size,
1307 	uint32_t (*hal_rx_msdu_is_wlan_mcast)(qdf_nbuf_t nbuf);
1308 	uint32_t (*hal_rx_tlv_decap_format_get)(void *hw_desc_addr);
1309 	void (*hal_rx_dump_pkt_tlvs)(hal_soc_handle_t hal_soc_hdl,
1311 	int (*hal_rx_tlv_get_offload_info)(uint8_t *rx_tlv,
1313 	uint16_t (*hal_rx_tlv_phy_ppdu_id_get)(uint8_t *buf);
1314 	uint32_t (*hal_rx_tlv_msdu_done_get)(uint8_t *buf);
1315 	uint32_t (*hal_rx_tlv_msdu_len_get)(uint8_t *buf);
1316 	uint16_t (*hal_rx_get_frame_ctrl_field)(uint8_t *buf);
1317 	int (*hal_rx_get_proto_params)(uint8_t *buf, void *fisa_params);
1318 	int (*hal_rx_get_l3_l4_offsets)(uint8_t *buf, uint32_t *l3_hdr_offset,
1320 	uint32_t (*hal_rx_tlv_mic_err_get)(uint8_t *buf);
1321 	uint32_t (*hal_rx_tlv_get_pkt_type)(uint8_t *buf);
1322 	void (*hal_rx_tlv_get_pn_num)(uint8_t *buf, uint64_t *pn_num);
1323 	void (*hal_rx_reo_prev_pn_get)(void *ring_desc, uint64_t *prev_pn);
1324 	uint8_t * (*hal_rx_pkt_hdr_get)(uint8_t *buf);
1325 	uint32_t (*hal_rx_msdu_reo_dst_ind_get)(hal_soc_handle_t hal_soc_hdl,
1327 	void (*hal_msdu_desc_info_set)(hal_soc_handle_t hal_soc_hdl,
1330 	void (*hal_mpdu_desc_info_set)(hal_soc_handle_t hal_soc_hdl,
1335 	void (*hal_unregister_reo_send_cmd)(struct hal_soc *hal_soc);
1336 	void (*hal_register_reo_send_cmd)(struct hal_soc *hal_soc);
1337 	void (*hal_reset_rx_reo_tid_q)(struct hal_soc *hal_soc,
1340 	uint32_t (*hal_rx_tlv_sgi_get)(uint8_t *buf);
1341 	uint32_t (*hal_rx_tlv_get_freq)(uint8_t *buf);
1342 	uint8_t (*hal_rx_msdu_get_keyid)(uint8_t *buf);
1343 	uint32_t (*hal_rx_tlv_rate_mcs_get)(uint8_t *buf);
1344 	uint32_t (*hal_rx_tlv_decrypt_err_get)(uint8_t *buf);
1345 	uint32_t (*hal_rx_tlv_first_mpdu_get)(uint8_t *buf);
1346 	uint32_t (*hal_rx_tlv_bw_get)(uint8_t *buf);
1347 	uint32_t (*hal_rx_tlv_get_is_decrypted)(uint8_t *buf);
1349 	uint32_t (*hal_rx_wbm_err_src_get)(hal_ring_desc_t ring_desc);
1350 	uint8_t (*hal_rx_ret_buf_manager_get)(hal_ring_desc_t ring_desc);
1351 	void (*hal_rx_msdu_link_desc_set)(hal_soc_handle_t hal_soc_hdl,
1356 	void (*hal_rx_buf_cookie_rbm_get)(uint32_t *buf_addr_info_hdl,
1358 	void (*hal_rx_reo_buf_paddr_get)(hal_ring_desc_t rx_desc,
1360 	void (*hal_rxdma_buff_addr_info_set)(void *rxdma_entry,
1363 	uint32_t (*hal_rx_msdu_flags_get)(rx_msdu_desc_info_t msdu_desc_info_hdl);
1364 	uint32_t (*hal_rx_get_reo_error_code)(hal_ring_desc_t rx_desc);
1365 	void (*hal_rx_tlv_csum_err_get)(uint8_t *rx_tlv_hdr,
1368 	void (*hal_rx_mpdu_desc_info_get)(void *desc_addr,
1370 	uint8_t (*hal_rx_err_status_get)(hal_ring_desc_t rx_desc);
1371 	uint8_t (*hal_rx_reo_buf_type_get)(hal_ring_desc_t rx_desc);
1372 	bool (*hal_rx_mpdu_info_ampdu_flag_get)(uint8_t *buf);
1373 	uint32_t (*hal_rx_tlv_mpdu_len_err_get)(void *hw_desc_addr);
1374 	uint32_t (*hal_rx_tlv_mpdu_fcs_err_get)(void *hw_desc_addr);
1375 	void (*hal_rx_tlv_get_pkt_capture_flags)(uint8_t *rx_tlv_hdr,
1377 	uint8_t *(*hal_rx_desc_get_80211_hdr)(void *hw_desc_addr);
1378 	uint32_t (*hal_rx_hw_desc_mpdu_user_id)(void *hw_desc_addr);
1379 	void (*hal_rx_priv_info_set_in_tlv)(uint8_t *buf,
1382 	void (*hal_rx_priv_info_get_from_tlv)(uint8_t *buf,
1385 	void (*hal_rx_tlv_msdu_len_set)(uint8_t *buf, uint32_t len);
1386 	void (*hal_rx_tlv_populate_mpdu_desc_info)(uint8_t *buf,
1388 	uint8_t *(*hal_get_reo_ent_desc_qdesc_addr)(uint8_t *desc);
1389 	uint64_t (*hal_rx_get_qdesc_addr)(uint8_t *dst_ring_desc,
1391 	uint8_t (*hal_rx_get_phy_ppdu_id_size)(void);
1392 	void (*hal_set_reo_ent_desc_reo_dest_ind)(uint8_t *desc,
1395 	(*hal_rx_reo_ent_get_src_link_id)(hal_rxdma_desc_t rx_desc,
1399 	int (*hal_reo_send_cmd)(hal_soc_handle_t hal_soc_hdl,
1403 	QDF_STATUS (*hal_reo_status_update)(hal_soc_handle_t hal_soc_hdl,
1407 	uint8_t (*hal_get_tlv_hdr_size)(void);
1408 	uint8_t (*hal_get_idle_link_bm_id)(uint8_t chip_id);
1410 	bool (*hal_txmon_is_mon_buf_addr_tlv)(void *tx_tlv_hdr);
1411 	void (*hal_txmon_populate_packet_info)(void *tx_tlv_hdr,
1415 	uint32_t (*hal_txmon_status_parse_tlv)(void *data_ppdu_info,
1421 	uint32_t (*hal_txmon_status_get_num_users)(void *tx_tlv_hdr,
1423 	void (*hal_txmon_get_word_mask)(void *wmask);
1425 	QDF_STATUS (*hal_reo_shared_qaddr_setup)(hal_soc_handle_t hal_soc_hdl,
1428 	void (*hal_reo_shared_qaddr_init)(hal_soc_handle_t hal_soc_hdl,
1430 	void (*hal_reo_shared_qaddr_detach)(hal_soc_handle_t hal_soc_hdl);
1431 	void (*hal_reo_shared_qaddr_write)(hal_soc_handle_t hal_soc_hdl,
1436 	uint8_t (*hal_get_first_wow_wakeup_packet)(uint8_t *buf);
1438 	void (*hal_reo_shared_qaddr_cache_clear)(hal_soc_handle_t hal_soc_hdl);
1439 	uint32_t (*hal_rx_tlv_l3_type_get)(uint8_t *buf);
1440 	void (*hal_tx_vdev_mismatch_routing_set)(hal_soc_handle_t hal_soc_hdl,
1442 	void (*hal_tx_mcast_mlo_reinject_routing_set)(
1445 	void (*hal_cookie_conversion_reg_cfg_be)(hal_soc_handle_t hal_soc_hdl,
1448 	void (*hal_tx_populate_bank_register)(hal_soc_handle_t hal_soc_hdl,
1451 	void (*hal_tx_vdev_mcast_ctrl_set)(hal_soc_handle_t hal_soc_hdl,
1454 	void (*hal_get_tsf_time)(hal_soc_handle_t hal_soc_hdl, uint32_t tsf_id,
1457 	void (*hal_get_tsf2_scratch_reg)(hal_soc_handle_t hal_soc_hdl,
1459 	void (*hal_get_tqm_scratch_reg)(hal_soc_handle_t hal_soc_hdl,
1462 	QDF_STATUS (*hal_srng_set_msi_config)(hal_ring_handle_t ring_hdl,
1465 	void (*hal_tx_ring_halt_set)(hal_soc_handle_t hal_soc_hdl);
1466 	void (*hal_tx_ring_halt_reset)(hal_soc_handle_t hal_soc_hdl);
1467 	bool (*hal_tx_ring_halt_poll)(hal_soc_handle_t hal_soc_hdl);
1468 	uint32_t (*hal_tx_get_num_ppe_vp_search_idx_tbl_entries)(
1470 	uint32_t (*hal_tx_ring_halt_get)(hal_soc_handle_t hal_soc_hdl);
1471 	bool (*hal_rx_en_mcast_fp_data_filter)(void);
1472 	void (*hal_rx_parse_eht_sig_hdr)(struct hal_soc *hal_soc,