43 #define HWIO_REO_R0_GENERAL_ENABLE_ADDR(x)                           (x+0x00000000)  argument
44 #define HWIO_REO_R0_GENERAL_ENABLE_PHYS(x)                           (x+0x00000000)  argument
47 #define HWIO_REO_R0_GENERAL_ENABLE_IN(x)                             \  argument
48 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), HWIO_REO_R0_GENERAL_ENABLE_RMSK)
49 #define HWIO_REO_R0_GENERAL_ENABLE_INM(x, mask)                      \  argument
50 	in_dword_masked ( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask) 
51 #define HWIO_REO_R0_GENERAL_ENABLE_OUT(x, val)                       \  argument
52 	out_dword( HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), val)
53 #define HWIO_REO_R0_GENERAL_ENABLE_OUTM(x, mask, val)                \  argument
56 …out_dword_masked_ns(HWIO_REO_R0_GENERAL_ENABLE_ADDR(x), mask, val, HWIO_REO_R0_GENERAL_ENABLE_IN(x…
131 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x)               (x+0x00000004)  argument
132 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_PHYS(x)               (x+0x00000004)  argument
135 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_IN(x)                 \  argument
136 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
137 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_INM(x, mask)          \  argument
138 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask) 
139 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUT(x, val)           \  argument
140 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), val)
141 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_OUTM(x, mask, val)    \  argument
144 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
174 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x)               (x+0x00000008)  argument
175 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_PHYS(x)               (x+0x00000008)  argument
178 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_IN(x)                 \  argument
179 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
180 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_INM(x, mask)          \  argument
181 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask) 
182 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUT(x, val)           \  argument
183 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), val)
184 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_OUTM(x, mask, val)    \  argument
187 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
217 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x)               (x+0x0000000c)  argument
218 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_PHYS(x)               (x+0x0000000c)  argument
221 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_IN(x)                 \  argument
222 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
223 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_INM(x, mask)          \  argument
224 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask) 
225 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUT(x, val)           \  argument
226 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), val)
227 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_OUTM(x, mask, val)    \  argument
230 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
260 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x)               (x+0x00000010)  argument
261 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_PHYS(x)               (x+0x00000010)  argument
264 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_IN(x)                 \  argument
265 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), HWIO_REO_R0_DESTINATION_RING_CTR…
266 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_INM(x, mask)          \  argument
267 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask) 
268 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUT(x, val)           \  argument
269 	out_dword( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), val)
270 #define HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_OUTM(x, mask, val)    \  argument
273 …ns(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_CTRL_IX…
303 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x)           (x+0x00000014)  argument
304 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_PHYS(x)           (x+0x00000014)  argument
307 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_IN(x)             \  argument
308 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
309 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_INM(x, mask)      \  argument
310 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask) 
311 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUT(x, val)       \  argument
312 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), val)
313 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_OUTM(x, mask, val) \  argument
316 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_0_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
346 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x)           (x+0x00000018)  argument
347 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_PHYS(x)           (x+0x00000018)  argument
350 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_IN(x)             \  argument
351 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
352 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_INM(x, mask)      \  argument
353 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask) 
354 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUT(x, val)       \  argument
355 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), val)
356 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_OUTM(x, mask, val) \  argument
359 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_1_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
389 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x)           (x+0x0000001c)  argument
390 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_PHYS(x)           (x+0x0000001c)  argument
393 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_IN(x)             \  argument
394 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
395 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_INM(x, mask)      \  argument
396 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask) 
397 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUT(x, val)       \  argument
398 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), val)
399 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_OUTM(x, mask, val) \  argument
402 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_2_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
432 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x)           (x+0x00000020)  argument
433 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_PHYS(x)           (x+0x00000020)  argument
436 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_IN(x)             \  argument
437 …in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), HWIO_REO_R0_DESTINATION_RING…
438 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_INM(x, mask)      \  argument
439 	in_dword_masked ( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask) 
440 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUT(x, val)       \  argument
441 	out_dword( HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), val)
442 #define HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_OUTM(x, mask, val) \  argument
445 …O_REO_R0_DESTINATION_RING_ALT_CTRL_IX_3_ADDR(x), mask, val, HWIO_REO_R0_DESTINATION_RING_ALT_CTRL_…
475 #define HWIO_REO_R0_TIMESTAMP_ADDR(x)                                (x+0x00000024)  argument
476 #define HWIO_REO_R0_TIMESTAMP_PHYS(x)                                (x+0x00000024)  argument
479 #define HWIO_REO_R0_TIMESTAMP_IN(x)                                  \  argument
480 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), HWIO_REO_R0_TIMESTAMP_RMSK)
481 #define HWIO_REO_R0_TIMESTAMP_INM(x, mask)                           \  argument
482 	in_dword_masked ( HWIO_REO_R0_TIMESTAMP_ADDR(x), mask) 
483 #define HWIO_REO_R0_TIMESTAMP_OUT(x, val)                            \  argument
484 	out_dword( HWIO_REO_R0_TIMESTAMP_ADDR(x), val)
485 #define HWIO_REO_R0_TIMESTAMP_OUTM(x, mask, val)                     \  argument
488 		out_dword_masked_ns(HWIO_REO_R0_TIMESTAMP_ADDR(x), mask, val, HWIO_REO_R0_TIMESTAMP_IN(x)); \
497 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x)           (x+0x00000028)  argument
498 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_PHYS(x)           (x+0x00000028)  argument
501 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_IN(x)             \  argument
502 …in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), HWIO_REO_R0_ERROR_DESTINATIO…
503 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_INM(x, mask)      \  argument
504 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask) 
505 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUT(x, val)       \  argument
506 	out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), val)
507 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_OUTM(x, mask, val) \  argument
510 …O_REO_R0_ERROR_DESTINATION_MAPPING_IX_0_ADDR(x), mask, val, HWIO_REO_R0_ERROR_DESTINATION_MAPPING_…
546 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x)           (x+0x0000002c)  argument
547 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_PHYS(x)           (x+0x0000002c)  argument
550 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_IN(x)             \  argument
551 …in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), HWIO_REO_R0_ERROR_DESTINATIO…
552 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_INM(x, mask)      \  argument
553 	in_dword_masked ( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask) 
554 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUT(x, val)       \  argument
555 	out_dword( HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), val)
556 #define HWIO_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_OUTM(x, mask, val) \  argument
559 …O_REO_R0_ERROR_DESTINATION_MAPPING_IX_1_ADDR(x), mask, val, HWIO_REO_R0_ERROR_DESTINATION_MAPPING_…
583 #define HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x)                            (x+0x00000030)  argument
584 #define HWIO_REO_R0_IDLE_REQ_CTRL_PHYS(x)                            (x+0x00000030)  argument
587 #define HWIO_REO_R0_IDLE_REQ_CTRL_IN(x)                              \  argument
588 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), HWIO_REO_R0_IDLE_REQ_CTRL_RMSK)
589 #define HWIO_REO_R0_IDLE_REQ_CTRL_INM(x, mask)                       \  argument
590 	in_dword_masked ( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask) 
591 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUT(x, val)                        \  argument
592 	out_dword( HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), val)
593 #define HWIO_REO_R0_IDLE_REQ_CTRL_OUTM(x, mask, val)                 \  argument
596 …out_dword_masked_ns(HWIO_REO_R0_IDLE_REQ_CTRL_ADDR(x), mask, val, HWIO_REO_R0_IDLE_REQ_CTRL_IN(x))…
608 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x)                 (x+0x00000034)  argument
609 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_PHYS(x)                 (x+0x00000034)  argument
612 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_IN(x)                   \  argument
613 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_BASE_L…
614 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_INM(x, mask)            \  argument
615 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask) 
616 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUT(x, val)             \  argument
617 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), val)
618 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
621 …ed_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_BASE_LS…
630 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x)                 (x+0x00000038)  argument
631 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_PHYS(x)                 (x+0x00000038)  argument
634 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_IN(x)                   \  argument
635 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_BASE_M…
636 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_INM(x, mask)            \  argument
637 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask) 
638 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUT(x, val)             \  argument
639 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), val)
640 #define HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
643 …ed_ns(HWIO_REO_R0_RXDMA2REO0_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_BASE_MS…
655 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x)                       (x+0x0000003c)  argument
656 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_PHYS(x)                       (x+0x0000003c)  argument
659 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_IN(x)                         \  argument
660 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_ID_RMSK)
661 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_INM(x, mask)                  \  argument
662 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask) 
663 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUT(x, val)                   \  argument
664 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), val)
665 #define HWIO_REO_R0_RXDMA2REO0_RING_ID_OUTM(x, mask, val)            \  argument
668 …word_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_ID_I…
677 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x)                   (x+0x00000040)  argument
678 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_PHYS(x)                   (x+0x00000040)  argument
681 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_IN(x)                     \  argument
682 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_STATUS_R…
683 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_INM(x, mask)              \  argument
684 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask) 
685 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUT(x, val)               \  argument
686 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), val)
687 #define HWIO_REO_R0_RXDMA2REO0_RING_STATUS_OUTM(x, mask, val)        \  argument
690 …asked_ns(HWIO_REO_R0_RXDMA2REO0_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_STATUS…
702 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x)                     (x+0x00000044)  argument
703 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_PHYS(x)                     (x+0x00000044)  argument
706 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_IN(x)                       \  argument
707 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_MISC_RMSK)
708 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_INM(x, mask)                \  argument
709 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask) 
710 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUT(x, val)                 \  argument
711 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), val)
712 #define HWIO_REO_R0_RXDMA2REO0_RING_MISC_OUTM(x, mask, val)          \  argument
715 …d_masked_ns(HWIO_REO_R0_RXDMA2REO0_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MISC_…
754 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x)              (x+0x00000050)  argument
755 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_PHYS(x)              (x+0x00000050)  argument
758 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_IN(x)                \  argument
759 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_TP_…
760 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
761 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask) 
762 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUT(x, val)          \  argument
763 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), val)
764 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
767 …s(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_…
776 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x)              (x+0x00000054)  argument
777 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_PHYS(x)              (x+0x00000054)  argument
780 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_IN(x)                \  argument
781 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_TP_…
782 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
783 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask) 
784 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUT(x, val)          \  argument
785 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), val)
786 #define HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
789 …s(HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_TP_ADDR_…
798 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)   (x+0x00000064)  argument
799 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)   (x+0x00000064)  argument
802 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_IN(x)     \  argument
803 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_RXDMA2RE…
804 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
805 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
806 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
807 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
808 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
811 …MA2REO0_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_S…
826 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)   (x+0x00000068)  argument
827 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)   (x+0x00000068)  argument
830 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_IN(x)     \  argument
831 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_RXDMA2RE…
832 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
833 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
834 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
835 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
836 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
839 …MA2REO0_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_S…
848 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x)      (x+0x0000006c)  argument
849 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_PHYS(x)      (x+0x0000006c)  argument
852 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_IN(x)        \  argument
853 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO0_…
854 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
855 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
856 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUT(x, val)  \  argument
857 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), val)
858 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
861 …0_RXDMA2REO0_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_INT…
876 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)   (x+0x00000070)  argument
877 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)   (x+0x00000070)  argument
880 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_IN(x)     \  argument
881 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_RXDMA2RE…
882 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
883 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
884 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
885 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
886 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
889 …MA2REO0_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_EMPTY…
898 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)  (x+0x00000074)  argument
899 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)  (x+0x00000074)  argument
902 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_IN(x)    \  argument
903 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_RXDMA2R…
904 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
905 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
906 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
907 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
908 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
911 …A2REO0_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFE…
920 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000078)  argument
921 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000078)  argument
924 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_IN(x)   \  argument
925 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2…
926 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
927 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
928 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
929 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
930 #define HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
933 …REO0_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_CONSUMER_PREFET…
945 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x0000007c)  argument
946 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x0000007c)  argument
949 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_IN(x)              \  argument
950 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_M…
951 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
952 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask) 
953 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
954 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), val)
955 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
958 …WIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE…
967 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x00000080)  argument
968 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x00000080)  argument
971 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_IN(x)              \  argument
972 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_M…
973 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
974 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask) 
975 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
976 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), val)
977 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
980 …WIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_BASE…
992 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x)                (x+0x00000084)  argument
993 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_PHYS(x)                (x+0x00000084)  argument
996 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_IN(x)                  \  argument
997 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING_MSI1_…
998 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_INM(x, mask)           \  argument
999 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask) 
1000 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUT(x, val)            \  argument
1001 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), val)
1002 #define HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1005 …d_ns(HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_MSI1_DA…
1014 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x00000088)  argument
1015 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x00000088)  argument
1018 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
1019 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_RXDMA2REO0_RING…
1020 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1021 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1022 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
1023 	out_dword( HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1024 #define HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1027 …_REO_R0_RXDMA2REO0_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO0_RING_HP_TP_SW_O…
1036 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x)                 (x+0x0000008c)  argument
1037 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_PHYS(x)                 (x+0x0000008c)  argument
1040 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_IN(x)                   \  argument
1041 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_BASE_L…
1042 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_INM(x, mask)            \  argument
1043 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x), mask) 
1044 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUT(x, val)             \  argument
1045 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x), val)
1046 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
1049 …ed_ns(HWIO_REO_R0_RXDMA2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_BASE_LS…
1058 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x)                 (x+0x00000090)  argument
1059 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_PHYS(x)                 (x+0x00000090)  argument
1062 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_IN(x)                   \  argument
1063 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_BASE_M…
1064 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_INM(x, mask)            \  argument
1065 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x), mask) 
1066 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUT(x, val)             \  argument
1067 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x), val)
1068 #define HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
1071 …ed_ns(HWIO_REO_R0_RXDMA2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_BASE_MS…
1083 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x)                       (x+0x00000094)  argument
1084 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_PHYS(x)                       (x+0x00000094)  argument
1087 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_IN(x)                         \  argument
1088 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_ID_RMSK)
1089 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_INM(x, mask)                  \  argument
1090 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x), mask) 
1091 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUT(x, val)                   \  argument
1092 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x), val)
1093 #define HWIO_REO_R0_RXDMA2REO1_RING_ID_OUTM(x, mask, val)            \  argument
1096 …word_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_ID_I…
1105 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x)                   (x+0x00000098)  argument
1106 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_PHYS(x)                   (x+0x00000098)  argument
1109 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_IN(x)                     \  argument
1110 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_STATUS_R…
1111 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_INM(x, mask)              \  argument
1112 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x), mask) 
1113 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUT(x, val)               \  argument
1114 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x), val)
1115 #define HWIO_REO_R0_RXDMA2REO1_RING_STATUS_OUTM(x, mask, val)        \  argument
1118 …asked_ns(HWIO_REO_R0_RXDMA2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_STATUS…
1130 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x)                     (x+0x0000009c)  argument
1131 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_PHYS(x)                     (x+0x0000009c)  argument
1134 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_IN(x)                       \  argument
1135 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_MISC_RMSK)
1136 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_INM(x, mask)                \  argument
1137 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x), mask) 
1138 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUT(x, val)                 \  argument
1139 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x), val)
1140 #define HWIO_REO_R0_RXDMA2REO1_RING_MISC_OUTM(x, mask, val)          \  argument
1143 …d_masked_ns(HWIO_REO_R0_RXDMA2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_MISC_…
1182 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x)              (x+0x000000a8)  argument
1183 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_PHYS(x)              (x+0x000000a8)  argument
1186 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_IN(x)                \  argument
1187 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_TP_…
1188 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
1189 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x), mask) 
1190 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUT(x, val)          \  argument
1191 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x), val)
1192 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
1195 …s(HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_…
1204 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x)              (x+0x000000ac)  argument
1205 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_PHYS(x)              (x+0x000000ac)  argument
1208 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_IN(x)                \  argument
1209 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_TP_…
1210 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
1211 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x), mask) 
1212 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUT(x, val)          \  argument
1213 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x), val)
1214 #define HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
1217 …s(HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_TP_ADDR_…
1226 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)   (x+0x000000bc)  argument
1227 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)   (x+0x000000bc)  argument
1230 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x)     \  argument
1231 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_RXDMA2RE…
1232 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1233 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1234 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
1235 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1236 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1239 …MA2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_S…
1254 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)   (x+0x000000c0)  argument
1255 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)   (x+0x000000c0)  argument
1258 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x)     \  argument
1259 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_RXDMA2RE…
1260 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1261 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1262 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
1263 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1264 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1267 …MA2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_S…
1276 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x)      (x+0x000000c4)  argument
1277 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_PHYS(x)      (x+0x000000c4)  argument
1280 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_IN(x)        \  argument
1281 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO1_…
1282 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
1283 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1284 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val)  \  argument
1285 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1286 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1289 …0_RXDMA2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_INT…
1304 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)   (x+0x000000c8)  argument
1305 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)   (x+0x000000c8)  argument
1308 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x)     \  argument
1309 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_RXDMA2RE…
1310 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1311 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1312 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
1313 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1314 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1317 …MA2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_EMPTY…
1326 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)  (x+0x000000cc)  argument
1327 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)  (x+0x000000cc)  argument
1330 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x)    \  argument
1331 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_RXDMA2R…
1332 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1333 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1334 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
1335 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1336 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1339 …A2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFE…
1348 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x000000d0)  argument
1349 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x000000d0)  argument
1352 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x)   \  argument
1353 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2…
1354 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1355 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1356 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
1357 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1358 #define HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1361 …REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_CONSUMER_PREFET…
1373 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x000000d4)  argument
1374 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x000000d4)  argument
1377 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_IN(x)              \  argument
1378 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_M…
1379 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
1380 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1381 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
1382 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x), val)
1383 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
1386 …WIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE…
1395 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x000000d8)  argument
1396 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x000000d8)  argument
1399 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_IN(x)              \  argument
1400 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_M…
1401 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
1402 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1403 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
1404 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x), val)
1405 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
1408 …WIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_MSI1_BASE…
1420 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x)                (x+0x000000dc)  argument
1421 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_PHYS(x)                (x+0x000000dc)  argument
1424 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_IN(x)                  \  argument
1425 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING_MSI1_…
1426 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_INM(x, mask)           \  argument
1427 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x), mask) 
1428 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUT(x, val)            \  argument
1429 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x), val)
1430 #define HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1433 …d_ns(HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_MSI1_DA…
1442 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x000000e0)  argument
1443 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x000000e0)  argument
1446 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
1447 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_RXDMA2REO1_RING…
1448 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1449 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1450 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
1451 	out_dword( HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1452 #define HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1455 …_REO_R0_RXDMA2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO1_RING_HP_TP_SW_O…
1464 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x)                 (x+0x000000e4)  argument
1465 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_PHYS(x)                 (x+0x000000e4)  argument
1468 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_IN(x)                   \  argument
1469 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_BASE_L…
1470 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_INM(x, mask)            \  argument
1471 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x), mask) 
1472 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUT(x, val)             \  argument
1473 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x), val)
1474 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
1477 …ed_ns(HWIO_REO_R0_RXDMA2REO2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_BASE_LS…
1486 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x)                 (x+0x000000e8)  argument
1487 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_PHYS(x)                 (x+0x000000e8)  argument
1490 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_IN(x)                   \  argument
1491 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_BASE_M…
1492 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_INM(x, mask)            \  argument
1493 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x), mask) 
1494 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUT(x, val)             \  argument
1495 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x), val)
1496 #define HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
1499 …ed_ns(HWIO_REO_R0_RXDMA2REO2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_BASE_MS…
1511 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x)                       (x+0x000000ec)  argument
1512 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_PHYS(x)                       (x+0x000000ec)  argument
1515 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_IN(x)                         \  argument
1516 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_ID_RMSK)
1517 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_INM(x, mask)                  \  argument
1518 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x), mask) 
1519 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUT(x, val)                   \  argument
1520 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x), val)
1521 #define HWIO_REO_R0_RXDMA2REO2_RING_ID_OUTM(x, mask, val)            \  argument
1524 …word_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_ID_I…
1533 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x)                   (x+0x000000f0)  argument
1534 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_PHYS(x)                   (x+0x000000f0)  argument
1537 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_IN(x)                     \  argument
1538 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_STATUS_R…
1539 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_INM(x, mask)              \  argument
1540 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x), mask) 
1541 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUT(x, val)               \  argument
1542 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x), val)
1543 #define HWIO_REO_R0_RXDMA2REO2_RING_STATUS_OUTM(x, mask, val)        \  argument
1546 …asked_ns(HWIO_REO_R0_RXDMA2REO2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_STATUS…
1558 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x)                     (x+0x000000f4)  argument
1559 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_PHYS(x)                     (x+0x000000f4)  argument
1562 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_IN(x)                       \  argument
1563 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_MISC_RMSK)
1564 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_INM(x, mask)                \  argument
1565 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x), mask) 
1566 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUT(x, val)                 \  argument
1567 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x), val)
1568 #define HWIO_REO_R0_RXDMA2REO2_RING_MISC_OUTM(x, mask, val)          \  argument
1571 …d_masked_ns(HWIO_REO_R0_RXDMA2REO2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_MISC_…
1610 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x)              (x+0x00000100)  argument
1611 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_PHYS(x)              (x+0x00000100)  argument
1614 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_IN(x)                \  argument
1615 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_TP_…
1616 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_INM(x, mask)         \  argument
1617 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x), mask) 
1618 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUT(x, val)          \  argument
1619 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x), val)
1620 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_OUTM(x, mask, val)   \  argument
1623 …s(HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_…
1632 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x)              (x+0x00000104)  argument
1633 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_PHYS(x)              (x+0x00000104)  argument
1636 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_IN(x)                \  argument
1637 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_TP_…
1638 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_INM(x, mask)         \  argument
1639 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x), mask) 
1640 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUT(x, val)          \  argument
1641 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x), val)
1642 #define HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_OUTM(x, mask, val)   \  argument
1645 …s(HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_TP_ADDR_…
1654 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)   (x+0x00000114)  argument
1655 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)   (x+0x00000114)  argument
1658 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_IN(x)     \  argument
1659 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_RXDMA2RE…
1660 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
1661 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
1662 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
1663 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
1664 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
1667 …MA2REO2_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_S…
1682 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)   (x+0x00000118)  argument
1683 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)   (x+0x00000118)  argument
1686 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_IN(x)     \  argument
1687 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_RXDMA2RE…
1688 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
1689 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
1690 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
1691 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
1692 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
1695 …MA2REO2_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_S…
1704 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x)      (x+0x0000011c)  argument
1705 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_PHYS(x)      (x+0x0000011c)  argument
1708 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_IN(x)        \  argument
1709 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2REO2_…
1710 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
1711 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
1712 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUT(x, val)  \  argument
1713 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x), val)
1714 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
1717 …0_RXDMA2REO2_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_INT…
1732 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)   (x+0x00000120)  argument
1733 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)   (x+0x00000120)  argument
1736 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_IN(x)     \  argument
1737 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_RXDMA2RE…
1738 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
1739 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
1740 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
1741 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
1742 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
1745 …MA2REO2_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_EMPTY…
1754 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)  (x+0x00000124)  argument
1755 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)  (x+0x00000124)  argument
1758 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_IN(x)    \  argument
1759 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_RXDMA2R…
1760 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
1761 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
1762 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
1763 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
1764 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
1767 …A2REO2_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFE…
1776 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000128)  argument
1777 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000128)  argument
1780 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_IN(x)   \  argument
1781 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_RXDMA2…
1782 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
1783 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
1784 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
1785 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
1786 #define HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
1789 …REO2_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_CONSUMER_PREFET…
1801 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x0000012c)  argument
1802 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x0000012c)  argument
1805 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_IN(x)              \  argument
1806 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_M…
1807 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
1808 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x), mask) 
1809 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
1810 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x), val)
1811 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
1814 …WIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE…
1823 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x00000130)  argument
1824 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x00000130)  argument
1827 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_IN(x)              \  argument
1828 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_M…
1829 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
1830 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x), mask) 
1831 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
1832 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x), val)
1833 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
1836 …WIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_MSI1_BASE…
1848 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x)                (x+0x00000134)  argument
1849 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_PHYS(x)                (x+0x00000134)  argument
1852 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_IN(x)                  \  argument
1853 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING_MSI1_…
1854 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_INM(x, mask)           \  argument
1855 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x), mask) 
1856 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUT(x, val)            \  argument
1857 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x), val)
1858 #define HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
1861 …d_ns(HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_MSI1_DA…
1870 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x00000138)  argument
1871 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x00000138)  argument
1874 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
1875 …in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_RXDMA2REO2_RING…
1876 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
1877 	in_dword_masked ( HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
1878 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
1879 	out_dword( HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x), val)
1880 #define HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
1883 …_REO_R0_RXDMA2REO2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_RXDMA2REO2_RING_HP_TP_SW_O…
1892 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x)               (x+0x0000013c)  argument
1893 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_PHYS(x)               (x+0x0000013c)  argument
1896 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_IN(x)                 \  argument
1897 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_BA…
1898 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_INM(x, mask)          \  argument
1899 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask) 
1900 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUT(x, val)           \  argument
1901 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), val)
1902 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_OUTM(x, mask, val)    \  argument
1905 …ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_BASE_L…
1914 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x)               (x+0x00000140)  argument
1915 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_PHYS(x)               (x+0x00000140)  argument
1918 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_IN(x)                 \  argument
1919 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_BA…
1920 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_INM(x, mask)          \  argument
1921 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask) 
1922 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUT(x, val)           \  argument
1923 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), val)
1924 #define HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_OUTM(x, mask, val)    \  argument
1927 …ns(HWIO_REO_R0_WBM2REO_LINK_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_BASE_M…
1939 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x)                     (x+0x00000144)  argument
1940 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_PHYS(x)                     (x+0x00000144)  argument
1943 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_IN(x)                       \  argument
1944 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_ID_RMSK)
1945 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_INM(x, mask)                \  argument
1946 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask) 
1947 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUT(x, val)                 \  argument
1948 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), val)
1949 #define HWIO_REO_R0_WBM2REO_LINK_RING_ID_OUTM(x, mask, val)          \  argument
1952 …d_masked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_ID_…
1961 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x)                 (x+0x00000148)  argument
1962 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_PHYS(x)                 (x+0x00000148)  argument
1965 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_IN(x)                   \  argument
1966 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_STAT…
1967 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_INM(x, mask)            \  argument
1968 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask) 
1969 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUT(x, val)             \  argument
1970 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), val)
1971 #define HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_OUTM(x, mask, val)      \  argument
1974 …ed_ns(HWIO_REO_R0_WBM2REO_LINK_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_STATU…
1986 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x)                   (x+0x0000014c)  argument
1987 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_PHYS(x)                   (x+0x0000014c)  argument
1990 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_IN(x)                     \  argument
1991 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING_MISC_R…
1992 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_INM(x, mask)              \  argument
1993 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask) 
1994 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUT(x, val)               \  argument
1995 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), val)
1996 #define HWIO_REO_R0_WBM2REO_LINK_RING_MISC_OUTM(x, mask, val)        \  argument
1999 …asked_ns(HWIO_REO_R0_WBM2REO_LINK_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_MISC…
2038 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x)            (x+0x00000158)  argument
2039 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_PHYS(x)            (x+0x00000158)  argument
2042 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_IN(x)              \  argument
2043 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING…
2044 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_INM(x, mask)       \  argument
2045 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask) 
2046 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUT(x, val)        \  argument
2047 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), val)
2048 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_OUTM(x, mask, val) \  argument
2051 …WIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR…
2060 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x)            (x+0x0000015c)  argument
2061 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_PHYS(x)            (x+0x0000015c)  argument
2064 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_IN(x)              \  argument
2065 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_RING…
2066 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_INM(x, mask)       \  argument
2067 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask) 
2068 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUT(x, val)        \  argument
2069 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), val)
2070 #define HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_OUTM(x, mask, val) \  argument
2073 …WIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_TP_ADDR…
2082 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x) (x+0x0000016c)  argument
2083 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_PHYS(x) (x+0x0000016c)  argument
2086 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_IN(x)   \  argument
2087 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_WBM2RE…
2088 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
2089 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2090 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val) \  argument
2091 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2092 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2095 …O_LINK_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_…
2110 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x) (x+0x00000170)  argument
2111 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_PHYS(x) (x+0x00000170)  argument
2114 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_IN(x)   \  argument
2115 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_WBM2RE…
2116 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
2117 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2118 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val) \  argument
2119 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2120 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2123 …O_LINK_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_…
2132 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x)    (x+0x00000174)  argument
2133 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_PHYS(x)    (x+0x00000174)  argument
2136 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_IN(x)      \  argument
2137 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_WBM2REO_L…
2138 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_INM(x, mask) \  argument
2139 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2140 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUT(x, val) \  argument
2141 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2142 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2145 …BM2REO_LINK_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_IN…
2160 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x) (x+0x00000178)  argument
2161 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_PHYS(x) (x+0x00000178)  argument
2164 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_IN(x)   \  argument
2165 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_WBM2RE…
2166 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
2167 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2168 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val) \  argument
2169 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2170 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2173 …O_LINK_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_EMPT…
2182 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x) (x+0x0000017c)  argument
2183 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_PHYS(x) (x+0x0000017c)  argument
2186 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_IN(x)  \  argument
2187 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_WBM2R…
2188 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2189 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2190 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
2191 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2192 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2195 …_LINK_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREF…
2204 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x) (x+0x00000180)  argument
2205 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_PHYS(x) (x+0x00000180)  argument
2208 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_IN(x) \  argument
2209 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_WBM2…
2210 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2211 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2212 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
2213 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2214 #define HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2217 …INK_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_CONSUMER_PREFE…
2229 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x)        (x+0x00000190)  argument
2230 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_PHYS(x)        (x+0x00000190)  argument
2233 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_IN(x)          \  argument
2234 …in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_WBM2REO_LINK_…
2235 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_INM(x, mask)   \  argument
2236 	in_dword_masked ( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2237 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUT(x, val)    \  argument
2238 	out_dword( HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2239 #define HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
2242 …O_R0_WBM2REO_LINK_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_WBM2REO_LINK_RING_HP_TP_SW_…
2251 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x)                    (x+0x00000194)  argument
2252 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_PHYS(x)                    (x+0x00000194)  argument
2255 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_IN(x)                      \  argument
2256 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_BASE_LSB_RMS…
2257 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_INM(x, mask)               \  argument
2258 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask) 
2259 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUT(x, val)                \  argument
2260 	out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), val)
2261 #define HWIO_REO_R0_REO_CMD_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
2264 …_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_BASE_LSB…
2273 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x)                    (x+0x00000198)  argument
2274 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_PHYS(x)                    (x+0x00000198)  argument
2277 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_IN(x)                      \  argument
2278 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_BASE_MSB_RMS…
2279 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_INM(x, mask)               \  argument
2280 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask) 
2281 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUT(x, val)                \  argument
2282 	out_dword( HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), val)
2283 #define HWIO_REO_R0_REO_CMD_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
2286 …_masked_ns(HWIO_REO_R0_REO_CMD_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_BASE_MSB…
2298 #define HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x)                          (x+0x0000019c)  argument
2299 #define HWIO_REO_R0_REO_CMD_RING_ID_PHYS(x)                          (x+0x0000019c)  argument
2302 #define HWIO_REO_R0_REO_CMD_RING_ID_IN(x)                            \  argument
2303 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), HWIO_REO_R0_REO_CMD_RING_ID_RMSK)
2304 #define HWIO_REO_R0_REO_CMD_RING_ID_INM(x, mask)                     \  argument
2305 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask) 
2306 #define HWIO_REO_R0_REO_CMD_RING_ID_OUT(x, val)                      \  argument
2307 	out_dword( HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), val)
2308 #define HWIO_REO_R0_REO_CMD_RING_ID_OUTM(x, mask, val)               \  argument
2311 …out_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_ID_IN…
2320 #define HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x)                      (x+0x000001a0)  argument
2321 #define HWIO_REO_R0_REO_CMD_RING_STATUS_PHYS(x)                      (x+0x000001a0)  argument
2324 #define HWIO_REO_R0_REO_CMD_RING_STATUS_IN(x)                        \  argument
2325 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_RING_STATUS_RMSK)
2326 #define HWIO_REO_R0_REO_CMD_RING_STATUS_INM(x, mask)                 \  argument
2327 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask) 
2328 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUT(x, val)                  \  argument
2329 	out_dword( HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), val)
2330 #define HWIO_REO_R0_REO_CMD_RING_STATUS_OUTM(x, mask, val)           \  argument
2333 …ord_masked_ns(HWIO_REO_R0_REO_CMD_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_STATUS_…
2345 #define HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x)                        (x+0x000001a4)  argument
2346 #define HWIO_REO_R0_REO_CMD_RING_MISC_PHYS(x)                        (x+0x000001a4)  argument
2349 #define HWIO_REO_R0_REO_CMD_RING_MISC_IN(x)                          \  argument
2350 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MISC_RMSK)
2351 #define HWIO_REO_R0_REO_CMD_RING_MISC_INM(x, mask)                   \  argument
2352 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask) 
2353 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUT(x, val)                    \  argument
2354 	out_dword( HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), val)
2355 #define HWIO_REO_R0_REO_CMD_RING_MISC_OUTM(x, mask, val)             \  argument
2358 …_dword_masked_ns(HWIO_REO_R0_REO_CMD_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MISC_I…
2397 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x)                 (x+0x000001b0)  argument
2398 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_PHYS(x)                 (x+0x000001b0)  argument
2401 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_IN(x)                   \  argument
2402 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_TP_ADDR_L…
2403 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
2404 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask) 
2405 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUT(x, val)             \  argument
2406 	out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), val)
2407 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
2410 …ed_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_TP_ADDR_LS…
2419 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x)                 (x+0x000001b4)  argument
2420 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_PHYS(x)                 (x+0x000001b4)  argument
2423 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_IN(x)                   \  argument
2424 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_TP_ADDR_M…
2425 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
2426 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask) 
2427 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUT(x, val)             \  argument
2428 	out_dword( HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), val)
2429 #define HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
2432 …ed_ns(HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_TP_ADDR_MS…
2441 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)      (x+0x000001c4)  argument
2442 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)      (x+0x000001c4)  argument
2445 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_IN(x)        \  argument
2446 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
2447 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
2448 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2449 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)  \  argument
2450 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2451 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2454 …0_REO_CMD_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SE…
2469 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)      (x+0x000001c8)  argument
2470 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)      (x+0x000001c8)  argument
2473 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_IN(x)        \  argument
2474 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
2475 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
2476 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2477 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)  \  argument
2478 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2479 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2482 …0_REO_CMD_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_SE…
2491 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x)         (x+0x000001cc)  argument
2492 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_PHYS(x)         (x+0x000001cc)  argument
2495 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_IN(x)           \  argument
2496 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_RING_C…
2497 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
2498 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2499 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUT(x, val)     \  argument
2500 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2501 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2504 …EO_R0_REO_CMD_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_INT_S…
2519 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)      (x+0x000001d0)  argument
2520 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)      (x+0x000001d0)  argument
2523 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_IN(x)        \  argument
2524 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_REO_CMD_RIN…
2525 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
2526 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2527 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)  \  argument
2528 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2529 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2532 …0_REO_CMD_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_EMPTY_…
2541 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)     (x+0x000001d4)  argument
2542 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)     (x+0x000001d4)  argument
2545 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_IN(x)       \  argument
2546 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_REO_CMD_RI…
2547 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2548 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2549 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
2550 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2551 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2554 …REO_CMD_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETC…
2563 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)    (x+0x000001d8)  argument
2564 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)    (x+0x000001d8)  argument
2567 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_IN(x)      \  argument
2568 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_REO_CMD_R…
2569 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2570 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2571 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
2572 	out_dword( HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
2573 #define HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
2576 …EO_CMD_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_CONSUMER_PREFETC…
2588 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000001dc)  argument
2589 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000001dc)  argument
2592 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_IN(x)                 \  argument
2593 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_BA…
2594 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
2595 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask) 
2596 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
2597 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), val)
2598 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
2601 …ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_L…
2610 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000001e0)  argument
2611 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000001e0)  argument
2614 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_IN(x)                 \  argument
2615 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_BA…
2616 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
2617 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask) 
2618 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
2619 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), val)
2620 #define HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
2623 …ns(HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_BASE_M…
2635 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x)                   (x+0x000001e4)  argument
2636 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_PHYS(x)                   (x+0x000001e4)  argument
2639 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_IN(x)                     \  argument
2640 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_R…
2641 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_INM(x, mask)              \  argument
2642 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask) 
2643 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUT(x, val)               \  argument
2644 	out_dword( HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), val)
2645 #define HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
2648 …asked_ns(HWIO_REO_R0_REO_CMD_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_MSI1_DATA…
2657 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000001e8)  argument
2658 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000001e8)  argument
2661 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
2662 …in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_CMD_RING_HP_TP…
2663 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
2664 	in_dword_masked ( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
2665 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
2666 	out_dword( HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), val)
2667 #define HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
2670 …HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_CMD_RING_HP_TP_SW_OFF…
2679 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x)                     (x+0x000001ec)  argument
2680 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_PHYS(x)                     (x+0x000001ec)  argument
2683 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_IN(x)                       \  argument
2684 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_BASE_LSB_RMSK)
2685 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_INM(x, mask)                \  argument
2686 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask) 
2687 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUT(x, val)                 \  argument
2688 	out_dword( HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), val)
2689 #define HWIO_REO_R0_SW2REO_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
2692 …d_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_BASE_LSB_…
2701 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x)                     (x+0x000001f0)  argument
2702 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_PHYS(x)                     (x+0x000001f0)  argument
2705 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_IN(x)                       \  argument
2706 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_BASE_MSB_RMSK)
2707 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_INM(x, mask)                \  argument
2708 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask) 
2709 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUT(x, val)                 \  argument
2710 	out_dword( HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), val)
2711 #define HWIO_REO_R0_SW2REO_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
2714 …d_masked_ns(HWIO_REO_R0_SW2REO_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_BASE_MSB_…
2726 #define HWIO_REO_R0_SW2REO_RING_ID_ADDR(x)                           (x+0x000001f4)  argument
2727 #define HWIO_REO_R0_SW2REO_RING_ID_PHYS(x)                           (x+0x000001f4)  argument
2730 #define HWIO_REO_R0_SW2REO_RING_ID_IN(x)                             \  argument
2731 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), HWIO_REO_R0_SW2REO_RING_ID_RMSK)
2732 #define HWIO_REO_R0_SW2REO_RING_ID_INM(x, mask)                      \  argument
2733 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask) 
2734 #define HWIO_REO_R0_SW2REO_RING_ID_OUT(x, val)                       \  argument
2735 	out_dword( HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), val)
2736 #define HWIO_REO_R0_SW2REO_RING_ID_OUTM(x, mask, val)                \  argument
2739 …out_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_ID_IN(x…
2748 #define HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x)                       (x+0x000001f8)  argument
2749 #define HWIO_REO_R0_SW2REO_RING_STATUS_PHYS(x)                       (x+0x000001f8)  argument
2752 #define HWIO_REO_R0_SW2REO_RING_STATUS_IN(x)                         \  argument
2753 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RING_STATUS_RMSK)
2754 #define HWIO_REO_R0_SW2REO_RING_STATUS_INM(x, mask)                  \  argument
2755 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask) 
2756 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUT(x, val)                   \  argument
2757 	out_dword( HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), val)
2758 #define HWIO_REO_R0_SW2REO_RING_STATUS_OUTM(x, mask, val)            \  argument
2761 …word_masked_ns(HWIO_REO_R0_SW2REO_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_STATUS_I…
2773 #define HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x)                         (x+0x000001fc)  argument
2774 #define HWIO_REO_R0_SW2REO_RING_MISC_PHYS(x)                         (x+0x000001fc)  argument
2777 #define HWIO_REO_R0_SW2REO_RING_MISC_IN(x)                           \  argument
2778 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), HWIO_REO_R0_SW2REO_RING_MISC_RMSK)
2779 #define HWIO_REO_R0_SW2REO_RING_MISC_INM(x, mask)                    \  argument
2780 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask) 
2781 #define HWIO_REO_R0_SW2REO_RING_MISC_OUT(x, val)                     \  argument
2782 	out_dword( HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), val)
2783 #define HWIO_REO_R0_SW2REO_RING_MISC_OUTM(x, mask, val)              \  argument
2786 …t_dword_masked_ns(HWIO_REO_R0_SW2REO_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MISC_IN…
2825 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x)                  (x+0x00000208)  argument
2826 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_PHYS(x)                  (x+0x00000208)  argument
2829 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_IN(x)                    \  argument
2830 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB…
2831 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_INM(x, mask)             \  argument
2832 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask) 
2833 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUT(x, val)              \  argument
2834 	out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), val)
2835 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_OUTM(x, mask, val)       \  argument
2838 …sked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_TP_ADDR_LS…
2847 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x)                  (x+0x0000020c)  argument
2848 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_PHYS(x)                  (x+0x0000020c)  argument
2851 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_IN(x)                    \  argument
2852 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB…
2853 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_INM(x, mask)             \  argument
2854 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask) 
2855 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUT(x, val)              \  argument
2856 	out_dword( HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), val)
2857 #define HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_OUTM(x, mask, val)       \  argument
2860 …sked_ns(HWIO_REO_R0_SW2REO_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_TP_ADDR_MS…
2869 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)       (x+0x0000021c)  argument
2870 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)       (x+0x0000021c)  argument
2873 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_IN(x)         \  argument
2874 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2875 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask)  \  argument
2876 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
2877 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)   \  argument
2878 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
2879 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
2882 …R0_SW2REO_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SET…
2897 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)       (x+0x00000220)  argument
2898 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)       (x+0x00000220)  argument
2901 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_IN(x)         \  argument
2902 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2903 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask)  \  argument
2904 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
2905 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)   \  argument
2906 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
2907 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
2910 …R0_SW2REO_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_SET…
2919 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x)          (x+0x00000224)  argument
2920 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_PHYS(x)          (x+0x00000224)  argument
2923 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_IN(x)            \  argument
2924 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RING_CON…
2925 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_INM(x, mask)     \  argument
2926 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
2927 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUT(x, val)      \  argument
2928 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), val)
2929 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
2932 …_REO_R0_SW2REO_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_INT_S…
2947 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)       (x+0x00000228)  argument
2948 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)       (x+0x00000228)  argument
2951 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_IN(x)         \  argument
2952 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_SW2REO_RING_…
2953 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask)  \  argument
2954 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
2955 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)   \  argument
2956 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
2957 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
2960 …R0_SW2REO_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_EMPTY_C…
2969 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)      (x+0x0000022c)  argument
2970 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)      (x+0x0000022c)  argument
2973 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_IN(x)        \  argument
2974 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_SW2REO_RING…
2975 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
2976 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
2977 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val)  \  argument
2978 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
2979 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
2982 …0_SW2REO_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETC…
2991 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)     (x+0x00000230)  argument
2992 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)     (x+0x00000230)  argument
2995 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_IN(x)       \  argument
2996 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_SW2REO_RIN…
2997 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
2998 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
2999 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
3000 	out_dword( HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
3001 #define HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
3004 …SW2REO_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_CONSUMER_PREFETCH…
3016 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x)                (x+0x00000234)  argument
3017 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_PHYS(x)                (x+0x00000234)  argument
3020 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_IN(x)                  \  argument
3021 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_BASE…
3022 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
3023 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3024 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUT(x, val)            \  argument
3025 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), val)
3026 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
3029 …d_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_BASE_L…
3038 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x)                (x+0x00000238)  argument
3039 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_PHYS(x)                (x+0x00000238)  argument
3042 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_IN(x)                  \  argument
3043 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_BASE…
3044 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
3045 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3046 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUT(x, val)            \  argument
3047 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), val)
3048 #define HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
3051 …d_ns(HWIO_REO_R0_SW2REO_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_BASE_M…
3063 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x)                    (x+0x0000023c)  argument
3064 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_PHYS(x)                    (x+0x0000023c)  argument
3067 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_IN(x)                      \  argument
3068 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_SW2REO_RING_MSI1_DATA_RMS…
3069 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_INM(x, mask)               \  argument
3070 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask) 
3071 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUT(x, val)                \  argument
3072 	out_dword( HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), val)
3073 #define HWIO_REO_R0_SW2REO_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
3076 …_masked_ns(HWIO_REO_R0_SW2REO_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_MSI1_DATA…
3085 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x)              (x+0x00000240)  argument
3086 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_PHYS(x)              (x+0x00000240)  argument
3089 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_IN(x)                \  argument
3090 …in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_SW2REO_RING_HP_TP_S…
3091 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
3092 	in_dword_masked ( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3093 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUT(x, val)          \  argument
3094 	out_dword( HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3095 #define HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
3098 …s(HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO_RING_HP_TP_SW_OFF…
3107 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x)                    (x+0x00000244)  argument
3108 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_PHYS(x)                    (x+0x00000244)  argument
3111 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_IN(x)                      \  argument
3112 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_BASE_LSB_RMS…
3113 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_INM(x, mask)               \  argument
3114 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask) 
3115 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUT(x, val)                \  argument
3116 	out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), val)
3117 #define HWIO_REO_R0_SW2REO1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3120 …_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_BASE_LSB…
3129 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x)                    (x+0x00000248)  argument
3130 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_PHYS(x)                    (x+0x00000248)  argument
3133 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_IN(x)                      \  argument
3134 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_BASE_MSB_RMS…
3135 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_INM(x, mask)               \  argument
3136 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask) 
3137 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUT(x, val)                \  argument
3138 	out_dword( HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), val)
3139 #define HWIO_REO_R0_SW2REO1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3142 …_masked_ns(HWIO_REO_R0_SW2REO1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_BASE_MSB…
3154 #define HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x)                          (x+0x0000024c)  argument
3155 #define HWIO_REO_R0_SW2REO1_RING_ID_PHYS(x)                          (x+0x0000024c)  argument
3158 #define HWIO_REO_R0_SW2REO1_RING_ID_IN(x)                            \  argument
3159 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), HWIO_REO_R0_SW2REO1_RING_ID_RMSK)
3160 #define HWIO_REO_R0_SW2REO1_RING_ID_INM(x, mask)                     \  argument
3161 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask) 
3162 #define HWIO_REO_R0_SW2REO1_RING_ID_OUT(x, val)                      \  argument
3163 	out_dword( HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), val)
3164 #define HWIO_REO_R0_SW2REO1_RING_ID_OUTM(x, mask, val)               \  argument
3167 …out_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_ID_IN…
3176 #define HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x)                      (x+0x00000250)  argument
3177 #define HWIO_REO_R0_SW2REO1_RING_STATUS_PHYS(x)                      (x+0x00000250)  argument
3180 #define HWIO_REO_R0_SW2REO1_RING_STATUS_IN(x)                        \  argument
3181 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_RING_STATUS_RMSK)
3182 #define HWIO_REO_R0_SW2REO1_RING_STATUS_INM(x, mask)                 \  argument
3183 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask) 
3184 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUT(x, val)                  \  argument
3185 	out_dword( HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), val)
3186 #define HWIO_REO_R0_SW2REO1_RING_STATUS_OUTM(x, mask, val)           \  argument
3189 …ord_masked_ns(HWIO_REO_R0_SW2REO1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_STATUS_…
3201 #define HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x)                        (x+0x00000254)  argument
3202 #define HWIO_REO_R0_SW2REO1_RING_MISC_PHYS(x)                        (x+0x00000254)  argument
3205 #define HWIO_REO_R0_SW2REO1_RING_MISC_IN(x)                          \  argument
3206 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MISC_RMSK)
3207 #define HWIO_REO_R0_SW2REO1_RING_MISC_INM(x, mask)                   \  argument
3208 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask) 
3209 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUT(x, val)                    \  argument
3210 	out_dword( HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), val)
3211 #define HWIO_REO_R0_SW2REO1_RING_MISC_OUTM(x, mask, val)             \  argument
3214 …_dword_masked_ns(HWIO_REO_R0_SW2REO1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MISC_I…
3253 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x)                 (x+0x00000260)  argument
3254 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_PHYS(x)                 (x+0x00000260)  argument
3257 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_IN(x)                   \  argument
3258 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_TP_ADDR_L…
3259 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_INM(x, mask)            \  argument
3260 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask) 
3261 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUT(x, val)             \  argument
3262 	out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), val)
3263 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3266 …ed_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_TP_ADDR_LS…
3275 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x)                 (x+0x00000264)  argument
3276 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_PHYS(x)                 (x+0x00000264)  argument
3279 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_IN(x)                   \  argument
3280 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_TP_ADDR_M…
3281 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_INM(x, mask)            \  argument
3282 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask) 
3283 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUT(x, val)             \  argument
3284 	out_dword( HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), val)
3285 #define HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3288 …ed_ns(HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_TP_ADDR_MS…
3297 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x)      (x+0x00000274)  argument
3298 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_PHYS(x)      (x+0x00000274)  argument
3301 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_IN(x)        \  argument
3302 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
3303 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_INM(x, mask) \  argument
3304 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask) 
3305 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUT(x, val)  \  argument
3306 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), val)
3307 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_OUTM(x, mask, val) \  argument
3310 …0_SW2REO1_RING_CONSUMER_INT_SETUP_IX0_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SE…
3325 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x)      (x+0x00000278)  argument
3326 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_PHYS(x)      (x+0x00000278)  argument
3329 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_IN(x)        \  argument
3330 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
3331 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_INM(x, mask) \  argument
3332 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask) 
3333 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUT(x, val)  \  argument
3334 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), val)
3335 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_OUTM(x, mask, val) \  argument
3338 …0_SW2REO1_RING_CONSUMER_INT_SETUP_IX1_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_SE…
3347 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x)         (x+0x0000027c)  argument
3348 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_PHYS(x)         (x+0x0000027c)  argument
3351 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_IN(x)           \  argument
3352 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_RING_C…
3353 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_INM(x, mask)    \  argument
3354 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask) 
3355 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUT(x, val)     \  argument
3356 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), val)
3357 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_OUTM(x, mask, val) \  argument
3360 …EO_R0_SW2REO1_RING_CONSUMER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_INT_S…
3375 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x)      (x+0x00000280)  argument
3376 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_PHYS(x)      (x+0x00000280)  argument
3379 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_IN(x)        \  argument
3380 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), HWIO_REO_R0_SW2REO1_RIN…
3381 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_INM(x, mask) \  argument
3382 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask) 
3383 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUT(x, val)  \  argument
3384 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), val)
3385 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_OUTM(x, mask, val) \  argument
3388 …0_SW2REO1_RING_CONSUMER_EMPTY_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_EMPTY_…
3397 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x)     (x+0x00000284)  argument
3398 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_PHYS(x)     (x+0x00000284)  argument
3401 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_IN(x)       \  argument
3402 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), HWIO_REO_R0_SW2REO1_RI…
3403 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_INM(x, mask) \  argument
3404 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask) 
3405 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUT(x, val) \  argument
3406 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), val)
3407 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_TIMER_OUTM(x, mask, val) \  argument
3410 …SW2REO1_RING_CONSUMER_PREFETCH_TIMER_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETC…
3419 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x)    (x+0x00000288)  argument
3420 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_PHYS(x)    (x+0x00000288)  argument
3423 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_IN(x)      \  argument
3424 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), HWIO_REO_R0_SW2REO1_R…
3425 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_INM(x, mask) \  argument
3426 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask) 
3427 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUT(x, val) \  argument
3428 	out_dword( HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), val)
3429 #define HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETCH_STATUS_OUTM(x, mask, val) \  argument
3432 …W2REO1_RING_CONSUMER_PREFETCH_STATUS_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_CONSUMER_PREFETC…
3444 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000028c)  argument
3445 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000028c)  argument
3448 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3449 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_BA…
3450 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3451 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3452 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3453 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), val)
3454 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3457 …ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_L…
3466 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000290)  argument
3467 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000290)  argument
3470 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3471 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_BA…
3472 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3473 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3474 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3475 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), val)
3476 #define HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3479 …ns(HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_BASE_M…
3491 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x)                   (x+0x00000294)  argument
3492 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_PHYS(x)                   (x+0x00000294)  argument
3495 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_IN(x)                     \  argument
3496 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_R…
3497 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_INM(x, mask)              \  argument
3498 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask) 
3499 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUT(x, val)               \  argument
3500 	out_dword( HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), val)
3501 #define HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3504 …asked_ns(HWIO_REO_R0_SW2REO1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_MSI1_DATA…
3513 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000298)  argument
3514 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000298)  argument
3517 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3518 …in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_SW2REO1_RING_HP_TP…
3519 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3520 	in_dword_masked ( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3521 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3522 	out_dword( HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3523 #define HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3526 …HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_SW2REO1_RING_HP_TP_SW_OFF…
3535 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x)                    (x+0x0000029c)  argument
3536 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_PHYS(x)                    (x+0x0000029c)  argument
3539 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_IN(x)                      \  argument
3540 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_BASE_LSB_RMS…
3541 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_INM(x, mask)               \  argument
3542 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask) 
3543 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUT(x, val)                \  argument
3544 	out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), val)
3545 #define HWIO_REO_R0_REO2SW1_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3548 …_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_BASE_LSB…
3557 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x)                    (x+0x000002a0)  argument
3558 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_PHYS(x)                    (x+0x000002a0)  argument
3561 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_IN(x)                      \  argument
3562 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_BASE_MSB_RMS…
3563 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_INM(x, mask)               \  argument
3564 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask) 
3565 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUT(x, val)                \  argument
3566 	out_dword( HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), val)
3567 #define HWIO_REO_R0_REO2SW1_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3570 …_masked_ns(HWIO_REO_R0_REO2SW1_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_BASE_MSB…
3582 #define HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x)                          (x+0x000002a4)  argument
3583 #define HWIO_REO_R0_REO2SW1_RING_ID_PHYS(x)                          (x+0x000002a4)  argument
3586 #define HWIO_REO_R0_REO2SW1_RING_ID_IN(x)                            \  argument
3587 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW1_RING_ID_RMSK)
3588 #define HWIO_REO_R0_REO2SW1_RING_ID_INM(x, mask)                     \  argument
3589 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask) 
3590 #define HWIO_REO_R0_REO2SW1_RING_ID_OUT(x, val)                      \  argument
3591 	out_dword( HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), val)
3592 #define HWIO_REO_R0_REO2SW1_RING_ID_OUTM(x, mask, val)               \  argument
3595 …out_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_ID_IN…
3607 #define HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x)                      (x+0x000002a8)  argument
3608 #define HWIO_REO_R0_REO2SW1_RING_STATUS_PHYS(x)                      (x+0x000002a8)  argument
3611 #define HWIO_REO_R0_REO2SW1_RING_STATUS_IN(x)                        \  argument
3612 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW1_RING_STATUS_RMSK)
3613 #define HWIO_REO_R0_REO2SW1_RING_STATUS_INM(x, mask)                 \  argument
3614 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask) 
3615 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUT(x, val)                  \  argument
3616 	out_dword( HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), val)
3617 #define HWIO_REO_R0_REO2SW1_RING_STATUS_OUTM(x, mask, val)           \  argument
3620 …ord_masked_ns(HWIO_REO_R0_REO2SW1_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_STATUS_…
3632 #define HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x)                        (x+0x000002ac)  argument
3633 #define HWIO_REO_R0_REO2SW1_RING_MISC_PHYS(x)                        (x+0x000002ac)  argument
3636 #define HWIO_REO_R0_REO2SW1_RING_MISC_IN(x)                          \  argument
3637 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MISC_RMSK)
3638 #define HWIO_REO_R0_REO2SW1_RING_MISC_INM(x, mask)                   \  argument
3639 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask) 
3640 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUT(x, val)                    \  argument
3641 	out_dword( HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), val)
3642 #define HWIO_REO_R0_REO2SW1_RING_MISC_OUTM(x, mask, val)             \  argument
3645 …_dword_masked_ns(HWIO_REO_R0_REO2SW1_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MISC_I…
3687 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x000002b0)  argument
3688 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x000002b0)  argument
3691 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_IN(x)                   \  argument
3692 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_ADDR_L…
3693 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
3694 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask) 
3695 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
3696 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), val)
3697 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
3700 …ed_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_ADDR_LS…
3709 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x000002b4)  argument
3710 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x000002b4)  argument
3713 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_IN(x)                   \  argument
3714 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_ADDR_M…
3715 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
3716 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask) 
3717 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
3718 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), val)
3719 #define HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
3722 …ed_ns(HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_ADDR_MS…
3731 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x000002c0)  argument
3732 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x000002c0)  argument
3735 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
3736 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW1_RING_PR…
3737 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
3738 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
3739 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
3740 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), val)
3741 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
3744 …_REO_R0_REO2SW1_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_…
3759 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x000002c4)  argument
3760 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x000002c4)  argument
3763 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
3764 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW1_RING_P…
3765 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
3766 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
3767 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
3768 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), val)
3769 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
3772 …EO_R0_REO2SW1_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_INT_S…
3787 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x000002c8)  argument
3788 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x000002c8)  argument
3791 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
3792 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW1_RING…
3793 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
3794 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
3795 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
3796 	out_dword( HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
3797 #define HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
3800 …R0_REO2SW1_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_PRODUCER_FULL_C…
3809 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000002e4)  argument
3810 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000002e4)  argument
3813 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_IN(x)                 \  argument
3814 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_BA…
3815 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
3816 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask) 
3817 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
3818 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), val)
3819 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
3822 …ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_L…
3831 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000002e8)  argument
3832 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000002e8)  argument
3835 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_IN(x)                 \  argument
3836 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_BA…
3837 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
3838 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask) 
3839 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
3840 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), val)
3841 #define HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
3844 …ns(HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_BASE_M…
3856 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x)                   (x+0x000002ec)  argument
3857 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_PHYS(x)                   (x+0x000002ec)  argument
3860 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_IN(x)                     \  argument
3861 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_R…
3862 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_INM(x, mask)              \  argument
3863 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask) 
3864 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUT(x, val)               \  argument
3865 	out_dword( HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), val)
3866 #define HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
3869 …asked_ns(HWIO_REO_R0_REO2SW1_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_MSI1_DATA…
3878 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000002f0)  argument
3879 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000002f0)  argument
3882 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
3883 …in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW1_RING_HP_TP…
3884 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
3885 	in_dword_masked ( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
3886 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
3887 	out_dword( HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), val)
3888 #define HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
3891 …HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW1_RING_HP_TP_SW_OFF…
3900 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x)                    (x+0x000002f4)  argument
3901 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_PHYS(x)                    (x+0x000002f4)  argument
3904 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_IN(x)                      \  argument
3905 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_BASE_LSB_RMS…
3906 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_INM(x, mask)               \  argument
3907 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask) 
3908 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUT(x, val)                \  argument
3909 	out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), val)
3910 #define HWIO_REO_R0_REO2SW2_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
3913 …_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_BASE_LSB…
3922 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x)                    (x+0x000002f8)  argument
3923 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_PHYS(x)                    (x+0x000002f8)  argument
3926 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_IN(x)                      \  argument
3927 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_BASE_MSB_RMS…
3928 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_INM(x, mask)               \  argument
3929 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask) 
3930 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUT(x, val)                \  argument
3931 	out_dword( HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), val)
3932 #define HWIO_REO_R0_REO2SW2_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
3935 …_masked_ns(HWIO_REO_R0_REO2SW2_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_BASE_MSB…
3947 #define HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x)                          (x+0x000002fc)  argument
3948 #define HWIO_REO_R0_REO2SW2_RING_ID_PHYS(x)                          (x+0x000002fc)  argument
3951 #define HWIO_REO_R0_REO2SW2_RING_ID_IN(x)                            \  argument
3952 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW2_RING_ID_RMSK)
3953 #define HWIO_REO_R0_REO2SW2_RING_ID_INM(x, mask)                     \  argument
3954 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask) 
3955 #define HWIO_REO_R0_REO2SW2_RING_ID_OUT(x, val)                      \  argument
3956 	out_dword( HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), val)
3957 #define HWIO_REO_R0_REO2SW2_RING_ID_OUTM(x, mask, val)               \  argument
3960 …out_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_ID_IN…
3972 #define HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x)                      (x+0x00000300)  argument
3973 #define HWIO_REO_R0_REO2SW2_RING_STATUS_PHYS(x)                      (x+0x00000300)  argument
3976 #define HWIO_REO_R0_REO2SW2_RING_STATUS_IN(x)                        \  argument
3977 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW2_RING_STATUS_RMSK)
3978 #define HWIO_REO_R0_REO2SW2_RING_STATUS_INM(x, mask)                 \  argument
3979 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask) 
3980 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUT(x, val)                  \  argument
3981 	out_dword( HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), val)
3982 #define HWIO_REO_R0_REO2SW2_RING_STATUS_OUTM(x, mask, val)           \  argument
3985 …ord_masked_ns(HWIO_REO_R0_REO2SW2_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_STATUS_…
3997 #define HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x)                        (x+0x00000304)  argument
3998 #define HWIO_REO_R0_REO2SW2_RING_MISC_PHYS(x)                        (x+0x00000304)  argument
4001 #define HWIO_REO_R0_REO2SW2_RING_MISC_IN(x)                          \  argument
4002 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MISC_RMSK)
4003 #define HWIO_REO_R0_REO2SW2_RING_MISC_INM(x, mask)                   \  argument
4004 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask) 
4005 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUT(x, val)                    \  argument
4006 	out_dword( HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), val)
4007 #define HWIO_REO_R0_REO2SW2_RING_MISC_OUTM(x, mask, val)             \  argument
4010 …_dword_masked_ns(HWIO_REO_R0_REO2SW2_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MISC_I…
4052 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000308)  argument
4053 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000308)  argument
4056 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_IN(x)                   \  argument
4057 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_ADDR_L…
4058 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4059 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask) 
4060 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4061 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), val)
4062 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4065 …ed_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_ADDR_LS…
4074 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x0000030c)  argument
4075 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x0000030c)  argument
4078 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_IN(x)                   \  argument
4079 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_ADDR_M…
4080 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4081 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask) 
4082 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4083 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), val)
4084 #define HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4087 …ed_ns(HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_ADDR_MS…
4096 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000318)  argument
4097 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000318)  argument
4100 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4101 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW2_RING_PR…
4102 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4103 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4104 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4105 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4106 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4109 …_REO_R0_REO2SW2_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_…
4124 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x0000031c)  argument
4125 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x0000031c)  argument
4128 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4129 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW2_RING_P…
4130 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4131 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4132 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4133 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4134 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4137 …EO_R0_REO2SW2_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_INT_S…
4152 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000320)  argument
4153 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000320)  argument
4156 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4157 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW2_RING…
4158 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4159 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4160 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4161 	out_dword( HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4162 #define HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4165 …R0_REO2SW2_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_PRODUCER_FULL_C…
4174 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x0000033c)  argument
4175 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x0000033c)  argument
4178 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4179 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_BA…
4180 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4181 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4182 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4183 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), val)
4184 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4187 …ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_L…
4196 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000340)  argument
4197 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000340)  argument
4200 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4201 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_BA…
4202 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4203 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4204 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4205 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), val)
4206 #define HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4209 …ns(HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_BASE_M…
4221 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x)                   (x+0x00000344)  argument
4222 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_PHYS(x)                   (x+0x00000344)  argument
4225 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_IN(x)                     \  argument
4226 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_R…
4227 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_INM(x, mask)              \  argument
4228 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask) 
4229 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUT(x, val)               \  argument
4230 	out_dword( HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), val)
4231 #define HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4234 …asked_ns(HWIO_REO_R0_REO2SW2_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_MSI1_DATA…
4243 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000348)  argument
4244 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000348)  argument
4247 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4248 …in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW2_RING_HP_TP…
4249 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4250 	in_dword_masked ( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4251 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4252 	out_dword( HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4253 #define HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4256 …HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW2_RING_HP_TP_SW_OFF…
4265 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x)                    (x+0x0000034c)  argument
4266 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_PHYS(x)                    (x+0x0000034c)  argument
4269 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_IN(x)                      \  argument
4270 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_BASE_LSB_RMS…
4271 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_INM(x, mask)               \  argument
4272 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask) 
4273 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUT(x, val)                \  argument
4274 	out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), val)
4275 #define HWIO_REO_R0_REO2SW3_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4278 …_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_BASE_LSB…
4287 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x)                    (x+0x00000350)  argument
4288 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_PHYS(x)                    (x+0x00000350)  argument
4291 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_IN(x)                      \  argument
4292 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_BASE_MSB_RMS…
4293 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_INM(x, mask)               \  argument
4294 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask) 
4295 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUT(x, val)                \  argument
4296 	out_dword( HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), val)
4297 #define HWIO_REO_R0_REO2SW3_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4300 …_masked_ns(HWIO_REO_R0_REO2SW3_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_BASE_MSB…
4312 #define HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x)                          (x+0x00000354)  argument
4313 #define HWIO_REO_R0_REO2SW3_RING_ID_PHYS(x)                          (x+0x00000354)  argument
4316 #define HWIO_REO_R0_REO2SW3_RING_ID_IN(x)                            \  argument
4317 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW3_RING_ID_RMSK)
4318 #define HWIO_REO_R0_REO2SW3_RING_ID_INM(x, mask)                     \  argument
4319 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask) 
4320 #define HWIO_REO_R0_REO2SW3_RING_ID_OUT(x, val)                      \  argument
4321 	out_dword( HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), val)
4322 #define HWIO_REO_R0_REO2SW3_RING_ID_OUTM(x, mask, val)               \  argument
4325 …out_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_ID_IN…
4337 #define HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x)                      (x+0x00000358)  argument
4338 #define HWIO_REO_R0_REO2SW3_RING_STATUS_PHYS(x)                      (x+0x00000358)  argument
4341 #define HWIO_REO_R0_REO2SW3_RING_STATUS_IN(x)                        \  argument
4342 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW3_RING_STATUS_RMSK)
4343 #define HWIO_REO_R0_REO2SW3_RING_STATUS_INM(x, mask)                 \  argument
4344 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask) 
4345 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUT(x, val)                  \  argument
4346 	out_dword( HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), val)
4347 #define HWIO_REO_R0_REO2SW3_RING_STATUS_OUTM(x, mask, val)           \  argument
4350 …ord_masked_ns(HWIO_REO_R0_REO2SW3_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_STATUS_…
4362 #define HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x)                        (x+0x0000035c)  argument
4363 #define HWIO_REO_R0_REO2SW3_RING_MISC_PHYS(x)                        (x+0x0000035c)  argument
4366 #define HWIO_REO_R0_REO2SW3_RING_MISC_IN(x)                          \  argument
4367 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MISC_RMSK)
4368 #define HWIO_REO_R0_REO2SW3_RING_MISC_INM(x, mask)                   \  argument
4369 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask) 
4370 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUT(x, val)                    \  argument
4371 	out_dword( HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), val)
4372 #define HWIO_REO_R0_REO2SW3_RING_MISC_OUTM(x, mask, val)             \  argument
4375 …_dword_masked_ns(HWIO_REO_R0_REO2SW3_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MISC_I…
4417 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000360)  argument
4418 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000360)  argument
4421 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_IN(x)                   \  argument
4422 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_ADDR_L…
4423 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4424 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask) 
4425 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4426 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), val)
4427 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4430 …ed_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_ADDR_LS…
4439 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x00000364)  argument
4440 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x00000364)  argument
4443 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_IN(x)                   \  argument
4444 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_ADDR_M…
4445 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4446 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask) 
4447 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4448 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), val)
4449 #define HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4452 …ed_ns(HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_ADDR_MS…
4461 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000370)  argument
4462 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000370)  argument
4465 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4466 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW3_RING_PR…
4467 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4468 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4469 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4470 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4471 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4474 …_REO_R0_REO2SW3_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_…
4489 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x00000374)  argument
4490 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x00000374)  argument
4493 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4494 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW3_RING_P…
4495 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4496 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4497 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4498 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4499 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4502 …EO_R0_REO2SW3_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_INT_S…
4517 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000378)  argument
4518 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000378)  argument
4521 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4522 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW3_RING…
4523 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4524 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4525 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4526 	out_dword( HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4527 #define HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4530 …R0_REO2SW3_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_PRODUCER_FULL_C…
4539 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x00000394)  argument
4540 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x00000394)  argument
4543 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4544 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_BA…
4545 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4546 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4547 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4548 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), val)
4549 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4552 …ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_L…
4561 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000398)  argument
4562 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000398)  argument
4565 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4566 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_BA…
4567 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4568 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4569 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4570 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), val)
4571 #define HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4574 …ns(HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_BASE_M…
4586 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x)                   (x+0x0000039c)  argument
4587 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_PHYS(x)                   (x+0x0000039c)  argument
4590 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_IN(x)                     \  argument
4591 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_R…
4592 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_INM(x, mask)              \  argument
4593 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask) 
4594 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUT(x, val)               \  argument
4595 	out_dword( HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), val)
4596 #define HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4599 …asked_ns(HWIO_REO_R0_REO2SW3_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_MSI1_DATA…
4608 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000003a0)  argument
4609 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000003a0)  argument
4612 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4613 …in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW3_RING_HP_TP…
4614 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4615 	in_dword_masked ( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4616 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4617 	out_dword( HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4618 #define HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4621 …HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW3_RING_HP_TP_SW_OFF…
4630 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x)                    (x+0x000003a4)  argument
4631 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_PHYS(x)                    (x+0x000003a4)  argument
4634 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_IN(x)                      \  argument
4635 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_BASE_LSB_RMS…
4636 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_INM(x, mask)               \  argument
4637 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask) 
4638 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUT(x, val)                \  argument
4639 	out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), val)
4640 #define HWIO_REO_R0_REO2SW4_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
4643 …_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_BASE_LSB…
4652 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x)                    (x+0x000003a8)  argument
4653 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_PHYS(x)                    (x+0x000003a8)  argument
4656 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_IN(x)                      \  argument
4657 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_BASE_MSB_RMS…
4658 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_INM(x, mask)               \  argument
4659 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask) 
4660 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUT(x, val)                \  argument
4661 	out_dword( HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), val)
4662 #define HWIO_REO_R0_REO2SW4_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
4665 …_masked_ns(HWIO_REO_R0_REO2SW4_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_BASE_MSB…
4677 #define HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x)                          (x+0x000003ac)  argument
4678 #define HWIO_REO_R0_REO2SW4_RING_ID_PHYS(x)                          (x+0x000003ac)  argument
4681 #define HWIO_REO_R0_REO2SW4_RING_ID_IN(x)                            \  argument
4682 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), HWIO_REO_R0_REO2SW4_RING_ID_RMSK)
4683 #define HWIO_REO_R0_REO2SW4_RING_ID_INM(x, mask)                     \  argument
4684 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask) 
4685 #define HWIO_REO_R0_REO2SW4_RING_ID_OUT(x, val)                      \  argument
4686 	out_dword( HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), val)
4687 #define HWIO_REO_R0_REO2SW4_RING_ID_OUTM(x, mask, val)               \  argument
4690 …out_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_ID_IN…
4702 #define HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x)                      (x+0x000003b0)  argument
4703 #define HWIO_REO_R0_REO2SW4_RING_STATUS_PHYS(x)                      (x+0x000003b0)  argument
4706 #define HWIO_REO_R0_REO2SW4_RING_STATUS_IN(x)                        \  argument
4707 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2SW4_RING_STATUS_RMSK)
4708 #define HWIO_REO_R0_REO2SW4_RING_STATUS_INM(x, mask)                 \  argument
4709 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask) 
4710 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUT(x, val)                  \  argument
4711 	out_dword( HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), val)
4712 #define HWIO_REO_R0_REO2SW4_RING_STATUS_OUTM(x, mask, val)           \  argument
4715 …ord_masked_ns(HWIO_REO_R0_REO2SW4_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_STATUS_…
4727 #define HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x)                        (x+0x000003b4)  argument
4728 #define HWIO_REO_R0_REO2SW4_RING_MISC_PHYS(x)                        (x+0x000003b4)  argument
4731 #define HWIO_REO_R0_REO2SW4_RING_MISC_IN(x)                          \  argument
4732 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MISC_RMSK)
4733 #define HWIO_REO_R0_REO2SW4_RING_MISC_INM(x, mask)                   \  argument
4734 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask) 
4735 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUT(x, val)                    \  argument
4736 	out_dword( HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), val)
4737 #define HWIO_REO_R0_REO2SW4_RING_MISC_OUTM(x, mask, val)             \  argument
4740 …_dword_masked_ns(HWIO_REO_R0_REO2SW4_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MISC_I…
4782 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x000003b8)  argument
4783 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x000003b8)  argument
4786 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_IN(x)                   \  argument
4787 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_ADDR_L…
4788 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
4789 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask) 
4790 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
4791 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), val)
4792 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
4795 …ed_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_ADDR_LS…
4804 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x000003bc)  argument
4805 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x000003bc)  argument
4808 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_IN(x)                   \  argument
4809 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_ADDR_M…
4810 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
4811 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask) 
4812 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
4813 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), val)
4814 #define HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
4817 …ed_ns(HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_ADDR_MS…
4826 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x000003c8)  argument
4827 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x000003c8)  argument
4830 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
4831 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2SW4_RING_PR…
4832 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
4833 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
4834 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
4835 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), val)
4836 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
4839 …_REO_R0_REO2SW4_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_…
4854 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x000003cc)  argument
4855 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x000003cc)  argument
4858 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
4859 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2SW4_RING_P…
4860 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
4861 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
4862 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
4863 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), val)
4864 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
4867 …EO_R0_REO2SW4_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_INT_S…
4882 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x000003d0)  argument
4883 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x000003d0)  argument
4886 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
4887 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2SW4_RING…
4888 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
4889 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
4890 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
4891 	out_dword( HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
4892 #define HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
4895 …R0_REO2SW4_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_PRODUCER_FULL_C…
4904 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x000003ec)  argument
4905 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x000003ec)  argument
4908 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_IN(x)                 \  argument
4909 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_BA…
4910 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
4911 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask) 
4912 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
4913 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), val)
4914 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
4917 …ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_L…
4926 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x000003f0)  argument
4927 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x000003f0)  argument
4930 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_IN(x)                 \  argument
4931 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_BA…
4932 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
4933 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask) 
4934 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
4935 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), val)
4936 #define HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
4939 …ns(HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_BASE_M…
4951 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x)                   (x+0x000003f4)  argument
4952 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_PHYS(x)                   (x+0x000003f4)  argument
4955 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_IN(x)                     \  argument
4956 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_R…
4957 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_INM(x, mask)              \  argument
4958 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask) 
4959 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUT(x, val)               \  argument
4960 	out_dword( HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), val)
4961 #define HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
4964 …asked_ns(HWIO_REO_R0_REO2SW4_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_MSI1_DATA…
4973 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x000003f8)  argument
4974 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x000003f8)  argument
4977 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
4978 …in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2SW4_RING_HP_TP…
4979 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
4980 	in_dword_masked ( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
4981 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
4982 	out_dword( HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), val)
4983 #define HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
4986 …HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2SW4_RING_HP_TP_SW_OFF…
4995 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x)                    (x+0x000003fc)  argument
4996 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_PHYS(x)                    (x+0x000003fc)  argument
4999 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_IN(x)                      \  argument
5000 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_BASE_LSB_RMS…
5001 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_INM(x, mask)               \  argument
5002 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask) 
5003 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUT(x, val)                \  argument
5004 	out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), val)
5005 #define HWIO_REO_R0_REO2TCL_RING_BASE_LSB_OUTM(x, mask, val)         \  argument
5008 …_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_BASE_LSB…
5017 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x)                    (x+0x00000400)  argument
5018 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_PHYS(x)                    (x+0x00000400)  argument
5021 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_IN(x)                      \  argument
5022 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_BASE_MSB_RMS…
5023 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_INM(x, mask)               \  argument
5024 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask) 
5025 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUT(x, val)                \  argument
5026 	out_dword( HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), val)
5027 #define HWIO_REO_R0_REO2TCL_RING_BASE_MSB_OUTM(x, mask, val)         \  argument
5030 …_masked_ns(HWIO_REO_R0_REO2TCL_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_BASE_MSB…
5042 #define HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x)                          (x+0x00000404)  argument
5043 #define HWIO_REO_R0_REO2TCL_RING_ID_PHYS(x)                          (x+0x00000404)  argument
5046 #define HWIO_REO_R0_REO2TCL_RING_ID_IN(x)                            \  argument
5047 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), HWIO_REO_R0_REO2TCL_RING_ID_RMSK)
5048 #define HWIO_REO_R0_REO2TCL_RING_ID_INM(x, mask)                     \  argument
5049 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask) 
5050 #define HWIO_REO_R0_REO2TCL_RING_ID_OUT(x, val)                      \  argument
5051 	out_dword( HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), val)
5052 #define HWIO_REO_R0_REO2TCL_RING_ID_OUTM(x, mask, val)               \  argument
5055 …out_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_ID_IN…
5067 #define HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x)                      (x+0x00000408)  argument
5068 #define HWIO_REO_R0_REO2TCL_RING_STATUS_PHYS(x)                      (x+0x00000408)  argument
5071 #define HWIO_REO_R0_REO2TCL_RING_STATUS_IN(x)                        \  argument
5072 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2TCL_RING_STATUS_RMSK)
5073 #define HWIO_REO_R0_REO2TCL_RING_STATUS_INM(x, mask)                 \  argument
5074 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask) 
5075 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUT(x, val)                  \  argument
5076 	out_dword( HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), val)
5077 #define HWIO_REO_R0_REO2TCL_RING_STATUS_OUTM(x, mask, val)           \  argument
5080 …ord_masked_ns(HWIO_REO_R0_REO2TCL_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_STATUS_…
5092 #define HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x)                        (x+0x0000040c)  argument
5093 #define HWIO_REO_R0_REO2TCL_RING_MISC_PHYS(x)                        (x+0x0000040c)  argument
5096 #define HWIO_REO_R0_REO2TCL_RING_MISC_IN(x)                          \  argument
5097 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MISC_RMSK)
5098 #define HWIO_REO_R0_REO2TCL_RING_MISC_INM(x, mask)                   \  argument
5099 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask) 
5100 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUT(x, val)                    \  argument
5101 	out_dword( HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), val)
5102 #define HWIO_REO_R0_REO2TCL_RING_MISC_OUTM(x, mask, val)             \  argument
5105 …_dword_masked_ns(HWIO_REO_R0_REO2TCL_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MISC_I…
5147 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x)                 (x+0x00000410)  argument
5148 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_PHYS(x)                 (x+0x00000410)  argument
5151 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_IN(x)                   \  argument
5152 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_ADDR_L…
5153 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_INM(x, mask)            \  argument
5154 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask) 
5155 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUT(x, val)             \  argument
5156 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), val)
5157 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_OUTM(x, mask, val)      \  argument
5160 …ed_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_ADDR_LS…
5169 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x)                 (x+0x00000414)  argument
5170 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_PHYS(x)                 (x+0x00000414)  argument
5173 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_IN(x)                   \  argument
5174 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_ADDR_M…
5175 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_INM(x, mask)            \  argument
5176 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask) 
5177 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUT(x, val)             \  argument
5178 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), val)
5179 #define HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_OUTM(x, mask, val)      \  argument
5182 …ed_ns(HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_ADDR_MS…
5191 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x)          (x+0x00000420)  argument
5192 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_PHYS(x)          (x+0x00000420)  argument
5195 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_IN(x)            \  argument
5196 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2TCL_RING_PR…
5197 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_INM(x, mask)     \  argument
5198 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5199 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUT(x, val)      \  argument
5200 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5201 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5204 …_REO_R0_REO2TCL_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_…
5219 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x)         (x+0x00000424)  argument
5220 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_PHYS(x)         (x+0x00000424)  argument
5223 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_IN(x)           \  argument
5224 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2TCL_RING_P…
5225 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_INM(x, mask)    \  argument
5226 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5227 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUT(x, val)     \  argument
5228 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5229 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5232 …EO_R0_REO2TCL_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_INT_S…
5247 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x)       (x+0x00000428)  argument
5248 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_PHYS(x)       (x+0x00000428)  argument
5251 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_IN(x)         \  argument
5252 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2TCL_RING…
5253 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_INM(x, mask)  \  argument
5254 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5255 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUT(x, val)   \  argument
5256 	out_dword( HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5257 #define HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5260 …R0_REO2TCL_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_PRODUCER_FULL_C…
5269 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x)               (x+0x00000444)  argument
5270 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_PHYS(x)               (x+0x00000444)  argument
5273 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_IN(x)                 \  argument
5274 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_BA…
5275 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_INM(x, mask)          \  argument
5276 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5277 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUT(x, val)           \  argument
5278 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), val)
5279 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_OUTM(x, mask, val)    \  argument
5282 …ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_L…
5291 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x)               (x+0x00000448)  argument
5292 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_PHYS(x)               (x+0x00000448)  argument
5295 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_IN(x)                 \  argument
5296 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_BA…
5297 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_INM(x, mask)          \  argument
5298 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5299 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUT(x, val)           \  argument
5300 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), val)
5301 #define HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_OUTM(x, mask, val)    \  argument
5304 …ns(HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_BASE_M…
5316 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x)                   (x+0x0000044c)  argument
5317 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_PHYS(x)                   (x+0x0000044c)  argument
5320 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_IN(x)                     \  argument
5321 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_R…
5322 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_INM(x, mask)              \  argument
5323 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask) 
5324 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUT(x, val)               \  argument
5325 	out_dword( HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), val)
5326 #define HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_OUTM(x, mask, val)        \  argument
5329 …asked_ns(HWIO_REO_R0_REO2TCL_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_MSI1_DATA…
5338 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x)             (x+0x00000450)  argument
5339 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_PHYS(x)             (x+0x00000450)  argument
5342 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_IN(x)               \  argument
5343 …in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2TCL_RING_HP_TP…
5344 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_INM(x, mask)        \  argument
5345 	in_dword_masked ( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5346 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUT(x, val)         \  argument
5347 	out_dword( HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5348 #define HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)  \  argument
5351 …HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2TCL_RING_HP_TP_SW_OFF…
5360 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x)                     (x+0x00000454)  argument
5361 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_PHYS(x)                     (x+0x00000454)  argument
5364 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_IN(x)                       \  argument
5365 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_BASE_LSB_RMSK)
5366 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_INM(x, mask)                \  argument
5367 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask) 
5368 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUT(x, val)                 \  argument
5369 	out_dword( HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), val)
5370 #define HWIO_REO_R0_REO2FW_RING_BASE_LSB_OUTM(x, mask, val)          \  argument
5373 …d_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_BASE_LSB_…
5382 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x)                     (x+0x00000458)  argument
5383 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_PHYS(x)                     (x+0x00000458)  argument
5386 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_IN(x)                       \  argument
5387 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_BASE_MSB_RMSK)
5388 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_INM(x, mask)                \  argument
5389 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask) 
5390 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUT(x, val)                 \  argument
5391 	out_dword( HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), val)
5392 #define HWIO_REO_R0_REO2FW_RING_BASE_MSB_OUTM(x, mask, val)          \  argument
5395 …d_masked_ns(HWIO_REO_R0_REO2FW_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_BASE_MSB_…
5407 #define HWIO_REO_R0_REO2FW_RING_ID_ADDR(x)                           (x+0x0000045c)  argument
5408 #define HWIO_REO_R0_REO2FW_RING_ID_PHYS(x)                           (x+0x0000045c)  argument
5411 #define HWIO_REO_R0_REO2FW_RING_ID_IN(x)                             \  argument
5412 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), HWIO_REO_R0_REO2FW_RING_ID_RMSK)
5413 #define HWIO_REO_R0_REO2FW_RING_ID_INM(x, mask)                      \  argument
5414 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask) 
5415 #define HWIO_REO_R0_REO2FW_RING_ID_OUT(x, val)                       \  argument
5416 	out_dword( HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), val)
5417 #define HWIO_REO_R0_REO2FW_RING_ID_OUTM(x, mask, val)                \  argument
5420 …out_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_ID_IN(x…
5432 #define HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x)                       (x+0x00000460)  argument
5433 #define HWIO_REO_R0_REO2FW_RING_STATUS_PHYS(x)                       (x+0x00000460)  argument
5436 #define HWIO_REO_R0_REO2FW_RING_STATUS_IN(x)                         \  argument
5437 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), HWIO_REO_R0_REO2FW_RING_STATUS_RMSK)
5438 #define HWIO_REO_R0_REO2FW_RING_STATUS_INM(x, mask)                  \  argument
5439 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask) 
5440 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUT(x, val)                   \  argument
5441 	out_dword( HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), val)
5442 #define HWIO_REO_R0_REO2FW_RING_STATUS_OUTM(x, mask, val)            \  argument
5445 …word_masked_ns(HWIO_REO_R0_REO2FW_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_STATUS_I…
5457 #define HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x)                         (x+0x00000464)  argument
5458 #define HWIO_REO_R0_REO2FW_RING_MISC_PHYS(x)                         (x+0x00000464)  argument
5461 #define HWIO_REO_R0_REO2FW_RING_MISC_IN(x)                           \  argument
5462 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), HWIO_REO_R0_REO2FW_RING_MISC_RMSK)
5463 #define HWIO_REO_R0_REO2FW_RING_MISC_INM(x, mask)                    \  argument
5464 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask) 
5465 #define HWIO_REO_R0_REO2FW_RING_MISC_OUT(x, val)                     \  argument
5466 	out_dword( HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), val)
5467 #define HWIO_REO_R0_REO2FW_RING_MISC_OUTM(x, mask, val)              \  argument
5470 …t_dword_masked_ns(HWIO_REO_R0_REO2FW_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MISC_IN…
5512 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x)                  (x+0x00000468)  argument
5513 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_PHYS(x)                  (x+0x00000468)  argument
5516 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_IN(x)                    \  argument
5517 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB…
5518 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_INM(x, mask)             \  argument
5519 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask) 
5520 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUT(x, val)              \  argument
5521 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), val)
5522 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_OUTM(x, mask, val)       \  argument
5525 …sked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_ADDR_LS…
5534 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x)                  (x+0x0000046c)  argument
5535 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_PHYS(x)                  (x+0x0000046c)  argument
5538 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_IN(x)                    \  argument
5539 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB…
5540 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_INM(x, mask)             \  argument
5541 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask) 
5542 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUT(x, val)              \  argument
5543 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), val)
5544 #define HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_OUTM(x, mask, val)       \  argument
5547 …sked_ns(HWIO_REO_R0_REO2FW_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_ADDR_MS…
5556 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x)           (x+0x00000478)  argument
5557 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_PHYS(x)           (x+0x00000478)  argument
5560 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_IN(x)             \  argument
5561 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO2FW_RING_PROD…
5562 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_INM(x, mask)      \  argument
5563 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5564 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUT(x, val)       \  argument
5565 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5566 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5569 …O_REO_R0_REO2FW_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_S…
5584 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x)          (x+0x0000047c)  argument
5585 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_PHYS(x)          (x+0x0000047c)  argument
5588 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_IN(x)            \  argument
5589 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO2FW_RING_PRO…
5590 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_INM(x, mask)     \  argument
5591 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5592 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUT(x, val)      \  argument
5593 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5594 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5597 …_REO_R0_REO2FW_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_INT_S…
5612 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x)        (x+0x00000480)  argument
5613 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_PHYS(x)        (x+0x00000480)  argument
5616 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_IN(x)          \  argument
5617 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO2FW_RING_P…
5618 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_INM(x, mask)   \  argument
5619 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5620 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUT(x, val)    \  argument
5621 	out_dword( HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5622 #define HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5625 …O_R0_REO2FW_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_PRODUCER_FULL_C…
5634 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x)                (x+0x0000049c)  argument
5635 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_PHYS(x)                (x+0x0000049c)  argument
5638 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_IN(x)                  \  argument
5639 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_BASE…
5640 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_INM(x, mask)           \  argument
5641 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask) 
5642 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUT(x, val)            \  argument
5643 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), val)
5644 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_OUTM(x, mask, val)     \  argument
5647 …d_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_BASE_L…
5656 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x)                (x+0x000004a0)  argument
5657 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_PHYS(x)                (x+0x000004a0)  argument
5660 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_IN(x)                  \  argument
5661 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_BASE…
5662 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_INM(x, mask)           \  argument
5663 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask) 
5664 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUT(x, val)            \  argument
5665 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), val)
5666 #define HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_OUTM(x, mask, val)     \  argument
5669 …d_ns(HWIO_REO_R0_REO2FW_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_BASE_M…
5681 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x)                    (x+0x000004a4)  argument
5682 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_PHYS(x)                    (x+0x000004a4)  argument
5685 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_IN(x)                      \  argument
5686 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO2FW_RING_MSI1_DATA_RMS…
5687 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_INM(x, mask)               \  argument
5688 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask) 
5689 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUT(x, val)                \  argument
5690 	out_dword( HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), val)
5691 #define HWIO_REO_R0_REO2FW_RING_MSI1_DATA_OUTM(x, mask, val)         \  argument
5694 …_masked_ns(HWIO_REO_R0_REO2FW_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_MSI1_DATA…
5703 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x)              (x+0x000004a8)  argument
5704 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_PHYS(x)              (x+0x000004a8)  argument
5707 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_IN(x)                \  argument
5708 …in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO2FW_RING_HP_TP_S…
5709 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_INM(x, mask)         \  argument
5710 	in_dword_masked ( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
5711 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUT(x, val)          \  argument
5712 	out_dword( HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), val)
5713 #define HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val)   \  argument
5716 …s(HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO2FW_RING_HP_TP_SW_OFF…
5725 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x)                (x+0x000004ac)  argument
5726 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_PHYS(x)                (x+0x000004ac)  argument
5729 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_IN(x)                  \  argument
5730 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_BASE…
5731 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_INM(x, mask)           \  argument
5732 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask) 
5733 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUT(x, val)            \  argument
5734 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), val)
5735 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_OUTM(x, mask, val)     \  argument
5738 …d_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_BASE_L…
5747 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x)                (x+0x000004b0)  argument
5748 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_PHYS(x)                (x+0x000004b0)  argument
5751 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_IN(x)                  \  argument
5752 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_BASE…
5753 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_INM(x, mask)           \  argument
5754 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask) 
5755 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUT(x, val)            \  argument
5756 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), val)
5757 #define HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_OUTM(x, mask, val)     \  argument
5760 …d_ns(HWIO_REO_R0_REO_RELEASE_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_BASE_M…
5772 #define HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x)                      (x+0x000004b4)  argument
5773 #define HWIO_REO_R0_REO_RELEASE_RING_ID_PHYS(x)                      (x+0x000004b4)  argument
5776 #define HWIO_REO_R0_REO_RELEASE_RING_ID_IN(x)                        \  argument
5777 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_ID_RMSK)
5778 #define HWIO_REO_R0_REO_RELEASE_RING_ID_INM(x, mask)                 \  argument
5779 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask) 
5780 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUT(x, val)                  \  argument
5781 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), val)
5782 #define HWIO_REO_R0_REO_RELEASE_RING_ID_OUTM(x, mask, val)           \  argument
5785 …ord_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_ID_…
5797 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x)                  (x+0x000004b8)  argument
5798 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_PHYS(x)                  (x+0x000004b8)  argument
5801 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_IN(x)                    \  argument
5802 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_STATUS…
5803 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_INM(x, mask)             \  argument
5804 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask) 
5805 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUT(x, val)              \  argument
5806 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), val)
5807 #define HWIO_REO_R0_REO_RELEASE_RING_STATUS_OUTM(x, mask, val)       \  argument
5810 …sked_ns(HWIO_REO_R0_REO_RELEASE_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_STATU…
5822 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x)                    (x+0x000004bc)  argument
5823 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_PHYS(x)                    (x+0x000004bc)  argument
5826 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_IN(x)                      \  argument
5827 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_MISC_RMS…
5828 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_INM(x, mask)               \  argument
5829 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask) 
5830 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUT(x, val)                \  argument
5831 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), val)
5832 #define HWIO_REO_R0_REO_RELEASE_RING_MISC_OUTM(x, mask, val)         \  argument
5835 …_masked_ns(HWIO_REO_R0_REO_RELEASE_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_MISC…
5877 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x)             (x+0x000004c0)  argument
5878 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_PHYS(x)             (x+0x000004c0)  argument
5881 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_IN(x)               \  argument
5882 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_H…
5883 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_INM(x, mask)        \  argument
5884 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask) 
5885 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUT(x, val)         \  argument
5886 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), val)
5887 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_OUTM(x, mask, val)  \  argument
5890 …HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_…
5899 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x)             (x+0x000004c4)  argument
5900 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_PHYS(x)             (x+0x000004c4)  argument
5903 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_IN(x)               \  argument
5904 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_RELEASE_RING_H…
5905 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_INM(x, mask)        \  argument
5906 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask) 
5907 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUT(x, val)         \  argument
5908 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), val)
5909 #define HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_OUTM(x, mask, val)  \  argument
5912 …HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_ADDR_…
5921 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x)      (x+0x000004d0)  argument
5922 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_PHYS(x)      (x+0x000004d0)  argument
5925 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_IN(x)        \  argument
5926 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO_RELEASE…
5927 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_INM(x, mask) \  argument
5928 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
5929 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUT(x, val)  \  argument
5930 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), val)
5931 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
5934 …0_REO_RELEASE_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_IN…
5949 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x)     (x+0x000004d4)  argument
5950 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_PHYS(x)     (x+0x000004d4)  argument
5953 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_IN(x)       \  argument
5954 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_RELEAS…
5955 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
5956 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
5957 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUT(x, val) \  argument
5958 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), val)
5959 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
5962 …REO_RELEASE_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_INT…
5977 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x)   (x+0x000004d8)  argument
5978 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_PHYS(x)   (x+0x000004d8)  argument
5981 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_IN(x)     \  argument
5982 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO_RELE…
5983 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
5984 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
5985 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \  argument
5986 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
5987 #define HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
5990 …_RELEASE_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_PRODUCER_FULL…
5999 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x)         (x+0x00000500)  argument
6000 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_PHYS(x)         (x+0x00000500)  argument
6003 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_IN(x)           \  argument
6004 …in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_RELEASE_RI…
6005 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_INM(x, mask)    \  argument
6006 	in_dword_masked ( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6007 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUT(x, val)     \  argument
6008 	out_dword( HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), val)
6009 #define HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6012 …EO_R0_REO_RELEASE_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_RELEASE_RING_HP_TP_SW_O…
6021 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x)                 (x+0x00000504)  argument
6022 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_PHYS(x)                 (x+0x00000504)  argument
6025 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_IN(x)                   \  argument
6026 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_BASE_L…
6027 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_INM(x, mask)            \  argument
6028 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask) 
6029 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUT(x, val)             \  argument
6030 	out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), val)
6031 #define HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_OUTM(x, mask, val)      \  argument
6034 …ed_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_BASE_LS…
6043 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x)                 (x+0x00000508)  argument
6044 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_PHYS(x)                 (x+0x00000508)  argument
6047 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_IN(x)                   \  argument
6048 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_BASE_M…
6049 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_INM(x, mask)            \  argument
6050 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask) 
6051 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUT(x, val)             \  argument
6052 	out_dword( HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), val)
6053 #define HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_OUTM(x, mask, val)      \  argument
6056 …ed_ns(HWIO_REO_R0_REO_STATUS_RING_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_BASE_MS…
6068 #define HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x)                       (x+0x0000050c)  argument
6069 #define HWIO_REO_R0_REO_STATUS_RING_ID_PHYS(x)                       (x+0x0000050c)  argument
6072 #define HWIO_REO_R0_REO_STATUS_RING_ID_IN(x)                         \  argument
6073 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_ID_RMSK)
6074 #define HWIO_REO_R0_REO_STATUS_RING_ID_INM(x, mask)                  \  argument
6075 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask) 
6076 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUT(x, val)                   \  argument
6077 	out_dword( HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), val)
6078 #define HWIO_REO_R0_REO_STATUS_RING_ID_OUTM(x, mask, val)            \  argument
6081 …word_masked_ns(HWIO_REO_R0_REO_STATUS_RING_ID_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_ID_I…
6093 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x)                   (x+0x00000510)  argument
6094 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_PHYS(x)                   (x+0x00000510)  argument
6097 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_IN(x)                     \  argument
6098 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_STATUS_R…
6099 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_INM(x, mask)              \  argument
6100 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask) 
6101 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUT(x, val)               \  argument
6102 	out_dword( HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), val)
6103 #define HWIO_REO_R0_REO_STATUS_RING_STATUS_OUTM(x, mask, val)        \  argument
6106 …asked_ns(HWIO_REO_R0_REO_STATUS_RING_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_STATUS…
6118 #define HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x)                     (x+0x00000514)  argument
6119 #define HWIO_REO_R0_REO_STATUS_RING_MISC_PHYS(x)                     (x+0x00000514)  argument
6122 #define HWIO_REO_R0_REO_STATUS_RING_MISC_IN(x)                       \  argument
6123 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_MISC_RMSK)
6124 #define HWIO_REO_R0_REO_STATUS_RING_MISC_INM(x, mask)                \  argument
6125 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask) 
6126 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUT(x, val)                 \  argument
6127 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), val)
6128 #define HWIO_REO_R0_REO_STATUS_RING_MISC_OUTM(x, mask, val)          \  argument
6131 …d_masked_ns(HWIO_REO_R0_REO_STATUS_RING_MISC_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MISC_…
6173 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x)              (x+0x00000518)  argument
6174 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_PHYS(x)              (x+0x00000518)  argument
6177 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_IN(x)                \  argument
6178 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_HP_…
6179 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_INM(x, mask)         \  argument
6180 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask) 
6181 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUT(x, val)          \  argument
6182 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), val)
6183 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_OUTM(x, mask, val)   \  argument
6186 …s(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_…
6195 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x)              (x+0x0000051c)  argument
6196 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_PHYS(x)              (x+0x0000051c)  argument
6199 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_IN(x)                \  argument
6200 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_HP_…
6201 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_INM(x, mask)         \  argument
6202 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask) 
6203 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUT(x, val)          \  argument
6204 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), val)
6205 #define HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_OUTM(x, mask, val)   \  argument
6208 …s(HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_ADDR_…
6217 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x)       (x+0x00000528)  argument
6218 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_PHYS(x)       (x+0x00000528)  argument
6221 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_IN(x)         \  argument
6222 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), HWIO_REO_R0_REO_STATUS_R…
6223 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_INM(x, mask)  \  argument
6224 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask) 
6225 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUT(x, val)   \  argument
6226 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), val)
6227 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_SETUP_OUTM(x, mask, val) \  argument
6230 …R0_REO_STATUS_RING_PRODUCER_INT_SETUP_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT…
6245 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x)      (x+0x0000052c)  argument
6246 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_PHYS(x)      (x+0x0000052c)  argument
6249 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_IN(x)        \  argument
6250 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), HWIO_REO_R0_REO_STATUS_…
6251 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_INM(x, mask) \  argument
6252 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask) 
6253 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUT(x, val)  \  argument
6254 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), val)
6255 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT_STATUS_OUTM(x, mask, val) \  argument
6258 …0_REO_STATUS_RING_PRODUCER_INT_STATUS_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_INT…
6273 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x)    (x+0x00000530)  argument
6274 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_PHYS(x)    (x+0x00000530)  argument
6277 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_IN(x)      \  argument
6278 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), HWIO_REO_R0_REO_STATU…
6279 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_INM(x, mask) \  argument
6280 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask) 
6281 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUT(x, val) \  argument
6282 	out_dword( HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), val)
6283 #define HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL_COUNTER_OUTM(x, mask, val) \  argument
6286 …EO_STATUS_RING_PRODUCER_FULL_COUNTER_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_PRODUCER_FULL…
6295 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x)            (x+0x0000054c)  argument
6296 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_PHYS(x)            (x+0x0000054c)  argument
6299 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_IN(x)              \  argument
6300 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_M…
6301 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_INM(x, mask)       \  argument
6302 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask) 
6303 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUT(x, val)        \  argument
6304 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), val)
6305 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_OUTM(x, mask, val) \  argument
6308 …WIO_REO_R0_REO_STATUS_RING_MSI1_BASE_LSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE…
6317 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x)            (x+0x00000550)  argument
6318 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_PHYS(x)            (x+0x00000550)  argument
6321 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_IN(x)              \  argument
6322 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_M…
6323 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_INM(x, mask)       \  argument
6324 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask) 
6325 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUT(x, val)        \  argument
6326 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), val)
6327 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_OUTM(x, mask, val) \  argument
6330 …WIO_REO_R0_REO_STATUS_RING_MSI1_BASE_MSB_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_BASE…
6342 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x)                (x+0x00000554)  argument
6343 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_PHYS(x)                (x+0x00000554)  argument
6346 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_IN(x)                  \  argument
6347 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), HWIO_REO_R0_REO_STATUS_RING_MSI1_…
6348 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_INM(x, mask)           \  argument
6349 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask) 
6350 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUT(x, val)            \  argument
6351 	out_dword( HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), val)
6352 #define HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_OUTM(x, mask, val)     \  argument
6355 …d_ns(HWIO_REO_R0_REO_STATUS_RING_MSI1_DATA_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_MSI1_DA…
6364 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x)          (x+0x00000558)  argument
6365 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_PHYS(x)          (x+0x00000558)  argument
6368 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_IN(x)            \  argument
6369 …in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), HWIO_REO_R0_REO_STATUS_RING…
6370 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_INM(x, mask)     \  argument
6371 	in_dword_masked ( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask) 
6372 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUT(x, val)      \  argument
6373 	out_dword( HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), val)
6374 #define HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_OUTM(x, mask, val) \  argument
6377 …_REO_R0_REO_STATUS_RING_HP_TP_SW_OFFSET_ADDR(x), mask, val, HWIO_REO_R0_REO_STATUS_RING_HP_TP_SW_O…
6386 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x)                         (x+0x0000055c)  argument
6387 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_PHYS(x)                         (x+0x0000055c)  argument
6390 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_IN(x)                           \  argument
6391 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), HWIO_REO_R0_WATCHDOG_TIMEOUT_RMSK)
6392 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_INM(x, mask)                    \  argument
6393 	in_dword_masked ( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask) 
6394 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUT(x, val)                     \  argument
6395 	out_dword( HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), val)
6396 #define HWIO_REO_R0_WATCHDOG_TIMEOUT_OUTM(x, mask, val)              \  argument
6399 …t_dword_masked_ns(HWIO_REO_R0_WATCHDOG_TIMEOUT_ADDR(x), mask, val, HWIO_REO_R0_WATCHDOG_TIMEOUT_IN…
6408 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x)              (x+0x00000560)  argument
6409 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_PHYS(x)              (x+0x00000560)  argument
6412 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_IN(x)                \  argument
6413 …in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), HWIO_REO_R0_INTERRUPT_DATA_CAPT…
6414 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_INM(x, mask)         \  argument
6415 	in_dword_masked ( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask) 
6416 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUT(x, val)          \  argument
6417 	out_dword( HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), val)
6418 #define HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_OUTM(x, mask, val)   \  argument
6421 …s(HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_INTERRUPT_DATA_CAPTURE_I…
6430 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x)                     (x+0x00000564)  argument
6431 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_PHYS(x)                     (x+0x00000564)  argument
6434 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_IN(x)                       \  argument
6435 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_0_RMSK)
6436 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_INM(x, mask)                \  argument
6437 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask) 
6438 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUT(x, val)                 \  argument
6439 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), val)
6440 #define HWIO_REO_R0_AGING_THRESHOLD_IX_0_OUTM(x, mask, val)          \  argument
6443 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_0_…
6452 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x)                     (x+0x00000568)  argument
6453 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_PHYS(x)                     (x+0x00000568)  argument
6456 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_IN(x)                       \  argument
6457 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_1_RMSK)
6458 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_INM(x, mask)                \  argument
6459 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask) 
6460 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUT(x, val)                 \  argument
6461 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), val)
6462 #define HWIO_REO_R0_AGING_THRESHOLD_IX_1_OUTM(x, mask, val)          \  argument
6465 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_1_…
6474 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x)                     (x+0x0000056c)  argument
6475 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_PHYS(x)                     (x+0x0000056c)  argument
6478 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_IN(x)                       \  argument
6479 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_2_RMSK)
6480 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_INM(x, mask)                \  argument
6481 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask) 
6482 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUT(x, val)                 \  argument
6483 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), val)
6484 #define HWIO_REO_R0_AGING_THRESHOLD_IX_2_OUTM(x, mask, val)          \  argument
6487 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_2_…
6496 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x)                     (x+0x00000570)  argument
6497 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_PHYS(x)                     (x+0x00000570)  argument
6500 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_IN(x)                       \  argument
6501 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), HWIO_REO_R0_AGING_THRESHOLD_IX_3_RMSK)
6502 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_INM(x, mask)                \  argument
6503 	in_dword_masked ( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask) 
6504 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUT(x, val)                 \  argument
6505 	out_dword( HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), val)
6506 #define HWIO_REO_R0_AGING_THRESHOLD_IX_3_OUTM(x, mask, val)          \  argument
6509 …d_masked_ns(HWIO_REO_R0_AGING_THRESHOLD_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_THRESHOLD_IX_3_…
6518 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x)               (x+0x00000574)  argument
6519 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_PHYS(x)               (x+0x00000574)  argument
6522 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_IN(x)                 \  argument
6523 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6524 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_INM(x, mask)          \  argument
6525 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask) 
6526 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUT(x, val)           \  argument
6527 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), val)
6528 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6531 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6540 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x)               (x+0x00000578)  argument
6541 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_PHYS(x)               (x+0x00000578)  argument
6544 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_IN(x)                 \  argument
6545 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6546 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_INM(x, mask)          \  argument
6547 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask) 
6548 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUT(x, val)           \  argument
6549 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), val)
6550 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6553 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6562 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x)               (x+0x0000057c)  argument
6563 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_PHYS(x)               (x+0x0000057c)  argument
6566 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_IN(x)                 \  argument
6567 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6568 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_INM(x, mask)          \  argument
6569 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask) 
6570 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUT(x, val)           \  argument
6571 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), val)
6572 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_OUTM(x, mask, val)    \  argument
6575 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6584 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x)               (x+0x00000580)  argument
6585 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_PHYS(x)               (x+0x00000580)  argument
6588 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_IN(x)                 \  argument
6589 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6590 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_INM(x, mask)          \  argument
6591 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask) 
6592 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUT(x, val)           \  argument
6593 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), val)
6594 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_OUTM(x, mask, val)    \  argument
6597 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6606 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x)               (x+0x00000584)  argument
6607 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_PHYS(x)               (x+0x00000584)  argument
6610 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_IN(x)                 \  argument
6611 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6612 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_INM(x, mask)          \  argument
6613 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask) 
6614 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUT(x, val)           \  argument
6615 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), val)
6616 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6619 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6628 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x)               (x+0x00000588)  argument
6629 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_PHYS(x)               (x+0x00000588)  argument
6632 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_IN(x)                 \  argument
6633 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6634 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_INM(x, mask)          \  argument
6635 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask) 
6636 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUT(x, val)           \  argument
6637 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), val)
6638 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6641 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6650 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x)               (x+0x0000058c)  argument
6651 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_PHYS(x)               (x+0x0000058c)  argument
6654 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_IN(x)                 \  argument
6655 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6656 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_INM(x, mask)          \  argument
6657 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask) 
6658 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUT(x, val)           \  argument
6659 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), val)
6660 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_OUTM(x, mask, val)    \  argument
6663 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6672 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x)               (x+0x00000590)  argument
6673 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_PHYS(x)               (x+0x00000590)  argument
6676 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_IN(x)                 \  argument
6677 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6678 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_INM(x, mask)          \  argument
6679 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask) 
6680 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUT(x, val)           \  argument
6681 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), val)
6682 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_OUTM(x, mask, val)    \  argument
6685 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6694 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x)               (x+0x00000594)  argument
6695 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_PHYS(x)               (x+0x00000594)  argument
6698 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_IN(x)                 \  argument
6699 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6700 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_INM(x, mask)          \  argument
6701 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask) 
6702 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUT(x, val)           \  argument
6703 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), val)
6704 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6707 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6716 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x)               (x+0x00000598)  argument
6717 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_PHYS(x)               (x+0x00000598)  argument
6720 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_IN(x)                 \  argument
6721 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6722 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_INM(x, mask)          \  argument
6723 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask) 
6724 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUT(x, val)           \  argument
6725 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), val)
6726 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6729 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6738 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x)               (x+0x0000059c)  argument
6739 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_PHYS(x)               (x+0x0000059c)  argument
6742 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_IN(x)                 \  argument
6743 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6744 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_INM(x, mask)          \  argument
6745 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask) 
6746 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUT(x, val)           \  argument
6747 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), val)
6748 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_OUTM(x, mask, val)    \  argument
6751 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6760 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x)               (x+0x000005a0)  argument
6761 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_PHYS(x)               (x+0x000005a0)  argument
6764 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_IN(x)                 \  argument
6765 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6766 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_INM(x, mask)          \  argument
6767 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask) 
6768 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUT(x, val)           \  argument
6769 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), val)
6770 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_OUTM(x, mask, val)    \  argument
6773 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6782 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x)               (x+0x000005a4)  argument
6783 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_PHYS(x)               (x+0x000005a4)  argument
6786 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_IN(x)                 \  argument
6787 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_L…
6788 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_INM(x, mask)          \  argument
6789 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask) 
6790 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUT(x, val)           \  argument
6791 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), val)
6792 #define HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6795 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_LO_IX…
6804 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x)               (x+0x000005a8)  argument
6805 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_PHYS(x)               (x+0x000005a8)  argument
6808 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_IN(x)                 \  argument
6809 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_HEADPTR_H…
6810 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_INM(x, mask)          \  argument
6811 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask) 
6812 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUT(x, val)           \  argument
6813 	out_dword( HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), val)
6814 #define HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6817 …ns(HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_HEADPTR_HI_IX…
6826 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x)               (x+0x000005ac)  argument
6827 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_PHYS(x)               (x+0x000005ac)  argument
6830 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_IN(x)                 \  argument
6831 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_L…
6832 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_INM(x, mask)          \  argument
6833 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask) 
6834 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUT(x, val)           \  argument
6835 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), val)
6836 #define HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_OUTM(x, mask, val)    \  argument
6839 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_LO_IX…
6848 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x)               (x+0x000005b0)  argument
6849 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_PHYS(x)               (x+0x000005b0)  argument
6852 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_IN(x)                 \  argument
6853 …in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), HWIO_REO_R0_AGING_LINK_TAILPTR_H…
6854 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_INM(x, mask)          \  argument
6855 	in_dword_masked ( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask) 
6856 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUT(x, val)           \  argument
6857 	out_dword( HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), val)
6858 #define HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_OUTM(x, mask, val)    \  argument
6861 …ns(HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_LINK_TAILPTR_HI_IX…
6870 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x)                    (x+0x000005b4)  argument
6871 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_PHYS(x)                    (x+0x000005b4)  argument
6874 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_IN(x)                      \  argument
6875 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_RMS…
6876 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_INM(x, mask)               \  argument
6877 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask) 
6878 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUT(x, val)                \  argument
6879 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), val)
6880 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_OUTM(x, mask, val)         \  argument
6883 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_0…
6892 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x)                    (x+0x000005b8)  argument
6893 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_PHYS(x)                    (x+0x000005b8)  argument
6896 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_IN(x)                      \  argument
6897 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_RMS…
6898 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_INM(x, mask)               \  argument
6899 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask) 
6900 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUT(x, val)                \  argument
6901 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), val)
6902 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_OUTM(x, mask, val)         \  argument
6905 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_1…
6914 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x)                    (x+0x000005bc)  argument
6915 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_PHYS(x)                    (x+0x000005bc)  argument
6918 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_IN(x)                      \  argument
6919 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_RMS…
6920 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_INM(x, mask)               \  argument
6921 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask) 
6922 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUT(x, val)                \  argument
6923 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), val)
6924 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_OUTM(x, mask, val)         \  argument
6927 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_2…
6936 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x)                    (x+0x000005c0)  argument
6937 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_PHYS(x)                    (x+0x000005c0)  argument
6940 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_IN(x)                      \  argument
6941 …in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_RMS…
6942 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_INM(x, mask)               \  argument
6943 	in_dword_masked ( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask) 
6944 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUT(x, val)                \  argument
6945 	out_dword( HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), val)
6946 #define HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_OUTM(x, mask, val)         \  argument
6949 …_masked_ns(HWIO_REO_R0_AGING_NUM_QUEUES_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_NUM_QUEUES_IX_3…
6958 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x)                     (x+0x000005c4)  argument
6959 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_PHYS(x)                     (x+0x000005c4)  argument
6962 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_IN(x)                       \  argument
6963 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_0_RMSK)
6964 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_INM(x, mask)                \  argument
6965 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask) 
6966 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUT(x, val)                 \  argument
6967 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), val)
6968 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_0_OUTM(x, mask, val)          \  argument
6971 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_0_…
6980 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x)                     (x+0x000005c8)  argument
6981 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_PHYS(x)                     (x+0x000005c8)  argument
6984 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_IN(x)                       \  argument
6985 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_1_RMSK)
6986 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_INM(x, mask)                \  argument
6987 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask) 
6988 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUT(x, val)                 \  argument
6989 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), val)
6990 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_1_OUTM(x, mask, val)          \  argument
6993 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_1_…
7002 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x)                     (x+0x000005cc)  argument
7003 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_PHYS(x)                     (x+0x000005cc)  argument
7006 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_IN(x)                       \  argument
7007 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_2_RMSK)
7008 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_INM(x, mask)                \  argument
7009 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask) 
7010 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUT(x, val)                 \  argument
7011 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), val)
7012 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_2_OUTM(x, mask, val)          \  argument
7015 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_2_…
7024 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x)                     (x+0x000005d0)  argument
7025 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_PHYS(x)                     (x+0x000005d0)  argument
7028 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_IN(x)                       \  argument
7029 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), HWIO_REO_R0_AGING_TIMESTAMP_IX_3_RMSK)
7030 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_INM(x, mask)                \  argument
7031 	in_dword_masked ( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask) 
7032 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUT(x, val)                 \  argument
7033 	out_dword( HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), val)
7034 #define HWIO_REO_R0_AGING_TIMESTAMP_IX_3_OUTM(x, mask, val)          \  argument
7037 …d_masked_ns(HWIO_REO_R0_AGING_TIMESTAMP_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AGING_TIMESTAMP_IX_3_…
7046 #define HWIO_REO_R0_AGING_CONTROL_ADDR(x)                            (x+0x000005d4)  argument
7047 #define HWIO_REO_R0_AGING_CONTROL_PHYS(x)                            (x+0x000005d4)  argument
7050 #define HWIO_REO_R0_AGING_CONTROL_IN(x)                              \  argument
7051 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), HWIO_REO_R0_AGING_CONTROL_RMSK)
7052 #define HWIO_REO_R0_AGING_CONTROL_INM(x, mask)                       \  argument
7053 	in_dword_masked ( HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask) 
7054 #define HWIO_REO_R0_AGING_CONTROL_OUT(x, val)                        \  argument
7055 	out_dword( HWIO_REO_R0_AGING_CONTROL_ADDR(x), val)
7056 #define HWIO_REO_R0_AGING_CONTROL_OUTM(x, mask, val)                 \  argument
7059 …out_dword_masked_ns(HWIO_REO_R0_AGING_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_AGING_CONTROL_IN(x))…
7068 #define HWIO_REO_R0_MISC_CTL_ADDR(x)                                 (x+0x000005d8)  argument
7069 #define HWIO_REO_R0_MISC_CTL_PHYS(x)                                 (x+0x000005d8)  argument
7072 #define HWIO_REO_R0_MISC_CTL_IN(x)                                   \  argument
7073 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), HWIO_REO_R0_MISC_CTL_RMSK)
7074 #define HWIO_REO_R0_MISC_CTL_INM(x, mask)                            \  argument
7075 	in_dword_masked ( HWIO_REO_R0_MISC_CTL_ADDR(x), mask) 
7076 #define HWIO_REO_R0_MISC_CTL_OUT(x, val)                             \  argument
7077 	out_dword( HWIO_REO_R0_MISC_CTL_ADDR(x), val)
7078 #define HWIO_REO_R0_MISC_CTL_OUTM(x, mask, val)                      \  argument
7081 		out_dword_masked_ns(HWIO_REO_R0_MISC_CTL_ADDR(x), mask, val, HWIO_REO_R0_MISC_CTL_IN(x)); \
7093 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x)                    (x+0x000005dc)  argument
7094 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_PHYS(x)                    (x+0x000005dc)  argument
7097 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_IN(x)                      \  argument
7098 …in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_RMS…
7099 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_INM(x, mask)               \  argument
7100 	in_dword_masked ( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask) 
7101 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUT(x, val)                \  argument
7102 	out_dword( HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), val)
7103 #define HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_OUTM(x, mask, val)         \  argument
7106 …_masked_ns(HWIO_REO_R0_HIGH_MEMORY_THRESHOLD_ADDR(x), mask, val, HWIO_REO_R0_HIGH_MEMORY_THRESHOLD…
7115 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x)                     (x+0x000005e0)  argument
7116 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_PHYS(x)                     (x+0x000005e0)  argument
7119 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_IN(x)                       \  argument
7120 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_0_RMSK)
7121 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_INM(x, mask)                \  argument
7122 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask) 
7123 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUT(x, val)                 \  argument
7124 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), val)
7125 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_0_OUTM(x, mask, val)          \  argument
7128 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_0_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_0_…
7137 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x)                     (x+0x000005e4)  argument
7138 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_PHYS(x)                     (x+0x000005e4)  argument
7141 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_IN(x)                       \  argument
7142 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_1_RMSK)
7143 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_INM(x, mask)                \  argument
7144 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask) 
7145 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUT(x, val)                 \  argument
7146 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), val)
7147 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_1_OUTM(x, mask, val)          \  argument
7150 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_1_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_1_…
7159 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x)                     (x+0x000005e8)  argument
7160 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_PHYS(x)                     (x+0x000005e8)  argument
7163 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_IN(x)                       \  argument
7164 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_2_RMSK)
7165 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_INM(x, mask)                \  argument
7166 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask) 
7167 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUT(x, val)                 \  argument
7168 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), val)
7169 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_2_OUTM(x, mask, val)          \  argument
7172 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_2_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_2_…
7181 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x)                     (x+0x000005ec)  argument
7182 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_PHYS(x)                     (x+0x000005ec)  argument
7185 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_IN(x)                       \  argument
7186 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), HWIO_REO_R0_AC_BUFFERS_USED_IX_3_RMSK)
7187 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_INM(x, mask)                \  argument
7188 	in_dword_masked ( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask) 
7189 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUT(x, val)                 \  argument
7190 	out_dword( HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), val)
7191 #define HWIO_REO_R0_AC_BUFFERS_USED_IX_3_OUTM(x, mask, val)          \  argument
7194 …d_masked_ns(HWIO_REO_R0_AC_BUFFERS_USED_IX_3_ADDR(x), mask, val, HWIO_REO_R0_AC_BUFFERS_USED_IX_3_…
7203 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x)       (x+0x000005f0)  argument
7204 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_PHYS(x)       (x+0x000005f0)  argument
7207 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_IN(x)         \  argument
7208 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
7209 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_INM(x, mask)  \  argument
7210 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask) 
7211 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUT(x, val)   \  argument
7212 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), val)
7213 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_OUTM(x, mask, val) \  argument
7216 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7225 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x)       (x+0x000005f4)  argument
7226 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_PHYS(x)       (x+0x000005f4)  argument
7229 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_IN(x)         \  argument
7230 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
7231 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_INM(x, mask)  \  argument
7232 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask) 
7233 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUT(x, val)   \  argument
7234 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), val)
7235 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_OUTM(x, mask, val) \  argument
7238 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7247 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x)       (x+0x000005f8)  argument
7248 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_PHYS(x)       (x+0x000005f8)  argument
7251 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_IN(x)         \  argument
7252 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_…
7253 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_INM(x, mask)  \  argument
7254 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask) 
7255 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUT(x, val)   \  argument
7256 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), val)
7257 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_OUTM(x, mask, val) \  argument
7260 …R0_GLOBAL_LINK_DESC_COUNT_THRESH_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7269 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x)      (x+0x000005fc)  argument
7270 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_PHYS(x)      (x+0x000005fc)  argument
7273 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_IN(x)        \  argument
7274 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), HWIO_REO_R0_GLOBAL_LINK…
7275 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_INM(x, mask) \  argument
7276 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask) 
7277 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUT(x, val)  \  argument
7278 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), val)
7279 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_OUTM(x, mask, val) \  argument
7282 …0_GLOBAL_LINK_DESC_COUNT_THRESH_TOTAL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_THRES…
7291 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x)              (x+0x00000600)  argument
7292 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_PHYS(x)              (x+0x00000600)  argument
7295 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_IN(x)                \  argument
7296 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7297 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_INM(x, mask)         \  argument
7298 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask) 
7299 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUT(x, val)          \  argument
7300 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), val)
7301 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_OUTM(x, mask, val)   \  argument
7304 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
7313 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x)              (x+0x00000604)  argument
7314 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_PHYS(x)              (x+0x00000604)  argument
7317 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_IN(x)                \  argument
7318 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7319 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_INM(x, mask)         \  argument
7320 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask) 
7321 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUT(x, val)          \  argument
7322 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), val)
7323 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_OUTM(x, mask, val)   \  argument
7326 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
7335 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x)              (x+0x00000608)  argument
7336 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_PHYS(x)              (x+0x00000608)  argument
7339 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_IN(x)                \  argument
7340 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7341 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_INM(x, mask)         \  argument
7342 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask) 
7343 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUT(x, val)          \  argument
7344 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), val)
7345 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_OUTM(x, mask, val)   \  argument
7348 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_IX_2_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_I…
7357 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x)              (x+0x0000060c)  argument
7358 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_PHYS(x)              (x+0x0000060c)  argument
7361 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_IN(x)                \  argument
7362 …in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), HWIO_REO_R0_GLOBAL_LINK_DESC_CO…
7363 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_INM(x, mask)         \  argument
7364 	in_dword_masked ( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask) 
7365 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUT(x, val)          \  argument
7366 	out_dword( HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), val)
7367 #define HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_OUTM(x, mask, val)   \  argument
7370 …s(HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GLOBAL_LINK_DESC_COUNT_C…
7379 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x)            (x+0x00000610)  argument
7380 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_PHYS(x)            (x+0x00000610)  argument
7383 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_IN(x)              \  argument
7384 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7385 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_INM(x, mask)       \  argument
7386 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask) 
7387 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUT(x, val)        \  argument
7388 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), val)
7389 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_OUTM(x, mask, val) \  argument
7392 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7401 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x)            (x+0x00000614)  argument
7402 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_PHYS(x)            (x+0x00000614)  argument
7405 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_IN(x)              \  argument
7406 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7407 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_INM(x, mask)       \  argument
7408 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask) 
7409 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUT(x, val)        \  argument
7410 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), val)
7411 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_OUTM(x, mask, val) \  argument
7414 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_0_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7423 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x)            (x+0x00000618)  argument
7424 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_PHYS(x)            (x+0x00000618)  argument
7427 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_IN(x)              \  argument
7428 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7429 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_INM(x, mask)       \  argument
7430 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask) 
7431 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUT(x, val)        \  argument
7432 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), val)
7433 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_OUTM(x, mask, val) \  argument
7436 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7445 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x)            (x+0x0000061c)  argument
7446 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_PHYS(x)            (x+0x0000061c)  argument
7449 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_IN(x)              \  argument
7450 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7451 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_INM(x, mask)       \  argument
7452 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask) 
7453 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUT(x, val)        \  argument
7454 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), val)
7455 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_OUTM(x, mask, val) \  argument
7458 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_1_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7467 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x)            (x+0x00000620)  argument
7468 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_PHYS(x)            (x+0x00000620)  argument
7471 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_IN(x)              \  argument
7472 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7473 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_INM(x, mask)       \  argument
7474 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask) 
7475 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUT(x, val)        \  argument
7476 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), val)
7477 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_OUTM(x, mask, val) \  argument
7480 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7489 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x)            (x+0x00000624)  argument
7490 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_PHYS(x)            (x+0x00000624)  argument
7493 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_IN(x)              \  argument
7494 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7495 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_INM(x, mask)       \  argument
7496 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask) 
7497 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUT(x, val)        \  argument
7498 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), val)
7499 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_OUTM(x, mask, val) \  argument
7502 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_2_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7511 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x)            (x+0x00000628)  argument
7512 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_PHYS(x)            (x+0x00000628)  argument
7515 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_IN(x)              \  argument
7516 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7517 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_INM(x, mask)       \  argument
7518 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask) 
7519 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUT(x, val)        \  argument
7520 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), val)
7521 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_OUTM(x, mask, val) \  argument
7524 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_LO_…
7533 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x)            (x+0x0000062c)  argument
7534 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_PHYS(x)            (x+0x0000062c)  argument
7537 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_IN(x)              \  argument
7538 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_…
7539 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_INM(x, mask)       \  argument
7540 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask) 
7541 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUT(x, val)        \  argument
7542 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), val)
7543 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_OUTM(x, mask, val) \  argument
7546 …WIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_IX_3_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_ADDR_HI_…
7555 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x)                    (x+0x00000630)  argument
7556 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_PHYS(x)                    (x+0x00000630)  argument
7559 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_IN(x)                      \  argument
7560 …in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_RMS…
7561 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_INM(x, mask)               \  argument
7562 	in_dword_masked ( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask) 
7563 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUT(x, val)                \  argument
7564 	out_dword( HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), val)
7565 #define HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_OUTM(x, mask, val)         \  argument
7568 …_masked_ns(HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO_ADDR(x), mask, val, HWIO_REO_R0_QUEUE_DESC_BLOCK_INFO…
7580 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x)                        (x+0x00000634)  argument
7581 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_PHYS(x)                        (x+0x00000634)  argument
7584 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_IN(x)                          \  argument
7585 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), HWIO_REO_R0_GXI_TESTBUS_LOWER_RMSK)
7586 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_INM(x, mask)                   \  argument
7587 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask) 
7588 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUT(x, val)                    \  argument
7589 	out_dword( HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), val)
7590 #define HWIO_REO_R0_GXI_TESTBUS_LOWER_OUTM(x, mask, val)             \  argument
7593 …_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_LOWER_I…
7602 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x)                        (x+0x00000638)  argument
7603 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_PHYS(x)                        (x+0x00000638)  argument
7606 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_IN(x)                          \  argument
7607 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), HWIO_REO_R0_GXI_TESTBUS_UPPER_RMSK)
7608 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_INM(x, mask)                   \  argument
7609 	in_dword_masked ( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask) 
7610 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUT(x, val)                    \  argument
7611 	out_dword( HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), val)
7612 #define HWIO_REO_R0_GXI_TESTBUS_UPPER_OUTM(x, mask, val)             \  argument
7615 …_dword_masked_ns(HWIO_REO_R0_GXI_TESTBUS_UPPER_ADDR(x), mask, val, HWIO_REO_R0_GXI_TESTBUS_UPPER_I…
7624 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x)                       (x+0x0000063c)  argument
7625 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_PHYS(x)                       (x+0x0000063c)  argument
7628 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_IN(x)                         \  argument
7629 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), HWIO_REO_R0_GXI_SM_STATES_IX_0_RMSK)
7630 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_INM(x, mask)                  \  argument
7631 	in_dword_masked ( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask) 
7632 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUT(x, val)                   \  argument
7633 	out_dword( HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), val)
7634 #define HWIO_REO_R0_GXI_SM_STATES_IX_0_OUTM(x, mask, val)            \  argument
7637 …word_masked_ns(HWIO_REO_R0_GXI_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_SM_STATES_IX_0_I…
7652 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x)                    (x+0x00000640)  argument
7653 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_PHYS(x)                    (x+0x00000640)  argument
7656 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_IN(x)                      \  argument
7657 …in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R0_GXI_END_OF_TEST_CHECK_RMS…
7658 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_INM(x, mask)               \  argument
7659 	in_dword_masked ( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask) 
7660 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUT(x, val)                \  argument
7661 	out_dword( HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), val)
7662 #define HWIO_REO_R0_GXI_END_OF_TEST_CHECK_OUTM(x, mask, val)         \  argument
7665 …_masked_ns(HWIO_REO_R0_GXI_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R0_GXI_END_OF_TEST_CHECK…
7674 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x)                   (x+0x00000644)  argument
7675 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_PHYS(x)                   (x+0x00000644)  argument
7678 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_IN(x)                     \  argument
7679 …in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_R…
7680 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_INM(x, mask)              \  argument
7681 	in_dword_masked ( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask) 
7682 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUT(x, val)               \  argument
7683 	out_dword( HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), val)
7684 #define HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_OUTM(x, mask, val)        \  argument
7687 …asked_ns(HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE_ADDR(x), mask, val, HWIO_REO_R0_GXI_CLOCK_GATE_DISABLE…
7732 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x)                         (x+0x00000648)  argument
7733 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_PHYS(x)                         (x+0x00000648)  argument
7736 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_IN(x)                           \  argument
7737 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), HWIO_REO_R0_GXI_GXI_ERR_INTS_RMSK)
7738 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_INM(x, mask)                    \  argument
7739 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask) 
7740 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUT(x, val)                     \  argument
7741 	out_dword( HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), val)
7742 #define HWIO_REO_R0_GXI_GXI_ERR_INTS_OUTM(x, mask, val)              \  argument
7745 …t_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_INTS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_INTS_IN…
7763 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x)                        (x+0x0000064c)  argument
7764 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_PHYS(x)                        (x+0x0000064c)  argument
7767 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_IN(x)                          \  argument
7768 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), HWIO_REO_R0_GXI_GXI_ERR_STATS_RMSK)
7769 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_INM(x, mask)                   \  argument
7770 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask) 
7771 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUT(x, val)                    \  argument
7772 	out_dword( HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), val)
7773 #define HWIO_REO_R0_GXI_GXI_ERR_STATS_OUTM(x, mask, val)             \  argument
7776 …_dword_masked_ns(HWIO_REO_R0_GXI_GXI_ERR_STATS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_ERR_STATS_I…
7791 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x)                  (x+0x00000650)  argument
7792 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_PHYS(x)                  (x+0x00000650)  argument
7795 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_IN(x)                    \  argument
7796 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL…
7797 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_INM(x, mask)             \  argument
7798 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask) 
7799 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUT(x, val)              \  argument
7800 	out_dword( HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), val)
7801 #define HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_OUTM(x, mask, val)       \  argument
7804 …sked_ns(HWIO_REO_R0_GXI_GXI_DEFAULT_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_DEFAULT_CONTRO…
7822 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x)                  (x+0x00000654)  argument
7823 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_PHYS(x)                  (x+0x00000654)  argument
7826 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_IN(x)                    \  argument
7827 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL…
7828 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_INM(x, mask)             \  argument
7829 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask) 
7830 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUT(x, val)              \  argument
7831 	out_dword( HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), val)
7832 #define HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_OUTM(x, mask, val)       \  argument
7835 …sked_ns(HWIO_REO_R0_GXI_GXI_REDUCED_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_REDUCED_CONTRO…
7853 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x)                     (x+0x00000658)  argument
7854 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_PHYS(x)                     (x+0x00000658)  argument
7857 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_IN(x)                       \  argument
7858 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_MISC_CONTROL_RMSK)
7859 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_INM(x, mask)                \  argument
7860 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask) 
7861 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUT(x, val)                 \  argument
7862 	out_dword( HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), val)
7863 #define HWIO_REO_R0_GXI_GXI_MISC_CONTROL_OUTM(x, mask, val)          \  argument
7866 …d_masked_ns(HWIO_REO_R0_GXI_GXI_MISC_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_MISC_CONTROL_…
7902 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x)                     (x+0x0000065c)  argument
7903 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_PHYS(x)                     (x+0x0000065c)  argument
7906 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_IN(x)                       \  argument
7907 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_RMSK)
7908 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_INM(x, mask)                \  argument
7909 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask) 
7910 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUT(x, val)                 \  argument
7911 	out_dword( HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), val)
7912 #define HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_OUTM(x, mask, val)          \  argument
7915 …d_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_CONTROL_…
7927 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x)                      (x+0x00000660)  argument
7928 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_PHYS(x)                      (x+0x00000660)  argument
7931 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_IN(x)                        \  argument
7932 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), HWIO_REO_R0_GXI_GXI_WDOG_STATUS_RMSK)
7933 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_INM(x, mask)                 \  argument
7934 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask) 
7935 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUT(x, val)                  \  argument
7936 	out_dword( HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), val)
7937 #define HWIO_REO_R0_GXI_GXI_WDOG_STATUS_OUTM(x, mask, val)           \  argument
7940 …ord_masked_ns(HWIO_REO_R0_GXI_GXI_WDOG_STATUS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WDOG_STATUS_…
7949 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x)                    (x+0x00000664)  argument
7950 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_PHYS(x)                    (x+0x00000664)  argument
7953 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_IN(x)                      \  argument
7954 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_RMS…
7955 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_INM(x, mask)               \  argument
7956 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask) 
7957 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUT(x, val)                \  argument
7958 	out_dword( HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), val)
7959 #define HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_OUTM(x, mask, val)         \  argument
7962 …_masked_ns(HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_IDLE_COUNTERS…
7974 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x)                  (x+0x00000668)  argument
7975 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_PHYS(x)                  (x+0x00000668)  argument
7978 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_IN(x)                    \  argument
7979 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL…
7980 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_INM(x, mask)             \  argument
7981 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask) 
7982 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUT(x, val)              \  argument
7983 	out_dword( HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), val)
7984 #define HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
7987 …sked_ns(HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_LATENCY_CTR…
8002 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x)                  (x+0x0000066c)  argument
8003 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_PHYS(x)                  (x+0x0000066c)  argument
8006 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_IN(x)                    \  argument
8007 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL…
8008 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_INM(x, mask)             \  argument
8009 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask) 
8010 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUT(x, val)              \  argument
8011 	out_dword( HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), val)
8012 #define HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_OUTM(x, mask, val)       \  argument
8015 …sked_ns(HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTRL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_LATENCY_CTR…
8030 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x)        (x+0x00000670)  argument
8031 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_PHYS(x)        (x+0x00000670)  argument
8034 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_IN(x)          \  argument
8035 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_ER…
8036 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
8037 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
8038 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUT(x, val)    \  argument
8039 	out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
8040 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
8043 …O_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABL…
8052 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x)        (x+0x00000674)  argument
8053 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_PHYS(x)        (x+0x00000674)  argument
8056 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_IN(x)          \  argument
8057 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_REO_R0_GXI_GXI_WR_ER…
8058 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
8059 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
8060 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUT(x, val)    \  argument
8061 	out_dword( HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
8062 #define HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
8065 …O_R0_GXI_GXI_WR_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_WR_ERR_STALL_DISABL…
8074 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x)        (x+0x00000678)  argument
8075 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_PHYS(x)        (x+0x00000678)  argument
8078 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_IN(x)          \  argument
8079 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_ER…
8080 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_INM(x, mask)   \  argument
8081 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask) 
8082 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUT(x, val)    \  argument
8083 	out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), val)
8084 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_OUTM(x, mask, val) \  argument
8087 …O_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_0_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABL…
8096 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x)        (x+0x0000067c)  argument
8097 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_PHYS(x)        (x+0x0000067c)  argument
8100 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_IN(x)          \  argument
8101 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), HWIO_REO_R0_GXI_GXI_RD_ER…
8102 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_INM(x, mask)   \  argument
8103 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask) 
8104 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUT(x, val)    \  argument
8105 	out_dword( HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), val)
8106 #define HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_OUTM(x, mask, val) \  argument
8109 …O_R0_GXI_GXI_RD_ERR_STALL_DISABLE_IX_1_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_RD_ERR_STALL_DISABL…
8118 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x)               (x+0x00000680)  argument
8119 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_PHYS(x)               (x+0x00000680)  argument
8122 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_IN(x)                 \  argument
8123 …in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), HWIO_REO_R0_GXI_GXI_AXI_OUTSANDI…
8124 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_INM(x, mask)          \  argument
8125 	in_dword_masked ( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask) 
8126 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUT(x, val)           \  argument
8127 	out_dword( HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), val)
8128 #define HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_OUTM(x, mask, val)    \  argument
8131 …ns(HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_CTL_ADDR(x), mask, val, HWIO_REO_R0_GXI_GXI_AXI_OUTSANDING_C…
8149 #define HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x)                         (x+0x00000684)  argument
8150 #define HWIO_REO_R0_CACHE_CTL_CONFIG_PHYS(x)                         (x+0x00000684)  argument
8153 #define HWIO_REO_R0_CACHE_CTL_CONFIG_IN(x)                           \  argument
8154 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONFIG_RMSK)
8155 #define HWIO_REO_R0_CACHE_CTL_CONFIG_INM(x, mask)                    \  argument
8156 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask) 
8157 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUT(x, val)                     \  argument
8158 	out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), val)
8159 #define HWIO_REO_R0_CACHE_CTL_CONFIG_OUTM(x, mask, val)              \  argument
8162 …t_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_IN…
8198 #define HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x)                        (x+0x00000688)  argument
8199 #define HWIO_REO_R0_CACHE_CTL_CONTROL_PHYS(x)                        (x+0x00000688)  argument
8202 #define HWIO_REO_R0_CACHE_CTL_CONTROL_IN(x)                          \  argument
8203 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONTROL_RMSK)
8204 #define HWIO_REO_R0_CACHE_CTL_CONTROL_INM(x, mask)                   \  argument
8205 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask) 
8206 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUT(x, val)                    \  argument
8207 	out_dword( HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), val)
8208 #define HWIO_REO_R0_CACHE_CTL_CONTROL_OUTM(x, mask, val)             \  argument
8211 …_dword_masked_ns(HWIO_REO_R0_CACHE_CTL_CONTROL_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONTROL_I…
8223 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x)                     (x+0x0000068c)  argument
8224 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_PHYS(x)                     (x+0x0000068c)  argument
8227 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_IN(x)                       \  argument
8228 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), HWIO_REO_R0_CACHE_CTL_CONFIG_SET_RMSK)
8229 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_INM(x, mask)                \  argument
8230 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask) 
8231 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUT(x, val)                 \  argument
8232 	out_dword( HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), val)
8233 #define HWIO_REO_R0_CACHE_CTL_CONFIG_SET_OUTM(x, mask, val)          \  argument
8236 …d_masked_ns(HWIO_REO_R0_CACHE_CTL_CONFIG_SET_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_CONFIG_SET_…
8251 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x)                       (x+0x00000690)  argument
8252 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_PHYS(x)                       (x+0x00000690)  argument
8255 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_IN(x)                         \  argument
8256 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), HWIO_REO_R0_CACHE_CTL_SET_SIZE_RMSK)
8257 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_INM(x, mask)                  \  argument
8258 	in_dword_masked ( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask) 
8259 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUT(x, val)                   \  argument
8260 	out_dword( HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), val)
8261 #define HWIO_REO_R0_CACHE_CTL_SET_SIZE_OUTM(x, mask, val)            \  argument
8264 …word_masked_ns(HWIO_REO_R0_CACHE_CTL_SET_SIZE_ADDR(x), mask, val, HWIO_REO_R0_CACHE_CTL_SET_SIZE_I…
8273 #define HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x)                            (x+0x00000694)  argument
8274 #define HWIO_REO_R0_CLK_GATE_CTRL_PHYS(x)                            (x+0x00000694)  argument
8277 #define HWIO_REO_R0_CLK_GATE_CTRL_IN(x)                              \  argument
8278 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), HWIO_REO_R0_CLK_GATE_CTRL_RMSK)
8279 #define HWIO_REO_R0_CLK_GATE_CTRL_INM(x, mask)                       \  argument
8280 	in_dword_masked ( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask) 
8281 #define HWIO_REO_R0_CLK_GATE_CTRL_OUT(x, val)                        \  argument
8282 	out_dword( HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), val)
8283 #define HWIO_REO_R0_CLK_GATE_CTRL_OUTM(x, mask, val)                 \  argument
8286 …out_dword_masked_ns(HWIO_REO_R0_CLK_GATE_CTRL_ADDR(x), mask, val, HWIO_REO_R0_CLK_GATE_CTRL_IN(x))…
8322 #define HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x)                           (x+0x00000698)  argument
8323 #define HWIO_REO_R0_EVENTMASK_IX_0_PHYS(x)                           (x+0x00000698)  argument
8326 #define HWIO_REO_R0_EVENTMASK_IX_0_IN(x)                             \  argument
8327 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_0_RMSK)
8328 #define HWIO_REO_R0_EVENTMASK_IX_0_INM(x, mask)                      \  argument
8329 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask) 
8330 #define HWIO_REO_R0_EVENTMASK_IX_0_OUT(x, val)                       \  argument
8331 	out_dword( HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), val)
8332 #define HWIO_REO_R0_EVENTMASK_IX_0_OUTM(x, mask, val)                \  argument
8335 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_0_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_0_IN(x…
8344 #define HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x)                           (x+0x0000069c)  argument
8345 #define HWIO_REO_R0_EVENTMASK_IX_1_PHYS(x)                           (x+0x0000069c)  argument
8348 #define HWIO_REO_R0_EVENTMASK_IX_1_IN(x)                             \  argument
8349 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_1_RMSK)
8350 #define HWIO_REO_R0_EVENTMASK_IX_1_INM(x, mask)                      \  argument
8351 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask) 
8352 #define HWIO_REO_R0_EVENTMASK_IX_1_OUT(x, val)                       \  argument
8353 	out_dword( HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), val)
8354 #define HWIO_REO_R0_EVENTMASK_IX_1_OUTM(x, mask, val)                \  argument
8357 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_1_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_1_IN(x…
8366 #define HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x)                           (x+0x000006a0)  argument
8367 #define HWIO_REO_R0_EVENTMASK_IX_2_PHYS(x)                           (x+0x000006a0)  argument
8370 #define HWIO_REO_R0_EVENTMASK_IX_2_IN(x)                             \  argument
8371 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_2_RMSK)
8372 #define HWIO_REO_R0_EVENTMASK_IX_2_INM(x, mask)                      \  argument
8373 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask) 
8374 #define HWIO_REO_R0_EVENTMASK_IX_2_OUT(x, val)                       \  argument
8375 	out_dword( HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), val)
8376 #define HWIO_REO_R0_EVENTMASK_IX_2_OUTM(x, mask, val)                \  argument
8379 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_2_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_2_IN(x…
8388 #define HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x)                           (x+0x000006a4)  argument
8389 #define HWIO_REO_R0_EVENTMASK_IX_3_PHYS(x)                           (x+0x000006a4)  argument
8392 #define HWIO_REO_R0_EVENTMASK_IX_3_IN(x)                             \  argument
8393 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), HWIO_REO_R0_EVENTMASK_IX_3_RMSK)
8394 #define HWIO_REO_R0_EVENTMASK_IX_3_INM(x, mask)                      \  argument
8395 	in_dword_masked ( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask) 
8396 #define HWIO_REO_R0_EVENTMASK_IX_3_OUT(x, val)                       \  argument
8397 	out_dword( HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), val)
8398 #define HWIO_REO_R0_EVENTMASK_IX_3_OUTM(x, mask, val)                \  argument
8401 …out_dword_masked_ns(HWIO_REO_R0_EVENTMASK_IX_3_ADDR(x), mask, val, HWIO_REO_R0_EVENTMASK_IX_3_IN(x…
8410 #define HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x)                          (x+0x00002000)  argument
8411 #define HWIO_REO_R1_MISC_DEBUG_CTRL_PHYS(x)                          (x+0x00002000)  argument
8414 #define HWIO_REO_R1_MISC_DEBUG_CTRL_IN(x)                            \  argument
8415 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), HWIO_REO_R1_MISC_DEBUG_CTRL_RMSK)
8416 #define HWIO_REO_R1_MISC_DEBUG_CTRL_INM(x, mask)                     \  argument
8417 	in_dword_masked ( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask) 
8418 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUT(x, val)                      \  argument
8419 	out_dword( HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), val)
8420 #define HWIO_REO_R1_MISC_DEBUG_CTRL_OUTM(x, mask, val)               \  argument
8423 …out_dword_masked_ns(HWIO_REO_R1_MISC_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_DEBUG_CTRL_IN…
8441 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x)                     (x+0x00002004)  argument
8442 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_PHYS(x)                     (x+0x00002004)  argument
8445 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_IN(x)                       \  argument
8446 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_RMSK)
8447 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_INM(x, mask)                \  argument
8448 	in_dword_masked ( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask) 
8449 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUT(x, val)                 \  argument
8450 	out_dword( HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), val)
8451 #define HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_OUTM(x, mask, val)          \  argument
8454 …d_masked_ns(HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_ADDR(x), mask, val, HWIO_REO_R1_MISC_PERF_DEBUG_CTRL_…
8466 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x)                  (x+0x00002008)  argument
8467 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_PHYS(x)                  (x+0x00002008)  argument
8470 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_IN(x)                    \  argument
8471 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL…
8472 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_INM(x, mask)             \  argument
8473 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask) 
8474 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUT(x, val)              \  argument
8475 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), val)
8476 #define HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_OUTM(x, mask, val)       \  argument
8479 …sked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_CONTROL_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_CONTRO…
8497 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x)                (x+0x0000200c)  argument
8498 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_PHYS(x)                (x+0x0000200c)  argument
8501 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_IN(x)                  \  argument
8502 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_C…
8503 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_INM(x, mask)           \  argument
8504 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask) 
8505 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUT(x, val)            \  argument
8506 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), val)
8507 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_OUTM(x, mask, val)     \  argument
8510 …d_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HIT_COU…
8519 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x)               (x+0x00002010)  argument
8520 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_PHYS(x)               (x+0x00002010)  argument
8523 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_IN(x)                 \  argument
8524 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_MISS…
8525 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_INM(x, mask)          \  argument
8526 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask) 
8527 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUT(x, val)           \  argument
8528 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), val)
8529 #define HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_OUTM(x, mask, val)    \  argument
8532 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COUNT_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_MISS_COU…
8541 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x)            (x+0x00002014)  argument
8542 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_PHYS(x)            (x+0x00002014)  argument
8545 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_IN(x)              \  argument
8546 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_T…
8547 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_INM(x, mask)       \  argument
8548 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask) 
8549 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUT(x, val)        \  argument
8550 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), val)
8551 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_OUTM(x, mask, val) \  argument
8554 …WIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE…
8563 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x)           (x+0x00002018)  argument
8564 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_PHYS(x)           (x+0x00002018)  argument
8567 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_IN(x)             \  argument
8568 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_…
8569 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_INM(x, mask)      \  argument
8570 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask) 
8571 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUT(x, val)       \  argument
8572 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), val)
8573 #define HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_OUTM(x, mask, val) \  argument
8576 …O_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_TAG_TABLE_…
8585 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x)                      (x+0x0000201c)  argument
8586 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_PHYS(x)                      (x+0x0000201c)  argument
8589 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_IN(x)                        \  argument
8590 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_STM_RMSK)
8591 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_INM(x, mask)                 \  argument
8592 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask) 
8593 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUT(x, val)                  \  argument
8594 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), val)
8595 #define HWIO_REO_R1_CACHE_CTL_DEBUG_STM_OUTM(x, mask, val)           \  argument
8598 …ord_masked_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_STM_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_STM_…
8607 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x)                (x+0x00002020)  argument
8608 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_PHYS(x)                (x+0x00002020)  argument
8611 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_IN(x)                  \  argument
8612 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_…
8613 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_INM(x, mask)           \  argument
8614 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask) 
8615 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUT(x, val)            \  argument
8616 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), val)
8617 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_OUTM(x, mask, val)     \  argument
8620 …d_ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LI…
8632 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x)               (x+0x00002024)  argument
8633 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_PHYS(x)               (x+0x00002024)  argument
8636 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_IN(x)                 \  argument
8637 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
8638 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_INM(x, mask)          \  argument
8639 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask) 
8640 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUT(x, val)           \  argument
8641 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), val)
8642 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_OUTM(x, mask, val)    \  argument
8645 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST1_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
8657 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x)               (x+0x00002028)  argument
8658 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_PHYS(x)               (x+0x00002028)  argument
8661 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_IN(x)                 \  argument
8662 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
8663 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_INM(x, mask)          \  argument
8664 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask) 
8665 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUT(x, val)           \  argument
8666 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), val)
8667 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_OUTM(x, mask, val)    \  argument
8670 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST2_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
8682 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x)               (x+0x0000202c)  argument
8683 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_PHYS(x)               (x+0x0000202c)  argument
8686 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_IN(x)                 \  argument
8687 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG_LINK…
8688 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_INM(x, mask)          \  argument
8689 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask) 
8690 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUT(x, val)           \  argument
8691 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), val)
8692 #define HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_OUTM(x, mask, val)    \  argument
8695 …ns(HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIST3_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_LINK_LIS…
8707 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x)          (x+0x00002030)  argument
8708 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_PHYS(x)          (x+0x00002030)  argument
8711 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_IN(x)            \  argument
8712 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBUG…
8713 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_INM(x, mask)     \  argument
8714 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask) 
8715 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUT(x, val)      \  argument
8716 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), val)
8717 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_OUTM(x, mask, val) \  argument
8720 …_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_LOW_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INF…
8729 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x)         (x+0x00002034)  argument
8730 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_PHYS(x)         (x+0x00002034)  argument
8733 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_IN(x)           \  argument
8734 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), HWIO_REO_R1_CACHE_CTL_DEBU…
8735 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_INM(x, mask)    \  argument
8736 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask) 
8737 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUT(x, val)     \  argument
8738 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), val)
8739 #define HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_OUTM(x, mask, val) \  argument
8742 …EO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO_HIGH_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_HW_ERR_INFO…
8751 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x)       (x+0x00002038)  argument
8752 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_PHYS(x)       (x+0x00002038)  argument
8755 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_IN(x)         \  argument
8756 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), HWIO_REO_R1_CACHE_CTL_DE…
8757 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_INM(x, mask)  \  argument
8758 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask) 
8759 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUT(x, val)   \  argument
8760 	out_dword( HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), val)
8761 #define HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_OUTM(x, mask, val) \  argument
8764 …R1_CACHE_CTL_DEBUG_EMPTY_LINE_COUNTER_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_DEBUG_EMPTY_LINE_C…
8776 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x)              (x+0x0000203c)  argument
8777 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_PHYS(x)              (x+0x0000203c)  argument
8780 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_IN(x)                \  argument
8781 …in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R1_CACHE_CTL_END_OF_TE…
8782 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_INM(x, mask)         \  argument
8783 	in_dword_masked ( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask) 
8784 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUT(x, val)          \  argument
8785 	out_dword( HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), val)
8786 #define HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_OUTM(x, mask, val)   \  argument
8789 …s(HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_CACHE_CTL_END_OF_TEST_CH…
8798 #define HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x)                        (x+0x00002040)  argument
8799 #define HWIO_REO_R1_END_OF_TEST_CHECK_PHYS(x)                        (x+0x00002040)  argument
8802 #define HWIO_REO_R1_END_OF_TEST_CHECK_IN(x)                          \  argument
8803 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), HWIO_REO_R1_END_OF_TEST_CHECK_RMSK)
8804 #define HWIO_REO_R1_END_OF_TEST_CHECK_INM(x, mask)                   \  argument
8805 	in_dword_masked ( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask) 
8806 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUT(x, val)                    \  argument
8807 	out_dword( HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), val)
8808 #define HWIO_REO_R1_END_OF_TEST_CHECK_OUTM(x, mask, val)             \  argument
8811 …_dword_masked_ns(HWIO_REO_R1_END_OF_TEST_CHECK_ADDR(x), mask, val, HWIO_REO_R1_END_OF_TEST_CHECK_I…
8820 #define HWIO_REO_R1_SM_ALL_IDLE_ADDR(x)                              (x+0x00002044)  argument
8821 #define HWIO_REO_R1_SM_ALL_IDLE_PHYS(x)                              (x+0x00002044)  argument
8824 #define HWIO_REO_R1_SM_ALL_IDLE_IN(x)                                \  argument
8825 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), HWIO_REO_R1_SM_ALL_IDLE_RMSK)
8826 #define HWIO_REO_R1_SM_ALL_IDLE_INM(x, mask)                         \  argument
8827 	in_dword_masked ( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask) 
8828 #define HWIO_REO_R1_SM_ALL_IDLE_OUT(x, val)                          \  argument
8829 	out_dword( HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), val)
8830 #define HWIO_REO_R1_SM_ALL_IDLE_OUTM(x, mask, val)                   \  argument
8833 		out_dword_masked_ns(HWIO_REO_R1_SM_ALL_IDLE_ADDR(x), mask, val, HWIO_REO_R1_SM_ALL_IDLE_IN(x)); \
8848 #define HWIO_REO_R1_TESTBUS_CTRL_ADDR(x)                             (x+0x00002048)  argument
8849 #define HWIO_REO_R1_TESTBUS_CTRL_PHYS(x)                             (x+0x00002048)  argument
8852 #define HWIO_REO_R1_TESTBUS_CTRL_IN(x)                               \  argument
8853 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), HWIO_REO_R1_TESTBUS_CTRL_RMSK)
8854 #define HWIO_REO_R1_TESTBUS_CTRL_INM(x, mask)                        \  argument
8855 	in_dword_masked ( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask) 
8856 #define HWIO_REO_R1_TESTBUS_CTRL_OUT(x, val)                         \  argument
8857 	out_dword( HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), val)
8858 #define HWIO_REO_R1_TESTBUS_CTRL_OUTM(x, mask, val)                  \  argument
8861 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_CTRL_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_CTRL_IN(x)); \
8870 #define HWIO_REO_R1_TESTBUS_LOWER_ADDR(x)                            (x+0x0000204c)  argument
8871 #define HWIO_REO_R1_TESTBUS_LOWER_PHYS(x)                            (x+0x0000204c)  argument
8874 #define HWIO_REO_R1_TESTBUS_LOWER_IN(x)                              \  argument
8875 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), HWIO_REO_R1_TESTBUS_LOWER_RMSK)
8876 #define HWIO_REO_R1_TESTBUS_LOWER_INM(x, mask)                       \  argument
8877 	in_dword_masked ( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask) 
8878 #define HWIO_REO_R1_TESTBUS_LOWER_OUT(x, val)                        \  argument
8879 	out_dword( HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), val)
8880 #define HWIO_REO_R1_TESTBUS_LOWER_OUTM(x, mask, val)                 \  argument
8883 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_LOWER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_LOWER_IN(x))…
8892 #define HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x)                           (x+0x00002050)  argument
8893 #define HWIO_REO_R1_TESTBUS_HIGHER_PHYS(x)                           (x+0x00002050)  argument
8896 #define HWIO_REO_R1_TESTBUS_HIGHER_IN(x)                             \  argument
8897 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), HWIO_REO_R1_TESTBUS_HIGHER_RMSK)
8898 #define HWIO_REO_R1_TESTBUS_HIGHER_INM(x, mask)                      \  argument
8899 	in_dword_masked ( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask) 
8900 #define HWIO_REO_R1_TESTBUS_HIGHER_OUT(x, val)                       \  argument
8901 	out_dword( HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), val)
8902 #define HWIO_REO_R1_TESTBUS_HIGHER_OUTM(x, mask, val)                \  argument
8905 …out_dword_masked_ns(HWIO_REO_R1_TESTBUS_HIGHER_ADDR(x), mask, val, HWIO_REO_R1_TESTBUS_HIGHER_IN(x…
8914 #define HWIO_REO_R1_SM_STATES_IX_0_ADDR(x)                           (x+0x00002054)  argument
8915 #define HWIO_REO_R1_SM_STATES_IX_0_PHYS(x)                           (x+0x00002054)  argument
8918 #define HWIO_REO_R1_SM_STATES_IX_0_IN(x)                             \  argument
8919 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), HWIO_REO_R1_SM_STATES_IX_0_RMSK)
8920 #define HWIO_REO_R1_SM_STATES_IX_0_INM(x, mask)                      \  argument
8921 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask) 
8922 #define HWIO_REO_R1_SM_STATES_IX_0_OUT(x, val)                       \  argument
8923 	out_dword( HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), val)
8924 #define HWIO_REO_R1_SM_STATES_IX_0_OUTM(x, mask, val)                \  argument
8927 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_0_IN(x…
8936 #define HWIO_REO_R1_SM_STATES_IX_1_ADDR(x)                           (x+0x00002058)  argument
8937 #define HWIO_REO_R1_SM_STATES_IX_1_PHYS(x)                           (x+0x00002058)  argument
8940 #define HWIO_REO_R1_SM_STATES_IX_1_IN(x)                             \  argument
8941 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), HWIO_REO_R1_SM_STATES_IX_1_RMSK)
8942 #define HWIO_REO_R1_SM_STATES_IX_1_INM(x, mask)                      \  argument
8943 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask) 
8944 #define HWIO_REO_R1_SM_STATES_IX_1_OUT(x, val)                       \  argument
8945 	out_dword( HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), val)
8946 #define HWIO_REO_R1_SM_STATES_IX_1_OUTM(x, mask, val)                \  argument
8949 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_1_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_1_IN(x…
8958 #define HWIO_REO_R1_SM_STATES_IX_2_ADDR(x)                           (x+0x0000205c)  argument
8959 #define HWIO_REO_R1_SM_STATES_IX_2_PHYS(x)                           (x+0x0000205c)  argument
8962 #define HWIO_REO_R1_SM_STATES_IX_2_IN(x)                             \  argument
8963 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), HWIO_REO_R1_SM_STATES_IX_2_RMSK)
8964 #define HWIO_REO_R1_SM_STATES_IX_2_INM(x, mask)                      \  argument
8965 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask) 
8966 #define HWIO_REO_R1_SM_STATES_IX_2_OUT(x, val)                       \  argument
8967 	out_dword( HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), val)
8968 #define HWIO_REO_R1_SM_STATES_IX_2_OUTM(x, mask, val)                \  argument
8971 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_2_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_2_IN(x…
8980 #define HWIO_REO_R1_SM_STATES_IX_3_ADDR(x)                           (x+0x00002060)  argument
8981 #define HWIO_REO_R1_SM_STATES_IX_3_PHYS(x)                           (x+0x00002060)  argument
8984 #define HWIO_REO_R1_SM_STATES_IX_3_IN(x)                             \  argument
8985 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), HWIO_REO_R1_SM_STATES_IX_3_RMSK)
8986 #define HWIO_REO_R1_SM_STATES_IX_3_INM(x, mask)                      \  argument
8987 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask) 
8988 #define HWIO_REO_R1_SM_STATES_IX_3_OUT(x, val)                       \  argument
8989 	out_dword( HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), val)
8990 #define HWIO_REO_R1_SM_STATES_IX_3_OUTM(x, mask, val)                \  argument
8993 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_3_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_3_IN(x…
9002 #define HWIO_REO_R1_SM_STATES_IX_4_ADDR(x)                           (x+0x00002064)  argument
9003 #define HWIO_REO_R1_SM_STATES_IX_4_PHYS(x)                           (x+0x00002064)  argument
9006 #define HWIO_REO_R1_SM_STATES_IX_4_IN(x)                             \  argument
9007 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), HWIO_REO_R1_SM_STATES_IX_4_RMSK)
9008 #define HWIO_REO_R1_SM_STATES_IX_4_INM(x, mask)                      \  argument
9009 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask) 
9010 #define HWIO_REO_R1_SM_STATES_IX_4_OUT(x, val)                       \  argument
9011 	out_dword( HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), val)
9012 #define HWIO_REO_R1_SM_STATES_IX_4_OUTM(x, mask, val)                \  argument
9015 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_4_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_4_IN(x…
9024 #define HWIO_REO_R1_SM_STATES_IX_5_ADDR(x)                           (x+0x00002068)  argument
9025 #define HWIO_REO_R1_SM_STATES_IX_5_PHYS(x)                           (x+0x00002068)  argument
9028 #define HWIO_REO_R1_SM_STATES_IX_5_IN(x)                             \  argument
9029 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), HWIO_REO_R1_SM_STATES_IX_5_RMSK)
9030 #define HWIO_REO_R1_SM_STATES_IX_5_INM(x, mask)                      \  argument
9031 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask) 
9032 #define HWIO_REO_R1_SM_STATES_IX_5_OUT(x, val)                       \  argument
9033 	out_dword( HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), val)
9034 #define HWIO_REO_R1_SM_STATES_IX_5_OUTM(x, mask, val)                \  argument
9037 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_5_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_5_IN(x…
9046 #define HWIO_REO_R1_SM_STATES_IX_6_ADDR(x)                           (x+0x0000206c)  argument
9047 #define HWIO_REO_R1_SM_STATES_IX_6_PHYS(x)                           (x+0x0000206c)  argument
9050 #define HWIO_REO_R1_SM_STATES_IX_6_IN(x)                             \  argument
9051 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), HWIO_REO_R1_SM_STATES_IX_6_RMSK)
9052 #define HWIO_REO_R1_SM_STATES_IX_6_INM(x, mask)                      \  argument
9053 	in_dword_masked ( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask) 
9054 #define HWIO_REO_R1_SM_STATES_IX_6_OUT(x, val)                       \  argument
9055 	out_dword( HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), val)
9056 #define HWIO_REO_R1_SM_STATES_IX_6_OUTM(x, mask, val)                \  argument
9059 …out_dword_masked_ns(HWIO_REO_R1_SM_STATES_IX_6_ADDR(x), mask, val, HWIO_REO_R1_SM_STATES_IX_6_IN(x…
9068 #define HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x)                         (x+0x00002070)  argument
9069 #define HWIO_REO_R1_IDLE_STATES_IX_0_PHYS(x)                         (x+0x00002070)  argument
9072 #define HWIO_REO_R1_IDLE_STATES_IX_0_IN(x)                           \  argument
9073 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), HWIO_REO_R1_IDLE_STATES_IX_0_RMSK)
9074 #define HWIO_REO_R1_IDLE_STATES_IX_0_INM(x, mask)                    \  argument
9075 	in_dword_masked ( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask) 
9076 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUT(x, val)                     \  argument
9077 	out_dword( HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), val)
9078 #define HWIO_REO_R1_IDLE_STATES_IX_0_OUTM(x, mask, val)              \  argument
9081 …t_dword_masked_ns(HWIO_REO_R1_IDLE_STATES_IX_0_ADDR(x), mask, val, HWIO_REO_R1_IDLE_STATES_IX_0_IN…
9090 #define HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x)                       (x+0x00002074)  argument
9091 #define HWIO_REO_R1_INVALID_APB_ACCESS_PHYS(x)                       (x+0x00002074)  argument
9094 #define HWIO_REO_R1_INVALID_APB_ACCESS_IN(x)                         \  argument
9095 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), HWIO_REO_R1_INVALID_APB_ACCESS_RMSK)
9096 #define HWIO_REO_R1_INVALID_APB_ACCESS_INM(x, mask)                  \  argument
9097 	in_dword_masked ( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask) 
9098 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUT(x, val)                   \  argument
9099 	out_dword( HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), val)
9100 #define HWIO_REO_R1_INVALID_APB_ACCESS_OUTM(x, mask, val)            \  argument
9103 …word_masked_ns(HWIO_REO_R1_INVALID_APB_ACCESS_ADDR(x), mask, val, HWIO_REO_R1_INVALID_APB_ACCESS_I…
9115 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x)                       (x+0x00003000)  argument
9116 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_PHYS(x)                       (x+0x00003000)  argument
9119 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_IN(x)                         \  argument
9120 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), HWIO_REO_R2_RXDMA2REO0_RING_HP_RMSK)
9121 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_INM(x, mask)                  \  argument
9122 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask) 
9123 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUT(x, val)                   \  argument
9124 	out_dword( HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), val)
9125 #define HWIO_REO_R2_RXDMA2REO0_RING_HP_OUTM(x, mask, val)            \  argument
9128 …word_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING_HP_I…
9137 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x)                       (x+0x00003004)  argument
9138 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_PHYS(x)                       (x+0x00003004)  argument
9141 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_IN(x)                         \  argument
9142 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), HWIO_REO_R2_RXDMA2REO0_RING_TP_RMSK)
9143 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_INM(x, mask)                  \  argument
9144 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask) 
9145 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUT(x, val)                   \  argument
9146 	out_dword( HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), val)
9147 #define HWIO_REO_R2_RXDMA2REO0_RING_TP_OUTM(x, mask, val)            \  argument
9150 …word_masked_ns(HWIO_REO_R2_RXDMA2REO0_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO0_RING_TP_I…
9159 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x)                       (x+0x00003008)  argument
9160 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_PHYS(x)                       (x+0x00003008)  argument
9163 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_IN(x)                         \  argument
9164 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x), HWIO_REO_R2_RXDMA2REO1_RING_HP_RMSK)
9165 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_INM(x, mask)                  \  argument
9166 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x), mask) 
9167 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUT(x, val)                   \  argument
9168 	out_dword( HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x), val)
9169 #define HWIO_REO_R2_RXDMA2REO1_RING_HP_OUTM(x, mask, val)            \  argument
9172 …word_masked_ns(HWIO_REO_R2_RXDMA2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO1_RING_HP_I…
9181 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x)                       (x+0x0000300c)  argument
9182 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_PHYS(x)                       (x+0x0000300c)  argument
9185 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_IN(x)                         \  argument
9186 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x), HWIO_REO_R2_RXDMA2REO1_RING_TP_RMSK)
9187 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_INM(x, mask)                  \  argument
9188 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x), mask) 
9189 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUT(x, val)                   \  argument
9190 	out_dword( HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x), val)
9191 #define HWIO_REO_R2_RXDMA2REO1_RING_TP_OUTM(x, mask, val)            \  argument
9194 …word_masked_ns(HWIO_REO_R2_RXDMA2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO1_RING_TP_I…
9203 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x)                       (x+0x00003010)  argument
9204 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_PHYS(x)                       (x+0x00003010)  argument
9207 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_IN(x)                         \  argument
9208 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x), HWIO_REO_R2_RXDMA2REO2_RING_HP_RMSK)
9209 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_INM(x, mask)                  \  argument
9210 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x), mask) 
9211 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUT(x, val)                   \  argument
9212 	out_dword( HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x), val)
9213 #define HWIO_REO_R2_RXDMA2REO2_RING_HP_OUTM(x, mask, val)            \  argument
9216 …word_masked_ns(HWIO_REO_R2_RXDMA2REO2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO2_RING_HP_I…
9225 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x)                       (x+0x00003014)  argument
9226 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_PHYS(x)                       (x+0x00003014)  argument
9229 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_IN(x)                         \  argument
9230 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x), HWIO_REO_R2_RXDMA2REO2_RING_TP_RMSK)
9231 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_INM(x, mask)                  \  argument
9232 	in_dword_masked ( HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x), mask) 
9233 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUT(x, val)                   \  argument
9234 	out_dword( HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x), val)
9235 #define HWIO_REO_R2_RXDMA2REO2_RING_TP_OUTM(x, mask, val)            \  argument
9238 …word_masked_ns(HWIO_REO_R2_RXDMA2REO2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_RXDMA2REO2_RING_TP_I…
9247 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x)                     (x+0x00003018)  argument
9248 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_PHYS(x)                     (x+0x00003018)  argument
9251 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_IN(x)                       \  argument
9252 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), HWIO_REO_R2_WBM2REO_LINK_RING_HP_RMSK)
9253 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_INM(x, mask)                \  argument
9254 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask) 
9255 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUT(x, val)                 \  argument
9256 	out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), val)
9257 #define HWIO_REO_R2_WBM2REO_LINK_RING_HP_OUTM(x, mask, val)          \  argument
9260 …d_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_RING_HP_…
9269 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x)                     (x+0x0000301c)  argument
9270 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_PHYS(x)                     (x+0x0000301c)  argument
9273 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_IN(x)                       \  argument
9274 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), HWIO_REO_R2_WBM2REO_LINK_RING_TP_RMSK)
9275 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_INM(x, mask)                \  argument
9276 	in_dword_masked ( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask) 
9277 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUT(x, val)                 \  argument
9278 	out_dword( HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), val)
9279 #define HWIO_REO_R2_WBM2REO_LINK_RING_TP_OUTM(x, mask, val)          \  argument
9282 …d_masked_ns(HWIO_REO_R2_WBM2REO_LINK_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_WBM2REO_LINK_RING_TP_…
9291 #define HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x)                          (x+0x00003020)  argument
9292 #define HWIO_REO_R2_REO_CMD_RING_HP_PHYS(x)                          (x+0x00003020)  argument
9295 #define HWIO_REO_R2_REO_CMD_RING_HP_IN(x)                            \  argument
9296 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), HWIO_REO_R2_REO_CMD_RING_HP_RMSK)
9297 #define HWIO_REO_R2_REO_CMD_RING_HP_INM(x, mask)                     \  argument
9298 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask) 
9299 #define HWIO_REO_R2_REO_CMD_RING_HP_OUT(x, val)                      \  argument
9300 	out_dword( HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), val)
9301 #define HWIO_REO_R2_REO_CMD_RING_HP_OUTM(x, mask, val)               \  argument
9304 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_HP_IN…
9313 #define HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x)                          (x+0x00003024)  argument
9314 #define HWIO_REO_R2_REO_CMD_RING_TP_PHYS(x)                          (x+0x00003024)  argument
9317 #define HWIO_REO_R2_REO_CMD_RING_TP_IN(x)                            \  argument
9318 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), HWIO_REO_R2_REO_CMD_RING_TP_RMSK)
9319 #define HWIO_REO_R2_REO_CMD_RING_TP_INM(x, mask)                     \  argument
9320 	in_dword_masked ( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask) 
9321 #define HWIO_REO_R2_REO_CMD_RING_TP_OUT(x, val)                      \  argument
9322 	out_dword( HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), val)
9323 #define HWIO_REO_R2_REO_CMD_RING_TP_OUTM(x, mask, val)               \  argument
9326 …out_dword_masked_ns(HWIO_REO_R2_REO_CMD_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_CMD_RING_TP_IN…
9335 #define HWIO_REO_R2_SW2REO_RING_HP_ADDR(x)                           (x+0x00003028)  argument
9336 #define HWIO_REO_R2_SW2REO_RING_HP_PHYS(x)                           (x+0x00003028)  argument
9339 #define HWIO_REO_R2_SW2REO_RING_HP_IN(x)                             \  argument
9340 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), HWIO_REO_R2_SW2REO_RING_HP_RMSK)
9341 #define HWIO_REO_R2_SW2REO_RING_HP_INM(x, mask)                      \  argument
9342 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask) 
9343 #define HWIO_REO_R2_SW2REO_RING_HP_OUT(x, val)                       \  argument
9344 	out_dword( HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), val)
9345 #define HWIO_REO_R2_SW2REO_RING_HP_OUTM(x, mask, val)                \  argument
9348 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_HP_IN(x…
9357 #define HWIO_REO_R2_SW2REO_RING_TP_ADDR(x)                           (x+0x0000302c)  argument
9358 #define HWIO_REO_R2_SW2REO_RING_TP_PHYS(x)                           (x+0x0000302c)  argument
9361 #define HWIO_REO_R2_SW2REO_RING_TP_IN(x)                             \  argument
9362 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), HWIO_REO_R2_SW2REO_RING_TP_RMSK)
9363 #define HWIO_REO_R2_SW2REO_RING_TP_INM(x, mask)                      \  argument
9364 	in_dword_masked ( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask) 
9365 #define HWIO_REO_R2_SW2REO_RING_TP_OUT(x, val)                       \  argument
9366 	out_dword( HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), val)
9367 #define HWIO_REO_R2_SW2REO_RING_TP_OUTM(x, mask, val)                \  argument
9370 …out_dword_masked_ns(HWIO_REO_R2_SW2REO_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO_RING_TP_IN(x…
9379 #define HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x)                          (x+0x00003030)  argument
9380 #define HWIO_REO_R2_SW2REO1_RING_HP_PHYS(x)                          (x+0x00003030)  argument
9383 #define HWIO_REO_R2_SW2REO1_RING_HP_IN(x)                            \  argument
9384 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), HWIO_REO_R2_SW2REO1_RING_HP_RMSK)
9385 #define HWIO_REO_R2_SW2REO1_RING_HP_INM(x, mask)                     \  argument
9386 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask) 
9387 #define HWIO_REO_R2_SW2REO1_RING_HP_OUT(x, val)                      \  argument
9388 	out_dword( HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), val)
9389 #define HWIO_REO_R2_SW2REO1_RING_HP_OUTM(x, mask, val)               \  argument
9392 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_HP_IN…
9401 #define HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x)                          (x+0x00003034)  argument
9402 #define HWIO_REO_R2_SW2REO1_RING_TP_PHYS(x)                          (x+0x00003034)  argument
9405 #define HWIO_REO_R2_SW2REO1_RING_TP_IN(x)                            \  argument
9406 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), HWIO_REO_R2_SW2REO1_RING_TP_RMSK)
9407 #define HWIO_REO_R2_SW2REO1_RING_TP_INM(x, mask)                     \  argument
9408 	in_dword_masked ( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask) 
9409 #define HWIO_REO_R2_SW2REO1_RING_TP_OUT(x, val)                      \  argument
9410 	out_dword( HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), val)
9411 #define HWIO_REO_R2_SW2REO1_RING_TP_OUTM(x, mask, val)               \  argument
9414 …out_dword_masked_ns(HWIO_REO_R2_SW2REO1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_SW2REO1_RING_TP_IN…
9423 #define HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x)                          (x+0x00003038)  argument
9424 #define HWIO_REO_R2_REO2SW1_RING_HP_PHYS(x)                          (x+0x00003038)  argument
9427 #define HWIO_REO_R2_REO2SW1_RING_HP_IN(x)                            \  argument
9428 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW1_RING_HP_RMSK)
9429 #define HWIO_REO_R2_REO2SW1_RING_HP_INM(x, mask)                     \  argument
9430 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask) 
9431 #define HWIO_REO_R2_REO2SW1_RING_HP_OUT(x, val)                      \  argument
9432 	out_dword( HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), val)
9433 #define HWIO_REO_R2_REO2SW1_RING_HP_OUTM(x, mask, val)               \  argument
9436 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_HP_IN…
9445 #define HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x)                          (x+0x0000303c)  argument
9446 #define HWIO_REO_R2_REO2SW1_RING_TP_PHYS(x)                          (x+0x0000303c)  argument
9449 #define HWIO_REO_R2_REO2SW1_RING_TP_IN(x)                            \  argument
9450 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW1_RING_TP_RMSK)
9451 #define HWIO_REO_R2_REO2SW1_RING_TP_INM(x, mask)                     \  argument
9452 	in_dword_masked ( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask) 
9453 #define HWIO_REO_R2_REO2SW1_RING_TP_OUT(x, val)                      \  argument
9454 	out_dword( HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), val)
9455 #define HWIO_REO_R2_REO2SW1_RING_TP_OUTM(x, mask, val)               \  argument
9458 …out_dword_masked_ns(HWIO_REO_R2_REO2SW1_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW1_RING_TP_IN…
9467 #define HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x)                          (x+0x00003040)  argument
9468 #define HWIO_REO_R2_REO2SW2_RING_HP_PHYS(x)                          (x+0x00003040)  argument
9471 #define HWIO_REO_R2_REO2SW2_RING_HP_IN(x)                            \  argument
9472 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW2_RING_HP_RMSK)
9473 #define HWIO_REO_R2_REO2SW2_RING_HP_INM(x, mask)                     \  argument
9474 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask) 
9475 #define HWIO_REO_R2_REO2SW2_RING_HP_OUT(x, val)                      \  argument
9476 	out_dword( HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), val)
9477 #define HWIO_REO_R2_REO2SW2_RING_HP_OUTM(x, mask, val)               \  argument
9480 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_HP_IN…
9489 #define HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x)                          (x+0x00003044)  argument
9490 #define HWIO_REO_R2_REO2SW2_RING_TP_PHYS(x)                          (x+0x00003044)  argument
9493 #define HWIO_REO_R2_REO2SW2_RING_TP_IN(x)                            \  argument
9494 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW2_RING_TP_RMSK)
9495 #define HWIO_REO_R2_REO2SW2_RING_TP_INM(x, mask)                     \  argument
9496 	in_dword_masked ( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask) 
9497 #define HWIO_REO_R2_REO2SW2_RING_TP_OUT(x, val)                      \  argument
9498 	out_dword( HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), val)
9499 #define HWIO_REO_R2_REO2SW2_RING_TP_OUTM(x, mask, val)               \  argument
9502 …out_dword_masked_ns(HWIO_REO_R2_REO2SW2_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW2_RING_TP_IN…
9511 #define HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x)                          (x+0x00003048)  argument
9512 #define HWIO_REO_R2_REO2SW3_RING_HP_PHYS(x)                          (x+0x00003048)  argument
9515 #define HWIO_REO_R2_REO2SW3_RING_HP_IN(x)                            \  argument
9516 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW3_RING_HP_RMSK)
9517 #define HWIO_REO_R2_REO2SW3_RING_HP_INM(x, mask)                     \  argument
9518 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask) 
9519 #define HWIO_REO_R2_REO2SW3_RING_HP_OUT(x, val)                      \  argument
9520 	out_dword( HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), val)
9521 #define HWIO_REO_R2_REO2SW3_RING_HP_OUTM(x, mask, val)               \  argument
9524 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_HP_IN…
9533 #define HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x)                          (x+0x0000304c)  argument
9534 #define HWIO_REO_R2_REO2SW3_RING_TP_PHYS(x)                          (x+0x0000304c)  argument
9537 #define HWIO_REO_R2_REO2SW3_RING_TP_IN(x)                            \  argument
9538 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW3_RING_TP_RMSK)
9539 #define HWIO_REO_R2_REO2SW3_RING_TP_INM(x, mask)                     \  argument
9540 	in_dword_masked ( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask) 
9541 #define HWIO_REO_R2_REO2SW3_RING_TP_OUT(x, val)                      \  argument
9542 	out_dword( HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), val)
9543 #define HWIO_REO_R2_REO2SW3_RING_TP_OUTM(x, mask, val)               \  argument
9546 …out_dword_masked_ns(HWIO_REO_R2_REO2SW3_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW3_RING_TP_IN…
9555 #define HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x)                          (x+0x00003050)  argument
9556 #define HWIO_REO_R2_REO2SW4_RING_HP_PHYS(x)                          (x+0x00003050)  argument
9559 #define HWIO_REO_R2_REO2SW4_RING_HP_IN(x)                            \  argument
9560 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), HWIO_REO_R2_REO2SW4_RING_HP_RMSK)
9561 #define HWIO_REO_R2_REO2SW4_RING_HP_INM(x, mask)                     \  argument
9562 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask) 
9563 #define HWIO_REO_R2_REO2SW4_RING_HP_OUT(x, val)                      \  argument
9564 	out_dword( HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), val)
9565 #define HWIO_REO_R2_REO2SW4_RING_HP_OUTM(x, mask, val)               \  argument
9568 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_HP_IN…
9577 #define HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x)                          (x+0x00003054)  argument
9578 #define HWIO_REO_R2_REO2SW4_RING_TP_PHYS(x)                          (x+0x00003054)  argument
9581 #define HWIO_REO_R2_REO2SW4_RING_TP_IN(x)                            \  argument
9582 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), HWIO_REO_R2_REO2SW4_RING_TP_RMSK)
9583 #define HWIO_REO_R2_REO2SW4_RING_TP_INM(x, mask)                     \  argument
9584 	in_dword_masked ( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask) 
9585 #define HWIO_REO_R2_REO2SW4_RING_TP_OUT(x, val)                      \  argument
9586 	out_dword( HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), val)
9587 #define HWIO_REO_R2_REO2SW4_RING_TP_OUTM(x, mask, val)               \  argument
9590 …out_dword_masked_ns(HWIO_REO_R2_REO2SW4_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2SW4_RING_TP_IN…
9599 #define HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x)                          (x+0x00003058)  argument
9600 #define HWIO_REO_R2_REO2TCL_RING_HP_PHYS(x)                          (x+0x00003058)  argument
9603 #define HWIO_REO_R2_REO2TCL_RING_HP_IN(x)                            \  argument
9604 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), HWIO_REO_R2_REO2TCL_RING_HP_RMSK)
9605 #define HWIO_REO_R2_REO2TCL_RING_HP_INM(x, mask)                     \  argument
9606 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask) 
9607 #define HWIO_REO_R2_REO2TCL_RING_HP_OUT(x, val)                      \  argument
9608 	out_dword( HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), val)
9609 #define HWIO_REO_R2_REO2TCL_RING_HP_OUTM(x, mask, val)               \  argument
9612 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_HP_IN…
9621 #define HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x)                          (x+0x0000305c)  argument
9622 #define HWIO_REO_R2_REO2TCL_RING_TP_PHYS(x)                          (x+0x0000305c)  argument
9625 #define HWIO_REO_R2_REO2TCL_RING_TP_IN(x)                            \  argument
9626 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), HWIO_REO_R2_REO2TCL_RING_TP_RMSK)
9627 #define HWIO_REO_R2_REO2TCL_RING_TP_INM(x, mask)                     \  argument
9628 	in_dword_masked ( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask) 
9629 #define HWIO_REO_R2_REO2TCL_RING_TP_OUT(x, val)                      \  argument
9630 	out_dword( HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), val)
9631 #define HWIO_REO_R2_REO2TCL_RING_TP_OUTM(x, mask, val)               \  argument
9634 …out_dword_masked_ns(HWIO_REO_R2_REO2TCL_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2TCL_RING_TP_IN…
9643 #define HWIO_REO_R2_REO2FW_RING_HP_ADDR(x)                           (x+0x00003060)  argument
9644 #define HWIO_REO_R2_REO2FW_RING_HP_PHYS(x)                           (x+0x00003060)  argument
9647 #define HWIO_REO_R2_REO2FW_RING_HP_IN(x)                             \  argument
9648 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), HWIO_REO_R2_REO2FW_RING_HP_RMSK)
9649 #define HWIO_REO_R2_REO2FW_RING_HP_INM(x, mask)                      \  argument
9650 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask) 
9651 #define HWIO_REO_R2_REO2FW_RING_HP_OUT(x, val)                       \  argument
9652 	out_dword( HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), val)
9653 #define HWIO_REO_R2_REO2FW_RING_HP_OUTM(x, mask, val)                \  argument
9656 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_HP_IN(x…
9665 #define HWIO_REO_R2_REO2FW_RING_TP_ADDR(x)                           (x+0x00003064)  argument
9666 #define HWIO_REO_R2_REO2FW_RING_TP_PHYS(x)                           (x+0x00003064)  argument
9669 #define HWIO_REO_R2_REO2FW_RING_TP_IN(x)                             \  argument
9670 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), HWIO_REO_R2_REO2FW_RING_TP_RMSK)
9671 #define HWIO_REO_R2_REO2FW_RING_TP_INM(x, mask)                      \  argument
9672 	in_dword_masked ( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask) 
9673 #define HWIO_REO_R2_REO2FW_RING_TP_OUT(x, val)                       \  argument
9674 	out_dword( HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), val)
9675 #define HWIO_REO_R2_REO2FW_RING_TP_OUTM(x, mask, val)                \  argument
9678 …out_dword_masked_ns(HWIO_REO_R2_REO2FW_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO2FW_RING_TP_IN(x…
9687 #define HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x)                      (x+0x00003068)  argument
9688 #define HWIO_REO_R2_REO_RELEASE_RING_HP_PHYS(x)                      (x+0x00003068)  argument
9691 #define HWIO_REO_R2_REO_RELEASE_RING_HP_IN(x)                        \  argument
9692 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), HWIO_REO_R2_REO_RELEASE_RING_HP_RMSK)
9693 #define HWIO_REO_R2_REO_RELEASE_RING_HP_INM(x, mask)                 \  argument
9694 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask) 
9695 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUT(x, val)                  \  argument
9696 	out_dword( HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), val)
9697 #define HWIO_REO_R2_REO_RELEASE_RING_HP_OUTM(x, mask, val)           \  argument
9700 …ord_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RING_HP_…
9709 #define HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x)                      (x+0x0000306c)  argument
9710 #define HWIO_REO_R2_REO_RELEASE_RING_TP_PHYS(x)                      (x+0x0000306c)  argument
9713 #define HWIO_REO_R2_REO_RELEASE_RING_TP_IN(x)                        \  argument
9714 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), HWIO_REO_R2_REO_RELEASE_RING_TP_RMSK)
9715 #define HWIO_REO_R2_REO_RELEASE_RING_TP_INM(x, mask)                 \  argument
9716 	in_dword_masked ( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask) 
9717 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUT(x, val)                  \  argument
9718 	out_dword( HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), val)
9719 #define HWIO_REO_R2_REO_RELEASE_RING_TP_OUTM(x, mask, val)           \  argument
9722 …ord_masked_ns(HWIO_REO_R2_REO_RELEASE_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_RELEASE_RING_TP_…
9731 #define HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x)                       (x+0x00003070)  argument
9732 #define HWIO_REO_R2_REO_STATUS_RING_HP_PHYS(x)                       (x+0x00003070)  argument
9735 #define HWIO_REO_R2_REO_STATUS_RING_HP_IN(x)                         \  argument
9736 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), HWIO_REO_R2_REO_STATUS_RING_HP_RMSK)
9737 #define HWIO_REO_R2_REO_STATUS_RING_HP_INM(x, mask)                  \  argument
9738 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask) 
9739 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUT(x, val)                   \  argument
9740 	out_dword( HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), val)
9741 #define HWIO_REO_R2_REO_STATUS_RING_HP_OUTM(x, mask, val)            \  argument
9744 …word_masked_ns(HWIO_REO_R2_REO_STATUS_RING_HP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING_HP_I…
9753 #define HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x)                       (x+0x00003074)  argument
9754 #define HWIO_REO_R2_REO_STATUS_RING_TP_PHYS(x)                       (x+0x00003074)  argument
9757 #define HWIO_REO_R2_REO_STATUS_RING_TP_IN(x)                         \  argument
9758 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), HWIO_REO_R2_REO_STATUS_RING_TP_RMSK)
9759 #define HWIO_REO_R2_REO_STATUS_RING_TP_INM(x, mask)                  \  argument
9760 	in_dword_masked ( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask) 
9761 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUT(x, val)                   \  argument
9762 	out_dword( HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), val)
9763 #define HWIO_REO_R2_REO_STATUS_RING_TP_OUTM(x, mask, val)            \  argument
9766 …word_masked_ns(HWIO_REO_R2_REO_STATUS_RING_TP_ADDR(x), mask, val, HWIO_REO_R2_REO_STATUS_RING_TP_I…